diff --git a/.github/workflows/Build_RPS_AppKit-E8.yml b/.github/workflows/Build_RPS_AppKit-E8.yml index 262ffd1..a291b23 100644 --- a/.github/workflows/Build_RPS_AppKit-E8.yml +++ b/.github/workflows/Build_RPS_AppKit-E8.yml @@ -54,7 +54,6 @@ jobs: working-directory: ./ run: | cpackget add ./packs/PyTorch.ExecuTorch.1.1.0-rc1-build.12/PyTorch.ExecuTorch.pdsc --agree-embedded-license - cpackget add ./packs/AlifSemiconductor.Ensemble.2.2.0-dev8+g560eb47.pack --agree-embedded-license - name: Build the target-set working-directory: ./RockPaperScissors/AppKit-E8_USB diff --git a/.github/workflows/Build_RPS_Variants.yml b/.github/workflows/Build_RPS_Variants.yml index 0d3aad8..cc5c60a 100644 --- a/.github/workflows/Build_RPS_Variants.yml +++ b/.github/workflows/Build_RPS_Variants.yml @@ -71,7 +71,6 @@ jobs: working-directory: ./ run: | cpackget add ./packs/PyTorch.ExecuTorch.1.1.0-rc1-build.12/PyTorch.ExecuTorch.pdsc --agree-embedded-license - cpackget add ./packs/AlifSemiconductor.Ensemble.2.2.0-dev8+g560eb47.pack --agree-embedded-license - name: ${{matrix.context.tool}} Build-Test for context ${{matrix.context.proj}}.${{matrix.context.build-type}}+${{matrix.context.target-type}} working-directory: ${{matrix.context.dir}} diff --git a/.github/workflows/Test_RPS_SSE-320-U85.yml b/.github/workflows/Test_RPS_SSE-320-U85.yml index 80615e0..5531d62 100644 --- a/.github/workflows/Test_RPS_SSE-320-U85.yml +++ b/.github/workflows/Test_RPS_SSE-320-U85.yml @@ -62,7 +62,6 @@ jobs: working-directory: ./ run: | cpackget add ./packs/PyTorch.ExecuTorch.1.1.0-rc1-build.12/PyTorch.ExecuTorch.pdsc --agree-embedded-license - cpackget add ./packs/AlifSemiconductor.Ensemble.2.2.0-dev8+g560eb47.pack --agree-embedded-license - name: Build the target-set working-directory: ./RockPaperScissors/AppKit-E8_USB diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/Board_HP-U85.clayer.yml b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/Board_HP-U85.clayer.yml index 9690618..deeabfc 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/Board_HP-U85.clayer.yml +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/Board_HP-U85.clayer.yml @@ -33,11 +33,11 @@ layer: # List the packs used in the layer. packs: - - pack: AlifSemiconductor::Ensemble@^2.1.1-0 + - pack: AlifSemiconductor::Ensemble@^2.2.0-0 - pack: ARM::CMSIS@^6.2.0 - pack: ARM::CMSIS-Compiler@^2.1.0 - pack: ARM::CMSIS-Driver@^2.10.0 - - pack: ARM::ethos-u-core-driver@1.25.2 + - pack: ARM::ethos-u-core-driver@^1.26.2 # List miscellaneous options passed via the command line to the build tool. misc: @@ -90,6 +90,9 @@ layer: - component: Machine Learning:NPU Support:Ethos-U Driver&Generic U85 + - component: Services:Retarget IO:STDERR + - component: Services:Retarget IO:STDIN + - component: Services:Retarget IO:STDOUT - component: Services:Secure Enclave:core&Source - component: Services:Secure Enclave:Initialization Helper&Source diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/Board_HP.clayer.yml b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/Board_HP.clayer.yml index b3707cb..cec6265 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/Board_HP.clayer.yml +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/Board_HP.clayer.yml @@ -41,11 +41,11 @@ layer: # List the packs used in the layer. packs: - - pack: AlifSemiconductor::Ensemble@^2.1.1-0 + - pack: AlifSemiconductor::Ensemble@^2.2.0-0 - pack: ARM::CMSIS@^6.2.0 - pack: ARM::CMSIS-Compiler@^2.1.0 - pack: ARM::CMSIS-Driver@^2.10.0 - - pack: ARM::ethos-u-core-driver@1.25.2 + - pack: ARM::ethos-u-core-driver@^1.26.2 # List miscellaneous options passed via the command line to the build tool. misc: @@ -98,6 +98,9 @@ layer: - component: Machine Learning:NPU Support:Ethos-U Driver&Generic U55 + - component: Services:Retarget IO:STDERR + - component: Services:Retarget IO:STDIN + - component: Services:Retarget IO:STDOUT - component: Services:Secure Enclave:core&Source - component: Services:Secure Enclave:Initialization Helper&Source diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/board_defs.h b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/board_defs.h index 67fafa9..6a03517 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/board_defs.h +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/board_defs.h @@ -1,4 +1,4 @@ -/* +/* * Copyright (C) 2025 Alif Semiconductor - All Rights Reserved. * Use, distribution and modification of this code is permitted under the * terms stated in the Alif Semiconductor Software License Agreement @@ -1150,21 +1150,21 @@ // <6=> PIN6 <7=> PIN7 #define BOARD_CLICKBOARD_RST_GPIO_PIN 3 -// "ICM_IMU_IRQ" GPIO port number <0=> GPIO0 <1=> GPIO1 <2=> GPIO2 <3=> GPIO3 <4=> GPIO4 <5=> -// GPIO5 <6=> GPIO6 <7=> GPIO7 <8=> GPIO8 <9=> GPIO9 <10=> GPIO10 <11=> GPIO11 <12=> GPIO12 <13=> -// GPIO13 <14=> GPIO14 <15=> LPGPIO -#define BOARD_ICM_IMU_IRQ_GPIO_PORT 8 -// "ICM_IMU_IRQ" GPIO pin number <0=> PIN0 <1=> PIN1 <2=> PIN2 <3=> PIN3 <4=> PIN4 <5=> PIN5 -// <6=> PIN6 <7=> PIN7 -#define BOARD_ICM_IMU_IRQ_GPIO_PIN 4 +// "ICM42670_IMU_IRQ" GPIO port number <0=> GPIO0 <1=> GPIO1 <2=> GPIO2 <3=> GPIO3 <4=> GPIO4 +// <5=> GPIO5 <6=> GPIO6 <7=> GPIO7 <8=> GPIO8 <9=> GPIO9 <10=> GPIO10 <11=> GPIO11 <12=> GPIO12 +// <13=> GPIO13 <14=> GPIO14 <15=> LPGPIO +#define BOARD_ICM42670_IMU_IRQ_GPIO_PORT 1 +// "ICM42670_IMU_IRQ" GPIO pin number <0=> PIN0 <1=> PIN1 <2=> PIN2 <3=> PIN3 <4=> PIN4 +// <5=> PIN5 <6=> PIN6 <7=> PIN7 +#define BOARD_ICM42670_IMU_IRQ_GPIO_PIN 5 -// "BMI_IMU_IRQ" GPIO port number <0=> GPIO0 <1=> GPIO1 <2=> GPIO2 <3=> GPIO3 <4=> GPIO4 <5=> +// "BMI323_IMU_IRQ" GPIO port number <0=> GPIO0 <1=> GPIO1 <2=> GPIO2 <3=> GPIO3 <4=> GPIO4 <5=> // GPIO5 <6=> GPIO6 <7=> GPIO7 <8=> GPIO8 <9=> GPIO9 <10=> GPIO10 <11=> GPIO11 <12=> GPIO12 <13=> // GPIO13 <14=> GPIO14 <15=> LPGPIO -#define BOARD_BMI_IMU_IRQ_GPIO_PORT 8 -// "BMI_IMU_IRQ" GPIO pin number <0=> PIN0 <1=> PIN1 <2=> PIN2 <3=> PIN3 <4=> PIN4 <5=> PIN5 +#define BOARD_BMI323_IMU_IRQ_GPIO_PORT 1 +// "BMI323_IMU_IRQ" GPIO pin number <0=> PIN0 <1=> PIN1 <2=> PIN2 <3=> PIN3 <4=> PIN4 <5=> PIN5 // <6=> PIN6 <7=> PIN7 -#define BOARD_BMI_IMU_IRQ_GPIO_PIN 5 +#define BOARD_BMI323_IMU_IRQ_GPIO_PIN 4 // "CAMERA_RESET" GPIO port number <0=> GPIO0 <1=> GPIO1 <2=> GPIO2 <3=> GPIO3 <4=> GPIO4 <5=> // GPIO5 <6=> GPIO6 <7=> GPIO7 <8=> GPIO8 <9=> GPIO9 <10=> GPIO10 <11=> GPIO11 <12=> GPIO12 <13=> @@ -1174,6 +1174,22 @@ // <6=> PIN6 <7=> PIN7 #define BOARD_CAMERA_RESET_GPIO_PIN 1 +// "LCD_RESET" GPIO port number <0=> GPIO0 <1=> GPIO1 <2=> GPIO2 <3=> GPIO3 <4=> GPIO4 <5=> +// GPIO5 <6=> GPIO6 <7=> GPIO7 <8=> GPIO8 <9=> GPIO9 <10=> GPIO10 <11=> GPIO11 <12=> GPIO12 <13=> +// GPIO13 <14=> GPIO14 <15=> LPGPIO +#define BOARD_LCD_RESET_GPIO_PORT 15 +// "LCD_RESET" GPIO pin number <0=> PIN0 <1=> PIN1 <2=> PIN2 <3=> PIN3 <4=> PIN4 <5=> PIN5 +// <6=> PIN6 <7=> PIN7 +#define BOARD_LCD_RESET_GPIO_PIN 5 + +// "LCD_BL_LED" GPIO port number <0=> GPIO0 <1=> GPIO1 <2=> GPIO2 <3=> GPIO3 <4=> GPIO4 <5=> +// GPIO5 <6=> GPIO6 <7=> GPIO7 <8=> GPIO8 <9=> GPIO9 <10=> GPIO10 <11=> GPIO11 <12=> GPIO12 <13=> +// GPIO13 <14=> GPIO14 <15=> LPGPIO +#define BOARD_LCD_BL_LED_GPIO_PORT 6 +// "LCD_BL_LED" GPIO pin number <0=> PIN0 <1=> PIN1 <2=> PIN2 <3=> PIN3 <4=> PIN4 <5=> PIN5 +// <6=> PIN6 <7=> PIN7 +#define BOARD_LCD_BL_LED_GPIO_PIN 1 + // "CAMERA_FLASH" GPIO port number <0=> GPIO0 <1=> GPIO1 <2=> GPIO2 <3=> GPIO3 <4=> GPIO4 <5=> // GPIO5 <6=> GPIO6 <7=> GPIO7 <8=> GPIO8 <9=> GPIO9 <10=> GPIO10 <11=> GPIO11 <12=> GPIO12 <13=> // GPIO13 <14=> GPIO14 <15=> LPGPIO diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/board_defs.h.base@2.1.0 b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/board_defs.h.base@2.2.0 similarity index 97% rename from RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/board_defs.h.base@2.1.0 rename to RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/board_defs.h.base@2.2.0 index 67fafa9..41911e0 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/board_defs.h.base@2.1.0 +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/board_defs.h.base@2.2.0 @@ -1,4 +1,4 @@ -/* +/* * Copyright (C) 2025 Alif Semiconductor - All Rights Reserved. * Use, distribution and modification of this code is permitted under the * terms stated in the Alif Semiconductor Software License Agreement @@ -1150,21 +1150,21 @@ // <6=> PIN6 <7=> PIN7 #define BOARD_CLICKBOARD_RST_GPIO_PIN 3 -// "ICM_IMU_IRQ" GPIO port number <0=> GPIO0 <1=> GPIO1 <2=> GPIO2 <3=> GPIO3 <4=> GPIO4 <5=> -// GPIO5 <6=> GPIO6 <7=> GPIO7 <8=> GPIO8 <9=> GPIO9 <10=> GPIO10 <11=> GPIO11 <12=> GPIO12 <13=> -// GPIO13 <14=> GPIO14 <15=> LPGPIO -#define BOARD_ICM_IMU_IRQ_GPIO_PORT 8 -// "ICM_IMU_IRQ" GPIO pin number <0=> PIN0 <1=> PIN1 <2=> PIN2 <3=> PIN3 <4=> PIN4 <5=> PIN5 -// <6=> PIN6 <7=> PIN7 -#define BOARD_ICM_IMU_IRQ_GPIO_PIN 4 +// "ICM42670_IMU_IRQ" GPIO port number <0=> GPIO0 <1=> GPIO1 <2=> GPIO2 <3=> GPIO3 <4=> GPIO4 +// <5=> GPIO5 <6=> GPIO6 <7=> GPIO7 <8=> GPIO8 <9=> GPIO9 <10=> GPIO10 <11=> GPIO11 <12=> GPIO12 +// <13=> GPIO13 <14=> GPIO14 <15=> LPGPIO +#define BOARD_ICM42670_IMU_IRQ_GPIO_PORT 1 +// "ICM42670_IMU_IRQ" GPIO pin number <0=> PIN0 <1=> PIN1 <2=> PIN2 <3=> PIN3 <4=> PIN4 +// <5=> PIN5 <6=> PIN6 <7=> PIN7 +#define BOARD_ICM42670_IMU_IRQ_GPIO_PIN 5 -// "BMI_IMU_IRQ" GPIO port number <0=> GPIO0 <1=> GPIO1 <2=> GPIO2 <3=> GPIO3 <4=> GPIO4 <5=> +// "BMI323_IMU_IRQ" GPIO port number <0=> GPIO0 <1=> GPIO1 <2=> GPIO2 <3=> GPIO3 <4=> GPIO4 <5=> // GPIO5 <6=> GPIO6 <7=> GPIO7 <8=> GPIO8 <9=> GPIO9 <10=> GPIO10 <11=> GPIO11 <12=> GPIO12 <13=> // GPIO13 <14=> GPIO14 <15=> LPGPIO -#define BOARD_BMI_IMU_IRQ_GPIO_PORT 8 -// "BMI_IMU_IRQ" GPIO pin number <0=> PIN0 <1=> PIN1 <2=> PIN2 <3=> PIN3 <4=> PIN4 <5=> PIN5 +#define BOARD_BMI323_IMU_IRQ_GPIO_PORT 1 +// "BMI323_IMU_IRQ" GPIO pin number <0=> PIN0 <1=> PIN1 <2=> PIN2 <3=> PIN3 <4=> PIN4 <5=> PIN5 // <6=> PIN6 <7=> PIN7 -#define BOARD_BMI_IMU_IRQ_GPIO_PIN 5 +#define BOARD_BMI323_IMU_IRQ_GPIO_PIN 4 // "CAMERA_RESET" GPIO port number <0=> GPIO0 <1=> GPIO1 <2=> GPIO2 <3=> GPIO3 <4=> GPIO4 <5=> // GPIO5 <6=> GPIO6 <7=> GPIO7 <8=> GPIO8 <9=> GPIO9 <10=> GPIO10 <11=> GPIO11 <12=> GPIO12 <13=> diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/gpios.h b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/gpios.h index aea419f..282f8f1 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/gpios.h +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/gpios.h @@ -275,9 +275,9 @@ const struct gpioconf board_gpioconf[] = { (1 << PIN_7) | (1 << PIN_6) | (1 << PIN_5), (1 << PIN_4) | (1 << PIN_3) | (1 << PIN_2) | (1 << PIN_1) | (1 << PIN_0), (1 << PIN_4) | (1 << PIN_3) | (1 << PIN_2) | (1 << PIN_1) | (1 << PIN_0), - (1 << PIN_4) | (1 << PIN_3) | (1 << PIN_1) | (1 << PIN_0), + (1 << PIN_4) | (1 << PIN_3) | (1 << PIN_2) | (1 << PIN_1) | (1 << PIN_0), + 0, 0, - (1 << PIN_2), }}; #endif /* __GPIOS_H__ */ diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/gpios.h.base@2.1.0 b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/gpios.h.base@2.2.0 similarity index 96% rename from RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/gpios.h.base@2.1.0 rename to RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/gpios.h.base@2.2.0 index aea419f..282f8f1 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/gpios.h.base@2.1.0 +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/gpios.h.base@2.2.0 @@ -275,9 +275,9 @@ const struct gpioconf board_gpioconf[] = { (1 << PIN_7) | (1 << PIN_6) | (1 << PIN_5), (1 << PIN_4) | (1 << PIN_3) | (1 << PIN_2) | (1 << PIN_1) | (1 << PIN_0), (1 << PIN_4) | (1 << PIN_3) | (1 << PIN_2) | (1 << PIN_1) | (1 << PIN_0), - (1 << PIN_4) | (1 << PIN_3) | (1 << PIN_1) | (1 << PIN_0), + (1 << PIN_4) | (1 << PIN_3) | (1 << PIN_2) | (1 << PIN_1) | (1 << PIN_0), + 0, 0, - (1 << PIN_2), }}; #endif /* __GPIOS_H__ */ diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/pins.h.base@2.1.0 b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/pins.h.base@2.2.0 similarity index 100% rename from RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/pins.h.base@2.1.0 rename to RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/BSP/AE822FA0E5597BS0_M55_HP/pins.h.base@2.2.0 diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/RTE_Device.h b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/RTE_Device.h index ec486f3..9866b2c 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/RTE_Device.h +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/RTE_Device.h @@ -16,9 +16,6 @@ // MRAM (NVM (Non-Volatile Memory)) [Driver_MRAM] // Configuration settings for Driver_MRAM in component ::Drivers:MRAM #define RTE_MRAM 1 -#if RTE_MRAM -#define RTE_MRAM_SIZE 0x00580000 -#endif // MRAM (NVM (Non-Volatile Memory)) [Driver_MRAM] // CPI (Camera) [Driver_CPI] @@ -103,6 +100,17 @@ // Default: 0x1 #define RTE_CPI_VFP_EN 0 +// CPI number of active framebuffers +// Defines CPI number of active framebuffers +// Default: 2 +#define RTE_CPI_NUM_ACTIVE_FRAMEBUFFERS 0 + +// Enable CPI streaming +// <0=> Disable +// <1=> Enable +// Default: 1 +#define RTE_CPI_STREAMING_ENABLE 0 + // MT9M114 [Driver_MT9M114] // Enable/Disable MT9M114 camera sensor // <0=> disable @@ -371,14 +379,14 @@ // <1=> enable // defines if AE Module is enabled or not // default: false -#define RTE_ISP_AE_MODULE 0 +#define RTE_ISP_AE_MODULE 1 // ISP Enable BLS Module // <0=> disable // <1=> enable // defines if Black Level Subtraction Module is enabled or not // default: false -#define RTE_ISP_BLS_MODULE 0 +#define RTE_ISP_BLS_MODULE 1 // ISP Enable DMSC Module // <0=> disable @@ -392,7 +400,7 @@ // <1=> enable // defines if Noise/Sharpening-Filter Module is enabled or not // default: false -#define RTE_ISP_FLT_MODULE 0 +#define RTE_ISP_FLT_MODULE 1 // ISP Enable CCM Module // <0=> disable @@ -406,7 +414,7 @@ // <1=> enable // defines if Color Space Conversion Module is enabled or not // default: false -#define RTE_ISP_CSM_MODULE 0 +#define RTE_ISP_CSM_MODULE 1 // ISP Enable WB Module // <0=> disable @@ -420,14 +428,14 @@ // <1=> enable // defines if Auto-Exposure Statistics Module is enabled or not // default: false -#define RTE_ISP_EXPM_MODULE 0 +#define RTE_ISP_EXPM_MODULE 1 // ISP Enable Gamma-out Module // <0=> disable // <1=> enable // defines if Gamma-out Module is enabled or not // default: false -#define RTE_ISP_GAMMAOUT_MODULE 0 +#define RTE_ISP_GAMMAOUT_MODULE 1 // ISP Enable WBM Module // <0=> disable @@ -441,7 +449,7 @@ // <1=> enable // defines if Binning Module is enabled or not // default: false -#define RTE_ISP_BINNING_MODULE 0 +#define RTE_ISP_BINNING_MODULE 1 // ISP Enable Scaling Module // <0=> disable @@ -482,9 +490,41 @@ // Default: RGB888 #define RTE_ISP_OUTPUT_FORMAT 32 -#define RTE_ISP_OUTPUT_WIDTH 480 - -#define RTE_ISP_OUTPUT_HEIGHT 480 +// ISP Scaler Output Width +// Width in pixels of the ISP scaler output (after scaling from sensor dimensions). +#define RTE_ISP_OUTPUT_WIDTH 480 + +// ISP Scaler Output Height +// Height in pixels of the ISP scaler output (after scaling from sensor dimensions). +#define RTE_ISP_OUTPUT_HEIGHT 480 + +// ISP Sensor Input Width +// Width in pixels of the sensor input to the ISP pipeline. +// Default: MT9M114 sensor resolution (1280). Change for different sensors. +#define RTE_ISP_SENSOR_INPUT_WIDTH RTE_MT9M114_CAMERA_SENSOR_FRAME_WIDTH + +// ISP Sensor Input Height +// Height in pixels of the sensor input to the ISP pipeline. +// Default: MT9M114 sensor resolution (720). Change for different sensors. +#define RTE_ISP_SENSOR_INPUT_HEIGHT RTE_MT9M114_CAMERA_SENSOR_FRAME_HEIGHT + +// ISP Crop Top offset <0-4095> +// Top offset in pixels for the cropped output window +#define RTE_ISP_CROP_TOP 0 + +// ISP Crop Left offset <0-4095> +// Left offset in pixels for the cropped output window +#define RTE_ISP_CROP_LEFT 0 + +// ISP Crop Width <1-4095> +// Width in pixels of the cropped output window. +// Default: full sensor input (no crop). Override with smaller value to crop. +#define RTE_ISP_CROP_WIDTH RTE_ISP_SENSOR_INPUT_WIDTH + +// ISP Crop Height <1-4095> +// Height in pixels of the cropped output window. +// Default: full sensor input (no crop). Override with smaller value to crop. +#define RTE_ISP_CROP_HEIGHT RTE_ISP_SENSOR_INPUT_HEIGHT #endif // ISP (ISP) [Driver_ISP] @@ -494,11 +534,18 @@ #define RTE_MIPI_CSI2 1 #if RTE_MIPI_CSI2 +// Select CSI2 DPHY backend +// <0=> CSI2 RX DPHY +// <1=> DSI TX DPHY used as RX +// Selects which DPHY hardware is used by Driver_MIPI_CSI2. +// Default: CSI2 RX DPHY +#define RTE_MIPI_CSI2_DPHY_BACKEND 0 + // CSI pixel clock select -// <0=> 400 MHz clock source (PLL_CLK1/2) -// <1=> 480 MHz clock source (PLL_CLK3) +// <0=> Select AXI clock source +// <1=> Select PLL clock source // Defines CSI pixel clock select -// Default: 400 MHz clock source (PLL_CLK1/2) +// Default: Select AXI clock source #define RTE_CSI2_PIX_CLK_SEL 0 // select IPI mode @@ -711,26 +758,6 @@ // Default: 20 #define RTE_ARX3A0_CAMERA_SENSOR_CSI_CLK_SCR_DIV 20 -// Select camera sensor ARX3A0 reset pin number -// Defines camera sensor ARX3A0 reset pin number -// Default: 1 -#define RTE_ARX3A0_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor ARX3A0 reset GPIO port -// Defines camera sensor ARX3A0 reset GPIO port -// Default: 9 -#define RTE_ARX3A0_CAMERA_SENSOR_RESET_GPIO_PORT 9 - -// Select camera sensor ARX3A0 power pin number -// Defines camera sensor ARX3A0 power pin number -// Default: 5 -#define RTE_ARX3A0_CAMERA_SENSOR_POWER_PIN_NO 5 - -// Select camera sensor ARX3A0 power GPIO port -// Defines camera sensor ARX3A0 power GPIO port -// Default: 7 -#define RTE_ARX3A0_CAMERA_SENSOR_POWER_GPIO_PORT 7 - // RTE_ARX3A0_CAMERA_SENSOR_I2C_INSTANCE // Defines camera sensor ARX3A0 i2c instance // <0=> I2C0 @@ -799,26 +826,6 @@ // Default: 20 #define RTE_AR0144_CAMERA_SENSOR_CSI_CLK_SCR_DIV 20 -// Select camera sensor AR0144 reset pin number -// Defines camera sensor AR0144 reset pin number -// Default: 5 -#define RTE_AR0144_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor AR0144 reset GPIO port -// Defines camera sensor AR0144 reset GPIO port -// Default: 4 -#define RTE_AR0144_CAMERA_SENSOR_RESET_GPIO_PORT 9 - -// Select camera sensor AR0144 power pin number -// Defines camera sensor AR0144 power pin number -// Default: 5 -#define RTE_AR0144_CAMERA_SENSOR_POWER_PIN_NO 5 - -// Select camera sensor AR0144 power GPIO port -// Defines camera sensor AR0144 power GPIO port -// Default: 7 -#define RTE_AR0144_CAMERA_SENSOR_POWER_GPIO_PORT 7 - // RTE_AR0144_CAMERA_SENSOR_I2C_INSTANCE // Defines camera sensor AR0144 i2c instance // <0=> I2C0 @@ -886,26 +893,6 @@ // Default: 16 #define RTE_AR0145_CAMERA_SENSOR_CSI_CLK_SCR_DIV 16 -// Select camera sensor AR0145 reset pin number -// Defines camera sensor AR0145 reset pin number -// Default: 1 -#define RTE_AR0145_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor AR0145 reset GPIO port -// Defines camera sensor AR0145 reset GPIO port -// Default: 9 -#define RTE_AR0145_CAMERA_SENSOR_RESET_GPIO_PORT 9 - -// Select camera sensor AR0145 power pin number -// Defines camera sensor AR0145 power pin number -// Default: 5 -#define RTE_AR0145_CAMERA_SENSOR_POWER_PIN_NO 5 - -// Select camera sensor AR0145 power GPIO port -// Defines camera sensor AR0145 power GPIO port -// Default: 7 -#define RTE_AR0145_CAMERA_SENSOR_POWER_GPIO_PORT 7 - // RTE_AR0145_CAMERA_SENSOR_I2C_INSTANCE // Defines camera sensor AR0145 i2c instance // <0=> I2C0 @@ -974,26 +961,6 @@ // Default: 15 #define RTE_AR0246_CAMERA_SENSOR_CSI_CLK_SCR_DIV 15 -// Select camera sensor AR0246 reset pin number -// Defines camera sensor AR0246 reset pin number -// Default: 1 -#define RTE_AR0246_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor AR0246 reset GPIO port -// Defines camera sensor AR0246 reset GPIO port -// Default: 9 -#define RTE_AR0246_CAMERA_SENSOR_RESET_GPIO_PORT 9 - -// Select camera sensor AR0246 power pin number -// Defines camera sensor AR0246 power pin number -// Default: 5 -#define RTE_AR0246_CAMERA_SENSOR_POWER_PIN_NO 5 - -// Select camera sensor AR0246 power GPIO port -// Defines camera sensor AR0246 power GPIO port -// Default: 7 -#define RTE_AR0246_CAMERA_SENSOR_POWER_GPIO_PORT 7 - // RTE_AR0246_CAMERA_SENSOR_I2C_INSTANCE // Defines camera sensor AR0246 i2c instance // <0=> I2C0 @@ -1030,11 +997,8 @@ // <3=> 640x480_RGB565 // <4=> 320x240_RGB565 // <5=> 320x320_RGB565 -#if !IS_DATACAPTURE +// Default: 1 #define RTE_MT9M114_CAMERA_SENSOR_MIPI_IMAGE_CONFIG 2 -#else -#define RTE_MT9M114_CAMERA_SENSOR_MIPI_IMAGE_CONFIG 1 -#endif // select MT9M114 MIPI number of lanes in DPHY // defines select MT9M114 MIPI number of lanes in DPHY. @@ -1061,26 +1025,6 @@ // Default: 20 #define RTE_MT9M114_CAMERA_SENSOR_MIPI_CSI_CLK_SCR_DIV 20 -// Select camera sensor MT9M114 MIPI reset pin number -// Defines camera sensor MT9M114 MIPI reset pin number -// Default: 1 -#define RTE_MT9M114_CAMERA_SENSOR_MIPI_RESET_PIN_NO 4 - -// Select camera sensor MT9M114 MIPI reset GPIO port -// Defines camera sensor MT9M114 MIPI reset GPIO port -// Default: 9 -#define RTE_MT9M114_CAMERA_SENSOR_MIPI_RESET_GPIO_PORT 14 - -// Select camera sensor MT9M114 MIPI power pin number -// Defines camera sensor MT9M114 MIPI power pin number -// Default: 5 -#define RTE_MT9M114_CAMERA_SENSOR_MIPI_POWER_PIN_NO 5 - -// Select camera sensor MT9M114 MIPI power GPIO port -// Defines camera sensor MT9M114 MIPI power GPIO port -// Default: 7 -#define RTE_MT9M114_CAMERA_SENSOR_MIPI_POWER_GPIO_PORT 7 - // RTE_MT9M114_CAMERA_SENSOR_MIPI_I2C_INSTANCE // Defines camera sensor MT9M114 MIPI i2c instance // <0=> I2C0 @@ -1091,6 +1035,14 @@ // Default: 1 #define RTE_MT9M114_CAMERA_SENSOR_MIPI_I2C_INSTANCE 1 +// MT9M114 sensor frame width for ISP / CSI2 pipeline +// Width in pixels of the MT9M114 MIPI sensor frame +#define RTE_MT9M114_CAMERA_SENSOR_FRAME_WIDTH 1280 + +// MT9M114 sensor frame height for ISP / CSI2 pipeline +// Height in pixels of the MT9M114 MIPI sensor frame +#define RTE_MT9M114_CAMERA_SENSOR_FRAME_HEIGHT 720 + #endif // MT9M114_MIPI [Driver_MT9M114_MIPI] @@ -1170,36 +1122,6 @@ #define RTE_HM0360_CAMERA_SENSOR_FRAME_WIDTH 320 #endif -// Select camera sensor HM0360 reset pin number -// Defines camera sensor HM0360 reset pin number -// Default: 1 -#define RTE_HM0360_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor HM0360 reset GPIO port -// Defines camera sensor HM0360 reset GPIO port -// Default: 9 -#define RTE_HM0360_CAMERA_SENSOR_RESET_GPIO_PORT 9 - -// Select camera sensor HM0360 power pin number -// Defines camera sensor HM0360 power pin number -// Default: 5 -#define RTE_HM0360_CAMERA_SENSOR_POWER_PIN_NO 5 - -// Select camera sensor HM0360 power GPIO port -// Defines camera sensor HM0360 power GPIO port -// Default: 7 -#define RTE_HM0360_CAMERA_SENSOR_POWER_GPIO_PORT 7 - -// Select camera sensor HM0360 xsleep pin number -// Defines camera sensor HM0360 xsleep pin number -// Default: 3 -#define RTE_HM0360_CAMERA_SENSOR_XSLEEP_PIN_NO 3 - -// Select camera sensor HM0360 xsleep GPIO port -// Defines camera sensor HM0360 xsleep GPIO port -// Default: 6 -#define RTE_HM0360_CAMERA_SENSOR_XSLEEP_GPIO_PORT 6 - // RTE_HM0360_CAMERA_SENSOR_I2C_INSTANCE // Defines camera sensor HM0360 i2c instance // <0=> I2C0 @@ -1263,16 +1185,6 @@ // default: 640 #define RTE_OV5647_CAMERA_SENSOR_FRAME_WIDTH 640 -// Select camera sensor OV5647 reset pin number -// Defines camera sensor OV5647 reset pin number -// Default: 1 -#define RTE_OV5647_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor OV5647 reset GPIO port -// Defines camera sensor OV5647 reset GPIO port -// Default: 9 -#define RTE_OV5647_CAMERA_SENSOR_RESET_GPIO_PORT 9 - // Select camera sensor OV5647 i2c instance // Defines camera sensor OV5647 i2c instance // <0=> I2C0 @@ -1336,26 +1248,6 @@ // default: 1296 #define RTE_OV5675_CAMERA_SENSOR_FRAME_WIDTH 1296 -// Select camera sensor OV5675 reset pin number -// Defines camera sensor OV5675 reset pin number -// Default: 1 -#define RTE_OV5675_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor OV5675 reset GPIO port -// Defines camera sensor OV5675 reset GPIO port -// Default: 9 -#define RTE_OV5675_CAMERA_SENSOR_RESET_GPIO_PORT 9 - -// Select camera sensor OV5675 power pin number -// Defines camera sensor OV5675 power pin number -// Default: 5 -#define RTE_OV5675_CAMERA_SENSOR_POWER_PIN_NO 5 - -// Select camera sensor OV5675 power GPIO port -// Defines camera sensor OV5675 power GPIO port -// Default: 7 -#define RTE_OV5675_CAMERA_SENSOR_POWER_GPIO_PORT 7 - // Select camera sensor OV5675 i2c instance // Defines camera sensor OV5675 i2c instance // <0=> I2C0 @@ -1366,6 +1258,11 @@ // Default: 1 #define RTE_OV5675_CAMERA_SENSOR_I2C_INSTANCE 1 +// Select camera sensor OV5675 CSI clock source division [Divisor] <2-511> +// Defines camera sensor OV5675 CSI clock source division +// Default: 20 +#define RTE_OV5675_CAMERA_SENSOR_MIPI_CSI_CLK_SCR_DIV 20 + #endif // OV5675_MIPI [Driver_OV5675_MIPI] @@ -1464,26 +1361,6 @@ // Default: 0 #define RTE_ILI9806E_PANEL_DSI_VC_ID 0 -// ILI9806 LCD panel reset pin number -// Defines ILI9806 LCD panel reset pin number. -// Default: 5 -#define RTE_ILI9806E_PANEL_RESET_PIN_NO 5 - -// ILI9806 LCD panel reset pin GPIO port number -// Defines ILI9806 LCD panel reset pin GPIO port number. -// Default: 15 -#define RTE_ILI9806E_PANEL_RESET_GPIO_PORT 15 - -// ILI9806 LCD panel back light pin number -// Defines ILI9806 LCD panel back light pin number. -// Default: 1 -#define RTE_ILI9806E_PANEL_BL_LED_PIN_NO 1 - -// ILI9806 LCD panel back light pin GPIO port number -// Defines ILI9806 LCD panel back light pin GPIO port number. -// Default: 6 -#define RTE_ILI9806E_PANEL_BL_LED_GPIO_PORT 6 - // MIPI_DSI (ILI9806E_PANEL_E43RB_FW405 | ILI9806E_PANEL_E43GB_MW405) [Driver_ILI9806E_PANEL] #if (RTE_ILI9806E_PANEL_E43RB_FW405_EN || RTE_ILI9806E_PANEL_E43GB_MW405_EN) @@ -1600,26 +1477,6 @@ // Default: 0 #define RTE_ILI9488_PANEL_DSI_VC_ID 0 -// ILI9488 LCD panel reset pin number -// Defines ILI9488 LCD panel reset pin number. -// Default: 5 -#define RTE_ILI9488_PANEL_RESET_PIN_NO 5 - -// ILI9488 LCD panel reset pin GPIO port number -// Defines ILI9488 LCD panel reset pin GPIO port number. -// Default: 15 -#define RTE_ILI9488_PANEL_RESET_GPIO_PORT 15 - -// ILI9488 LCD panel back light pin number -// Defines ILI9488 LCD panel back light pin number. -// Default: 1 -#define RTE_ILI9488_PANEL_BL_LED_PIN_NO 1 - -// ILI9488 LCD panel back light pin GPIO port number -// Defines ILI9488 LCD panel back light pin GPIO port number. -// Default: 6 -#define RTE_ILI9488_PANEL_BL_LED_GPIO_PORT 6 - // Panel hsync time in pixels // Defines ILI9488 LCD panel hsync time in pixels. // Default: 10 @@ -1717,10 +1574,10 @@ #define RTE_CDC200_IRQ_PRI 0 // CDC200 clock select -// <0=> 400 MHz clock source (PLL_CLK1/2) -// <1=> 480 MHz clock source (PLL_CLK3) +// <0=> Select AXI clock source +// <1=> Select PLL clock source // Defines CDC200 clock select -// Default: 400 MHz clock source (PLL_CLK1/2) +// Default: Select AXI clock source #define RTE_CDC200_CLK_SEL 0 // CDC200 background color red <0-255> @@ -1969,21 +1826,6 @@ // Default: DISABLE #define RTE_ICM42670_IBI_ENABLE 0 -#if !RTE_ICM42670_IBI_ENABLE - -// ICM42670 IMU INT pin GPIO port number range <0-15> -// Defines ICM42670 IMU INT pin GPIO port number. -// <1=> Port number for E8 Appkit -// <8=> Port number for E8 Devkit -// Default: 8 -#define RTE_ICM42670_INT_IO_PORT 8 - -// ICM42670 IMU INT pin number range <0-7> -// Defines ICM42670 IMU INT pin number. -// Default: 5 -#define RTE_ICM42670_INT_PIN_NO 5 -#endif - #endif // ICM42670 (Initial Measurement Unit) [Driver_ICM42670] @@ -1991,21 +1833,6 @@ // Configuration settings for Driver_BMI323 in component ::Drivers:IMU #define RTE_BMI323 1 -#if RTE_BMI323 - -// BMI323 IMU INT pin GPIO port number range <0-15> -// Defines BMI323 IMU INT pin GPIO port number. -// <1=> Port number for E8 Appkit -// <8=> Port number for E8 Devkit -// Default: 8 -#define RTE_BMI323_INT_IO_PORT 8 - -// BMI323 IMU INT pin number range <0-7> -// Defines BMI323 IMU INT pin number. -// Default: 4 -#define RTE_BMI323_INT_PIN_NO 4 - -#endif // BMI323 (Initial Measurement Unit) [Driver_BMI323] #endif // IMU (Initial Measurement Unit) [Driver_IMU] @@ -2704,7 +2531,7 @@ // <1=> Dual SPI FRF // <2=> Quad SPI FRF // <3=> Octal SPI FRF -// <3=> Dual Octal SPI FRF +// <4=> Dual Octal SPI FRF // Defines OSPI0 Frame format // Default: Octal SPI FRF #define RTE_OSPI0_SPI_FRAME_FORMAT 3 @@ -2813,7 +2640,7 @@ // <1=> Dual SPI FRF // <2=> Quad SPI FRF // <3=> Octal SPI FRF -// <3=> Dual Octal SPI FRF +// <4=> Dual Octal SPI FRF // Defines OSPI0 Frame format // Default: Octal SPI FRF #define RTE_OSPI1_SPI_FRAME_FORMAT 3 @@ -3819,7 +3646,7 @@ // <1=> ENABLE // Defines Blocking mode support for UART4 // Default: DISABLE -#define RTE_UART4_BLOCKING_MODE_ENABLE 0 +#define RTE_UART4_BLOCKING_MODE_ENABLE 1 #endif // UART4 @@ -9402,6 +9229,15 @@ // Default: 100 #define RTE_CH201_RTC_CAL_PULSE_MS 100 +// CH201 LPTIMER channel for Timeout trigger +// Defines LPTIMER's channel number for CH201 Timeout trigger +// <0=> LPTIMER_CHANNEL_0 +// <1=> LPTIMER_CHANNEL_1 +// <2=> LPTIMER_CHANNEL_2 +// <3=> LPTIMER_CHANNEL_3 +// Default: 1 +#define RTE_CH201_LPTIMER_CHANNEL 1 + #endif // CH201 (Time of Flight Sensor) [Driver_CH201] @@ -10575,7 +10411,7 @@ // <1=> ENABLED // Defines Bit Manipulation Control for GPIO13. // Default: DISABLED -#define RTE_GPIO13_BIT_MANIPULATION 1 +#define RTE_GPIO13_BIT_MANIPULATION 0 // GPIO13_PIN1 IRQ Priority // Defines Interrupt priority for GPIO13_PIN1. diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/RTE_Device.h.base@2.1.0 b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/RTE_Device.h.base@2.2.0 similarity index 94% rename from RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/RTE_Device.h.base@2.1.0 rename to RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/RTE_Device.h.base@2.2.0 index 11fc182..c08e58c 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/RTE_Device.h.base@2.1.0 +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/RTE_Device.h.base@2.2.0 @@ -1,4 +1,4 @@ -/* Copyright (C) 2025 Alif Semiconductor - All Rights Reserved. +/* Copyright (C) 2025 Alif Semiconductor - All Rights Reserved. * Use, distribution and modification of this code is permitted under the * terms stated in the Alif Semiconductor Software License Agreement * @@ -16,9 +16,6 @@ // MRAM (NVM (Non-Volatile Memory)) [Driver_MRAM] // Configuration settings for Driver_MRAM in component ::Drivers:MRAM #define RTE_MRAM 1 -#if RTE_MRAM -#define RTE_MRAM_SIZE 0x00580000 -#endif // MRAM (NVM (Non-Volatile Memory)) [Driver_MRAM] // CPI (Camera) [Driver_CPI] @@ -43,7 +40,7 @@ // <1=> enable // Defines CPI AXI port // Default: AXI port enable -#define RTE_CPI_AXI_PORT 1 +#define RTE_CPI_AXI_PORT 0 // Select CPI ISP port // <0=> disable @@ -103,6 +100,17 @@ // Default: 0x1 #define RTE_CPI_VFP_EN 0 +// CPI number of active framebuffers +// Defines CPI number of active framebuffers +// Default: 2 +#define RTE_CPI_NUM_ACTIVE_FRAMEBUFFERS 2 + +// Enable CPI streaming +// <0=> Disable +// <1=> Enable +// Default: 1 +#define RTE_CPI_STREAMING_ENABLE 1 + // MT9M114 [Driver_MT9M114] // Enable/Disable MT9M114 camera sensor // <0=> disable @@ -371,14 +379,14 @@ // <1=> enable // defines if AE Module is enabled or not // default: false -#define RTE_ISP_AE_MODULE 0 +#define RTE_ISP_AE_MODULE 1 // ISP Enable BLS Module // <0=> disable // <1=> enable // defines if Black Level Subtraction Module is enabled or not // default: false -#define RTE_ISP_BLS_MODULE 0 +#define RTE_ISP_BLS_MODULE 1 // ISP Enable DMSC Module // <0=> disable @@ -392,7 +400,7 @@ // <1=> enable // defines if Noise/Sharpening-Filter Module is enabled or not // default: false -#define RTE_ISP_FLT_MODULE 0 +#define RTE_ISP_FLT_MODULE 1 // ISP Enable CCM Module // <0=> disable @@ -406,7 +414,7 @@ // <1=> enable // defines if Color Space Conversion Module is enabled or not // default: false -#define RTE_ISP_CSM_MODULE 0 +#define RTE_ISP_CSM_MODULE 1 // ISP Enable WB Module // <0=> disable @@ -420,14 +428,14 @@ // <1=> enable // defines if Auto-Exposure Statistics Module is enabled or not // default: false -#define RTE_ISP_EXPM_MODULE 0 +#define RTE_ISP_EXPM_MODULE 1 // ISP Enable Gamma-out Module // <0=> disable // <1=> enable // defines if Gamma-out Module is enabled or not // default: false -#define RTE_ISP_GAMMAOUT_MODULE 0 +#define RTE_ISP_GAMMAOUT_MODULE 1 // ISP Enable WBM Module // <0=> disable @@ -441,7 +449,24 @@ // <1=> enable // defines if Binning Module is enabled or not // default: false -#define RTE_ISP_BINNING_MODULE 0 +#define RTE_ISP_BINNING_MODULE 1 + +// ISP Binning Enable +// <0=> disable +// <1=> enable +// Enable binning processing in ISP +// default: false +#define RTE_ISP_BINNING_ENABLE 0 + +// ISP Binning Horizontal Step <0-255> +// Horizontal binning step size +// default: 0 +#define RTE_ISP_BINNING_HSTEP 0 + +// ISP Binning Vertical Step <0-255> +// Vertical binning step size +// default: 0 +#define RTE_ISP_BINNING_VSTEP 0 // ISP Enable Scaling Module // <0=> disable @@ -482,23 +507,103 @@ // Default: RGB888 #define RTE_ISP_OUTPUT_FORMAT 32 -#define RTE_ISP_OUTPUT_WIDTH 480 - -#define RTE_ISP_OUTPUT_HEIGHT 480 +// ISP Scaler Output Width +// Width in pixels of the ISP scaler output (after scaling from sensor dimensions). +#define RTE_ISP_OUTPUT_WIDTH 480 + +// ISP Scaler Output Height +// Height in pixels of the ISP scaler output (after scaling from sensor dimensions). +#define RTE_ISP_OUTPUT_HEIGHT 480 + +// ISP Sensor Input Width +// Width in pixels of the sensor input to the ISP pipeline. +// Default: MT9M114 sensor resolution (1280). Change for different sensors. +#define RTE_ISP_SENSOR_INPUT_WIDTH RTE_MT9M114_CAMERA_SENSOR_FRAME_WIDTH + + +// ISP Sensor Input Height +// Height in pixels of the sensor input to the ISP pipeline. +// Default: MT9M114 sensor resolution (720). Change for different sensors. +#define RTE_ISP_SENSOR_INPUT_HEIGHT RTE_MT9M114_CAMERA_SENSOR_FRAME_HEIGHT + +// ISP Crop Top offset <0-4095> +// Top offset in pixels for the cropped output window +#define RTE_ISP_CROP_TOP 0 + +// ISP Crop Left offset <0-4095> +// Left offset in pixels for the cropped output window +#define RTE_ISP_CROP_LEFT 0 + +// ISP Crop Width <1-4095> +// Width in pixels of the cropped output window. +// Default: full sensor input (no crop). Override with smaller value to crop. +#define RTE_ISP_CROP_WIDTH RTE_ISP_SENSOR_INPUT_WIDTH + +// ISP Crop Height <1-4095> +// Height in pixels of the cropped output window. +// Default: full sensor input (no crop). Override with smaller value to crop. +#define RTE_ISP_CROP_HEIGHT RTE_ISP_SENSOR_INPUT_HEIGHT #endif // ISP (ISP) [Driver_ISP] +// JPEG (JPEG) [Driver_JPEG] +// Configuration settings for Driver_JPEG in component ::Drivers:JPEG +#define RTE_JPEG 1 +#if RTE_JPEG + +// JPEG IRQ priority <0-255> +// Defines Interrupt priority for JPEG. +// Default: 0 +#define RTE_JPEG_IRQ_PRIORITY 0 + +// JPEG Encoding Mode +// <0=> 4:2:0(4lum+2chrblocks/MCU) +// Defines encoding mode for JPEG. +// Default: 0 +#define RTE_JPEG_MODE 0 + +// JPEG Encoding Mode +// <0=> JPEGENC_420_MODE +// Defines encoding mode for JPEG. +// Default: 0 +#define RTE_JPEG_CODING_MODE 0 + +// JPEG AXI Burst Length +// AXI burst length for JPEG. +// Default: 64 +#define RTE_JPEG_AXI_BURST_LENGTH 64 + +// JPEG AXI write outstanding number +// AXI write outstanding number for JPEG. +// Default: 64 +#define RTE_AXI_WRITE_OUTSTANDING_NUM 64 + +// JPEG AXI read outstanding number +// AXI read outstanding number for JPEG. +// Default: 64 +#define RTE_AXI_READ_OUTSTANDING_NUM 64 + +#endif +// JPEG (JPEG) [Driver_JPEG] + // MIPI_CSI2 (mipi csi2) [Driver_MIPI_CSI2] // Configuration settings for Driver_MIPI_CSI2 in component ::Drivers:MIPI_CSI2 #define RTE_MIPI_CSI2 1 #if RTE_MIPI_CSI2 +// Select CSI2 DPHY backend +// <0=> CSI2 RX DPHY +// <1=> DSI TX DPHY used as RX +// Selects which DPHY hardware is used by Driver_MIPI_CSI2. +// Default: CSI2 RX DPHY +#define RTE_MIPI_CSI2_DPHY_BACKEND 0 + // CSI pixel clock select -// <0=> 400 MHz clock source (PLL_CLK1/2) -// <1=> 480 MHz clock source (PLL_CLK3) +// <0=> Select AXI clock source +// <1=> Select PLL clock source // Defines CSI pixel clock select -// Default: 400 MHz clock source (PLL_CLK1/2) +// Default: Select AXI clock source #define RTE_CSI2_PIX_CLK_SEL 0 // select IPI mode @@ -711,26 +816,6 @@ // Default: 20 #define RTE_ARX3A0_CAMERA_SENSOR_CSI_CLK_SCR_DIV 20 -// Select camera sensor ARX3A0 reset pin number -// Defines camera sensor ARX3A0 reset pin number -// Default: 1 -#define RTE_ARX3A0_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor ARX3A0 reset GPIO port -// Defines camera sensor ARX3A0 reset GPIO port -// Default: 9 -#define RTE_ARX3A0_CAMERA_SENSOR_RESET_GPIO_PORT 9 - -// Select camera sensor ARX3A0 power pin number -// Defines camera sensor ARX3A0 power pin number -// Default: 5 -#define RTE_ARX3A0_CAMERA_SENSOR_POWER_PIN_NO 5 - -// Select camera sensor ARX3A0 power GPIO port -// Defines camera sensor ARX3A0 power GPIO port -// Default: 7 -#define RTE_ARX3A0_CAMERA_SENSOR_POWER_GPIO_PORT 7 - // RTE_ARX3A0_CAMERA_SENSOR_I2C_INSTANCE // Defines camera sensor ARX3A0 i2c instance // <0=> I2C0 @@ -799,26 +884,6 @@ // Default: 20 #define RTE_AR0144_CAMERA_SENSOR_CSI_CLK_SCR_DIV 20 -// Select camera sensor AR0144 reset pin number -// Defines camera sensor AR0144 reset pin number -// Default: 5 -#define RTE_AR0144_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor AR0144 reset GPIO port -// Defines camera sensor AR0144 reset GPIO port -// Default: 4 -#define RTE_AR0144_CAMERA_SENSOR_RESET_GPIO_PORT 9 - -// Select camera sensor AR0144 power pin number -// Defines camera sensor AR0144 power pin number -// Default: 5 -#define RTE_AR0144_CAMERA_SENSOR_POWER_PIN_NO 5 - -// Select camera sensor AR0144 power GPIO port -// Defines camera sensor AR0144 power GPIO port -// Default: 7 -#define RTE_AR0144_CAMERA_SENSOR_POWER_GPIO_PORT 7 - // RTE_AR0144_CAMERA_SENSOR_I2C_INSTANCE // Defines camera sensor AR0144 i2c instance // <0=> I2C0 @@ -886,26 +951,6 @@ // Default: 16 #define RTE_AR0145_CAMERA_SENSOR_CSI_CLK_SCR_DIV 16 -// Select camera sensor AR0145 reset pin number -// Defines camera sensor AR0145 reset pin number -// Default: 1 -#define RTE_AR0145_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor AR0145 reset GPIO port -// Defines camera sensor AR0145 reset GPIO port -// Default: 9 -#define RTE_AR0145_CAMERA_SENSOR_RESET_GPIO_PORT 9 - -// Select camera sensor AR0145 power pin number -// Defines camera sensor AR0145 power pin number -// Default: 5 -#define RTE_AR0145_CAMERA_SENSOR_POWER_PIN_NO 5 - -// Select camera sensor AR0145 power GPIO port -// Defines camera sensor AR0145 power GPIO port -// Default: 7 -#define RTE_AR0145_CAMERA_SENSOR_POWER_GPIO_PORT 7 - // RTE_AR0145_CAMERA_SENSOR_I2C_INSTANCE // Defines camera sensor AR0145 i2c instance // <0=> I2C0 @@ -974,26 +1019,6 @@ // Default: 15 #define RTE_AR0246_CAMERA_SENSOR_CSI_CLK_SCR_DIV 15 -// Select camera sensor AR0246 reset pin number -// Defines camera sensor AR0246 reset pin number -// Default: 1 -#define RTE_AR0246_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor AR0246 reset GPIO port -// Defines camera sensor AR0246 reset GPIO port -// Default: 9 -#define RTE_AR0246_CAMERA_SENSOR_RESET_GPIO_PORT 9 - -// Select camera sensor AR0246 power pin number -// Defines camera sensor AR0246 power pin number -// Default: 5 -#define RTE_AR0246_CAMERA_SENSOR_POWER_PIN_NO 5 - -// Select camera sensor AR0246 power GPIO port -// Defines camera sensor AR0246 power GPIO port -// Default: 7 -#define RTE_AR0246_CAMERA_SENSOR_POWER_GPIO_PORT 7 - // RTE_AR0246_CAMERA_SENSOR_I2C_INSTANCE // Defines camera sensor AR0246 i2c instance // <0=> I2C0 @@ -1058,26 +1083,6 @@ // Default: 20 #define RTE_MT9M114_CAMERA_SENSOR_MIPI_CSI_CLK_SCR_DIV 20 -// Select camera sensor MT9M114 MIPI reset pin number -// Defines camera sensor MT9M114 MIPI reset pin number -// Default: 1 -#define RTE_MT9M114_CAMERA_SENSOR_MIPI_RESET_PIN_NO 1 - -// Select camera sensor MT9M114 MIPI reset GPIO port -// Defines camera sensor MT9M114 MIPI reset GPIO port -// Default: 9 -#define RTE_MT9M114_CAMERA_SENSOR_MIPI_RESET_GPIO_PORT 9 - -// Select camera sensor MT9M114 MIPI power pin number -// Defines camera sensor MT9M114 MIPI power pin number -// Default: 5 -#define RTE_MT9M114_CAMERA_SENSOR_MIPI_POWER_PIN_NO 5 - -// Select camera sensor MT9M114 MIPI power GPIO port -// Defines camera sensor MT9M114 MIPI power GPIO port -// Default: 7 -#define RTE_MT9M114_CAMERA_SENSOR_MIPI_POWER_GPIO_PORT 7 - // RTE_MT9M114_CAMERA_SENSOR_MIPI_I2C_INSTANCE // Defines camera sensor MT9M114 MIPI i2c instance // <0=> I2C0 @@ -1088,6 +1093,14 @@ // Default: 1 #define RTE_MT9M114_CAMERA_SENSOR_MIPI_I2C_INSTANCE 1 +// MT9M114 sensor frame width for ISP / CSI2 pipeline +// Width in pixels of the MT9M114 MIPI sensor frame +#define RTE_MT9M114_CAMERA_SENSOR_FRAME_WIDTH 1280 + +// MT9M114 sensor frame height for ISP / CSI2 pipeline +// Height in pixels of the MT9M114 MIPI sensor frame +#define RTE_MT9M114_CAMERA_SENSOR_FRAME_HEIGHT 720 + #endif // MT9M114_MIPI [Driver_MT9M114_MIPI] @@ -1167,36 +1180,6 @@ #define RTE_HM0360_CAMERA_SENSOR_FRAME_WIDTH 320 #endif -// Select camera sensor HM0360 reset pin number -// Defines camera sensor HM0360 reset pin number -// Default: 1 -#define RTE_HM0360_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor HM0360 reset GPIO port -// Defines camera sensor HM0360 reset GPIO port -// Default: 9 -#define RTE_HM0360_CAMERA_SENSOR_RESET_GPIO_PORT 9 - -// Select camera sensor HM0360 power pin number -// Defines camera sensor HM0360 power pin number -// Default: 5 -#define RTE_HM0360_CAMERA_SENSOR_POWER_PIN_NO 5 - -// Select camera sensor HM0360 power GPIO port -// Defines camera sensor HM0360 power GPIO port -// Default: 7 -#define RTE_HM0360_CAMERA_SENSOR_POWER_GPIO_PORT 7 - -// Select camera sensor HM0360 xsleep pin number -// Defines camera sensor HM0360 xsleep pin number -// Default: 3 -#define RTE_HM0360_CAMERA_SENSOR_XSLEEP_PIN_NO 3 - -// Select camera sensor HM0360 xsleep GPIO port -// Defines camera sensor HM0360 xsleep GPIO port -// Default: 6 -#define RTE_HM0360_CAMERA_SENSOR_XSLEEP_GPIO_PORT 6 - // RTE_HM0360_CAMERA_SENSOR_I2C_INSTANCE // Defines camera sensor HM0360 i2c instance // <0=> I2C0 @@ -1260,16 +1243,6 @@ // default: 640 #define RTE_OV5647_CAMERA_SENSOR_FRAME_WIDTH 640 -// Select camera sensor OV5647 reset pin number -// Defines camera sensor OV5647 reset pin number -// Default: 1 -#define RTE_OV5647_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor OV5647 reset GPIO port -// Defines camera sensor OV5647 reset GPIO port -// Default: 9 -#define RTE_OV5647_CAMERA_SENSOR_RESET_GPIO_PORT 9 - // Select camera sensor OV5647 i2c instance // Defines camera sensor OV5647 i2c instance // <0=> I2C0 @@ -1323,35 +1296,39 @@ // default: 2 (IPI-16 RAW 8) #define RTE_OV5675_CAMERA_SENSOR_CPI_COLOR_MODE 2 -// select OV5675 frame height -// defines select OV5675 frame height. +// Select OV5675 image configuration +// <0=> 1296x972_RAW10 +// <1=> 1920x1080_RAW10 +// <2=> 1280x720_RAW10 +// <3=> 640x480_RAW10 +// Default: 0 +#define RTE_OV5675_CAMERA_SENSOR_IMAGE_CONFIG 0 + +// OV5675 frame height (derived from IMAGE_CONFIG) +// defines OV5675 frame height. // default: 972 +#if (RTE_OV5675_CAMERA_SENSOR_IMAGE_CONFIG == 1) +#define RTE_OV5675_CAMERA_SENSOR_FRAME_HEIGHT 1080 +#elif (RTE_OV5675_CAMERA_SENSOR_IMAGE_CONFIG == 2) +#define RTE_OV5675_CAMERA_SENSOR_FRAME_HEIGHT 720 +#elif (RTE_OV5675_CAMERA_SENSOR_IMAGE_CONFIG == 3) +#define RTE_OV5675_CAMERA_SENSOR_FRAME_HEIGHT 480 +#else #define RTE_OV5675_CAMERA_SENSOR_FRAME_HEIGHT 972 +#endif -// select OV5675 frame width -// defines select OV5675 frame width. +// OV5675 frame width (derived from IMAGE_CONFIG) +// defines OV5675 frame width. // default: 1296 +#if (RTE_OV5675_CAMERA_SENSOR_IMAGE_CONFIG == 1) +#define RTE_OV5675_CAMERA_SENSOR_FRAME_WIDTH 1920 +#elif (RTE_OV5675_CAMERA_SENSOR_IMAGE_CONFIG == 2) +#define RTE_OV5675_CAMERA_SENSOR_FRAME_WIDTH 1280 +#elif (RTE_OV5675_CAMERA_SENSOR_IMAGE_CONFIG == 3) +#define RTE_OV5675_CAMERA_SENSOR_FRAME_WIDTH 640 +#else #define RTE_OV5675_CAMERA_SENSOR_FRAME_WIDTH 1296 - -// Select camera sensor OV5675 reset pin number -// Defines camera sensor OV5675 reset pin number -// Default: 1 -#define RTE_OV5675_CAMERA_SENSOR_RESET_PIN_NO 1 - -// Select camera sensor OV5675 reset GPIO port -// Defines camera sensor OV5675 reset GPIO port -// Default: 9 -#define RTE_OV5675_CAMERA_SENSOR_RESET_GPIO_PORT 9 - -// Select camera sensor OV5675 power pin number -// Defines camera sensor OV5675 power pin number -// Default: 5 -#define RTE_OV5675_CAMERA_SENSOR_POWER_PIN_NO 5 - -// Select camera sensor OV5675 power GPIO port -// Defines camera sensor OV5675 power GPIO port -// Default: 7 -#define RTE_OV5675_CAMERA_SENSOR_POWER_GPIO_PORT 7 +#endif // Select camera sensor OV5675 i2c instance // Defines camera sensor OV5675 i2c instance @@ -1363,6 +1340,11 @@ // Default: 1 #define RTE_OV5675_CAMERA_SENSOR_I2C_INSTANCE 1 +// Select camera sensor OV5675 CSI clock source division [Divisor] <2-511> +// Defines camera sensor OV5675 CSI clock source division +// Default: 20 +#define RTE_OV5675_CAMERA_SENSOR_MIPI_CSI_CLK_SCR_DIV 20 + #endif // OV5675_MIPI [Driver_OV5675_MIPI] @@ -1461,26 +1443,6 @@ // Default: 0 #define RTE_ILI9806E_PANEL_DSI_VC_ID 0 -// ILI9806 LCD panel reset pin number -// Defines ILI9806 LCD panel reset pin number. -// Default: 5 -#define RTE_ILI9806E_PANEL_RESET_PIN_NO 5 - -// ILI9806 LCD panel reset pin GPIO port number -// Defines ILI9806 LCD panel reset pin GPIO port number. -// Default: 15 -#define RTE_ILI9806E_PANEL_RESET_GPIO_PORT 15 - -// ILI9806 LCD panel back light pin number -// Defines ILI9806 LCD panel back light pin number. -// Default: 1 -#define RTE_ILI9806E_PANEL_BL_LED_PIN_NO 1 - -// ILI9806 LCD panel back light pin GPIO port number -// Defines ILI9806 LCD panel back light pin GPIO port number. -// Default: 6 -#define RTE_ILI9806E_PANEL_BL_LED_GPIO_PORT 6 - // MIPI_DSI (ILI9806E_PANEL_E43RB_FW405 | ILI9806E_PANEL_E43GB_MW405) [Driver_ILI9806E_PANEL] #if (RTE_ILI9806E_PANEL_E43RB_FW405_EN || RTE_ILI9806E_PANEL_E43GB_MW405_EN) @@ -1597,26 +1559,6 @@ // Default: 0 #define RTE_ILI9488_PANEL_DSI_VC_ID 0 -// ILI9488 LCD panel reset pin number -// Defines ILI9488 LCD panel reset pin number. -// Default: 5 -#define RTE_ILI9488_PANEL_RESET_PIN_NO 5 - -// ILI9488 LCD panel reset pin GPIO port number -// Defines ILI9488 LCD panel reset pin GPIO port number. -// Default: 15 -#define RTE_ILI9488_PANEL_RESET_GPIO_PORT 15 - -// ILI9488 LCD panel back light pin number -// Defines ILI9488 LCD panel back light pin number. -// Default: 1 -#define RTE_ILI9488_PANEL_BL_LED_PIN_NO 1 - -// ILI9488 LCD panel back light pin GPIO port number -// Defines ILI9488 LCD panel back light pin GPIO port number. -// Default: 6 -#define RTE_ILI9488_PANEL_BL_LED_GPIO_PORT 6 - // Panel hsync time in pixels // Defines ILI9488 LCD panel hsync time in pixels. // Default: 10 @@ -1714,10 +1656,10 @@ #define RTE_CDC200_IRQ_PRI 0 // CDC200 clock select -// <0=> 400 MHz clock source (PLL_CLK1/2) -// <1=> 480 MHz clock source (PLL_CLK3) +// <0=> Select AXI clock source +// <1=> Select PLL clock source // Defines CDC200 clock select -// Default: 400 MHz clock source (PLL_CLK1/2) +// Default: Select AXI clock source #define RTE_CDC200_CLK_SEL 0 // CDC200 background color red <0-255> @@ -1966,21 +1908,6 @@ // Default: DISABLE #define RTE_ICM42670_IBI_ENABLE 0 -#if !RTE_ICM42670_IBI_ENABLE - -// ICM42670 IMU INT pin GPIO port number range <0-15> -// Defines ICM42670 IMU INT pin GPIO port number. -// <1=> Port number for E8 Appkit -// <8=> Port number for E8 Devkit -// Default: 8 -#define RTE_ICM42670_INT_IO_PORT 8 - -// ICM42670 IMU INT pin number range <0-7> -// Defines ICM42670 IMU INT pin number. -// Default: 5 -#define RTE_ICM42670_INT_PIN_NO 5 -#endif - #endif // ICM42670 (Initial Measurement Unit) [Driver_ICM42670] @@ -1988,21 +1915,6 @@ // Configuration settings for Driver_BMI323 in component ::Drivers:IMU #define RTE_BMI323 1 -#if RTE_BMI323 - -// BMI323 IMU INT pin GPIO port number range <0-15> -// Defines BMI323 IMU INT pin GPIO port number. -// <1=> Port number for E8 Appkit -// <8=> Port number for E8 Devkit -// Default: 8 -#define RTE_BMI323_INT_IO_PORT 8 - -// BMI323 IMU INT pin number range <0-7> -// Defines BMI323 IMU INT pin number. -// Default: 4 -#define RTE_BMI323_INT_PIN_NO 4 - -#endif // BMI323 (Initial Measurement Unit) [Driver_BMI323] #endif // IMU (Initial Measurement Unit) [Driver_IMU] @@ -2701,7 +2613,7 @@ // <1=> Dual SPI FRF // <2=> Quad SPI FRF // <3=> Octal SPI FRF -// <3=> Dual Octal SPI FRF +// <4=> Dual Octal SPI FRF // Defines OSPI0 Frame format // Default: Octal SPI FRF #define RTE_OSPI0_SPI_FRAME_FORMAT 3 @@ -2810,7 +2722,7 @@ // <1=> Dual SPI FRF // <2=> Quad SPI FRF // <3=> Octal SPI FRF -// <3=> Dual Octal SPI FRF +// <4=> Dual Octal SPI FRF // Defines OSPI0 Frame format // Default: Octal SPI FRF #define RTE_OSPI1_SPI_FRAME_FORMAT 3 @@ -9399,6 +9311,15 @@ // Default: 100 #define RTE_CH201_RTC_CAL_PULSE_MS 100 +// CH201 LPTIMER channel for Timeout trigger +// Defines LPTIMER's channel number for CH201 Timeout trigger +// <0=> LPTIMER_CHANNEL_0 +// <1=> LPTIMER_CHANNEL_1 +// <2=> LPTIMER_CHANNEL_2 +// <3=> LPTIMER_CHANNEL_3 +// Default: 1 +#define RTE_CH201_LPTIMER_CHANNEL 1 + #endif // CH201 (Time of Flight Sensor) [Driver_CH201] @@ -10951,13 +10872,13 @@ // Default: BUS_WIDTH_4BIT #define RTE_SDC_BUS_WIDTH 1 -// SDC CLOCK SELECT -// <0=> SDC_12_5MHz -// <1=> SDC_25MHz -// <2=> SDC_50MHz -// Defines SDC0 Clock select +// SDC CLOCK SELECT (Hz) +// <12500000=> 12.5MHz +// <25000000=> 25MHz +// <50000000=> 50MHz +// Defines SDC0 Clock frequency in Hz // Default: 25MHz -#define RTE_SDC_CLOCK_SELECT 1 +#define RTE_SDC_CLOCK_SELECT 25000000 // SDC DMA SELECT // <0=> SDMA diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/app_mem_regions.h b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/app_mem_regions.h index f594c7a..e87dac5 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/app_mem_regions.h +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/app_mem_regions.h @@ -30,9 +30,24 @@ // RTSS HP Region size [bytes] <0x0-0x00580000:8> // Defines size of RTSS HP application memory region. // Default: 0x00200000 -#define APP_MRAM_HP_SIZE 0x00300000 +#define APP_MRAM_HP_SIZE 0x00200000 // +// MRAM User Configuration +// ======================= +// MRAM User Region +// User Base address <0x80000000-0x8057FFFF:8> +// Defines base address of MRAM user region +#define APP_MRAM_USER_BASE 0x80400000 + +// User Region size [bytes] <0x0-0x00580000:8> +// Defines size of MRAM user region +#define APP_MRAM_USER_SIZE 0x00180000 // 1.5 MB + +// Application executable MRAM region (before USER area) +#define APP_CODE_MRAM_SIZE (APP_MRAM_USER_BASE - APP_MRAM_HP_BASE) +// + // RAM Configuration // ======================= // Combine SRAM0 & SRAM1 diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/app_mem_regions.h.base@2.1.0 b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/app_mem_regions.h.base@3.0.0 similarity index 90% rename from RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/app_mem_regions.h.base@2.1.0 rename to RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/app_mem_regions.h.base@3.0.0 index b5cbf93..2db6782 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/app_mem_regions.h.base@2.1.0 +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/app_mem_regions.h.base@3.0.0 @@ -33,6 +33,21 @@ #define APP_MRAM_HP_SIZE 0x00200000 // +// MRAM User Configuration +// ======================= +// MRAM User Region +// User Base address <0x80000000-0x8057FFFF:8> +// Defines base address of MRAM user region +#define APP_MRAM_USER_BASE 0x80400000 + +// User Region size [bytes] <0x0-0x00580000:8> +// Defines size of MRAM user region +#define APP_MRAM_USER_SIZE 0x00180000 // 1.5 MB + +// Application executable MRAM region (before USER area) +#define APP_CODE_MRAM_SIZE (APP_MRAM_USER_BASE - APP_MRAM_HP_BASE) +// + // RAM Configuration // ======================= // Combine SRAM0 & SRAM1 diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_ac6_mram.sct.base@2.1.0 b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_ac6_mram.sct.base@2.2.0 similarity index 93% rename from RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_ac6_mram.sct.base@2.1.0 rename to RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_ac6_mram.sct.base@2.2.0 index 61c4a7c..06436a6 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_ac6_mram.sct.base@2.1.0 +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_ac6_mram.sct.base@2.2.0 @@ -4,7 +4,7 @@ #include "app_mem_regions.h" #define __ROM_BASE APP_MRAM_HP_BASE -#define __ROM_SIZE APP_MRAM_HP_SIZE +#define __ROM_SIZE APP_CODE_MRAM_SIZE #define __ITCM_BASE APP_ITCM_BASE #define __ITCM_SIZE APP_HP_ITCM_SIZE @@ -79,6 +79,11 @@ LR_ROM __ROM_BASE NOCOMPRESS __ROM_SIZE { ; load region size_region } ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack + } + + MRAM_USER APP_MRAM_USER_BASE APP_MRAM_USER_SIZE { + * (.mram_user) + * (.mram_user_bss) } #if (SRAM0_SRAM1_COMBINED == 1) diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_mram.ld.src.base@2.0.4 b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_mram.ld.src.base@2.0.4 deleted file mode 100644 index 6d9f0ec..0000000 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_mram.ld.src.base@2.0.4 +++ /dev/null @@ -1,287 +0,0 @@ -/* This file was ported to work on Alif Semiconductor family of devices. */ - -/* Copyright (C) 2023 Alif Semiconductor - All Rights Reserved. - * Use, distribution and modification of this code is permitted under the - * terms stated in the Alif Semiconductor Software License Agreement - * - * You should have received a copy of the Alif Semiconductor Software - * License Agreement with this file. If not, please write to: - * contact@alifsemi.com, or visit: https://alifsemi.com/license - * - */ - -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "app_mem_regions.h" - -#define __STACK_SIZE APP_HP_STACK_SIZE -#define __HEAP_SIZE APP_HP_HEAP_SIZE -#define __APP_HEAP_SIZE 0x00004000 -#define __ROM_BASE APP_MRAM_HP_BASE -#define __ROM_SIZE APP_MRAM_HP_SIZE - -/* - * Note: - * The empty regions(eg SRAM1) are ON by default, but may have been released - * by some example applications. So make sure your application requests - * power for these regions before adding contents. - */ - -MEMORY -{ - ITCM (rwx) : ORIGIN = APP_ITCM_BASE , LENGTH = APP_HP_ITCM_SIZE - DTCM (rwx) : ORIGIN = APP_DTCM_BASE , LENGTH = APP_HP_DTCM_SIZE - #if __HAS_BULK_SRAM - SRAM0 (rwx) : ORIGIN = APP_SRAM0_BASE, LENGTH = APP_SRAM0_SIZE - SRAM1 (rwx) : ORIGIN = APP_SRAM1_BASE, LENGTH = APP_SRAM1_SIZE - #endif - MRAM (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE -} - -ENTRY(Reset_Handler) - -SECTIONS -{ - - /DISCARD/ : - { - *(.ARM.exidx*) - *(.ARM.extab* .gnu.linkonce.armextab.*) - } - - .startup.at_mram : ALIGN(2048) - { - KEEP(*(.vectors)) - - *startup*(.text .rodata*) - *system*(.text .rodata*) - *sys_*(.text .rodata*) - *pm*(.text .rodata*) - *tgu*(.text .rodata*) - *mpu*(.text .rodata*) - *sau_tcm_ns_setup*(.text .rodata*) - - *lv_*(.text .rodata*) - - . = ALIGN(16); - } > MRAM - - .copy.table : ALIGN(4) - { - __copy_table_start__ = .; - LONG ( LOADADDR(.tdata.at_dtcm) ) - LONG ( ADDR(.tdata.at_dtcm) ) - LONG ( SIZEOF(.tdata.at_dtcm)/4 ) - LONG ( LOADADDR(.data.at_dtcm) ) - LONG ( ADDR(.data.at_dtcm) ) - LONG ( SIZEOF(.data.at_dtcm)/4 ) - LONG ( LOADADDR(.code.at_itcm) ) - LONG ( ADDR(.code.at_itcm) ) - LONG ( SIZEOF(.code.at_itcm)/4 ) - __copy_table_end__ = .; - . = ALIGN(16); - } > MRAM - - .zero.table : ALIGN(4) - { - __zero_table_start__ = .; - LONG (ADDR(.tbss)) - LONG (SIZEOF(.tbss)/4) - LONG (ADDR(.bss)) - LONG (SIZEOF(.bss)/4) -#if __HAS_BULK_SRAM - LONG (ADDR(.bss.at_sram0)) - LONG (SIZEOF(.bss.at_sram0)/4) -#endif - __zero_table_end__ = .; - . = ALIGN(16); - } > MRAM - - .code.at_itcm : ALIGN(8) - { - *(.text*) - . = ALIGN(16); - } > ITCM AT > MRAM - - /* Thread Local Storage sections */ - .tdata.at_dtcm : ALIGN(16) - { - /* TLS base = beginning of TLS block */ - __tls_base = .; - /* Offset inside TLS block where TCB is expected */ - __arm32_tls_tcb_offset = .; - /* Initialized TLS variables */ - *(.tdata .tdata.* .gnu.linkonce.td.*) - __tdata_end = .; - . = ALIGN(16); - } > DTCM AT > MRAM - - /* Thread-Local Uninitialized Data (.tbss) */ - .tbss (NOLOAD) : ALIGN(16) - { - *(.tbss .tbss.* .gnu.linkonce.tb.*) - /* TLS commons here */ - *(.tcommon) - __tbss_end = .; - . = ALIGN(16); - } > DTCM - - .data.at_dtcm : ALIGN(8) - { - *(vtable) - *(.data) - *(.data*) - *arm_common_tables*(.data* .rodata*) - - KEEP(*(.jcr*)) - - . = ALIGN(8); - *(.ARM.extab* .gnu.linkonce.armextab.*) - . = ALIGN(8); - __exidx_start = .; - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - __exidx_end = .; - . = ALIGN(16); - } > DTCM AT > MRAM - -#if __HAS_BULK_SRAM - .bss.at_sram0 (NOLOAD) : ALIGN(8) - { - *(.bss.lcd_crop_and_interpolate_buf) /* LCD crop and intrepolate image processing buffer. */ - *(.bss.lcd_frame_buf) /* LCD frame Buffer. */ - *(.bss.camera_frame_buf) /* Camer Frame Buffer */ - *(.bss.camera_frame_bayer_to_rgb_buf) /* (Optional) Camera Frame Buffer for Bayer to RGB Conversion. */ - } > SRAM0 -#endif - - .bss (NOLOAD) : ALIGN(8) - { - __bss_start__ = .; - *(.bss) - *(.bss.*) - *(COMMON) - - . = ALIGN(8); - __bss_end__ = .; - } > DTCM - - .nonsecure0_region (NOLOAD) : - { - . = ALIGN(TGU_BLOCK_SIZE); - __ns_region_0_start = .; - * (eth_buf) - * (usb_dma_buf) - * (sd_dma_buf) - * (.driver.usbd0) - . = ALIGN(TGU_BLOCK_SIZE); - __ns_region_0_end = .; - } > DTCM - - .__app_heap (NOLOAD) : ALIGN(8) - { - . = ALIGN(8); - __RAM_segment_used_end__ = .; - . = . + __APP_HEAP_SIZE; - . = ALIGN(8); - } > DTCM - - .heap (NOLOAD) : ALIGN(8) - { - __end__ = .; - PROVIDE(end = .); - . = . + __HEAP_SIZE; - . = ALIGN(8); - __HeapLimit = .; - } > DTCM - - .stack (ORIGIN(DTCM) + LENGTH(DTCM) - __STACK_SIZE) (NOLOAD) : ALIGN(8) - { - __StackLimit = .; - . = . + __STACK_SIZE; - . = ALIGN(8); - __StackTop = .; - } > DTCM - PROVIDE(__stack = __StackTop); - - .readonly.at_mram : ALIGN(8) - { - /* Use wildcards to mop up any read-only not directed to TCM */ - KEEP(*(.init)) - KEEP(*(.fini)) - - . = ALIGN(4); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(4); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(4); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata*) - - KEEP(*(.eh_frame*)) - . = ALIGN(16); - } > MRAM - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") - - /* Picolib crt on clang compiler requires below definitions for data and bss sections copy. - * We have multiple sections at diff memory locations to copy e.g. itcm, dtcm etc. - * but the __start of picolib copies one section only. - * So, setting data and bss defines to zero to skip it. - */ - PROVIDE(__stack_limit = __StackLimit); - PROVIDE(__data_start = 0); - PROVIDE(__data_source = 0); - PROVIDE(__data_size = 0); - PROVIDE(__bss_start = 0); - PROVIDE(__bss_size = 0); - PROVIDE(__heap_start = 0); - PROVIDE(__heap_end = 0); - - /* TLS helper sizes */ - __tdata_size = __tdata_end - __tls_base; - __tbss_size = __tbss_end - __tdata_end; - __tls_end = __tbss_end; -} diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_mram.ld.src.update@2.1.0 b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_mram.ld.src.base@2.2.0 similarity index 92% rename from RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_mram.ld.src.update@2.1.0 rename to RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_mram.ld.src.base@2.2.0 index a194b86..9722b39 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_mram.ld.src.update@2.1.0 +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_mram.ld.src.base@2.2.0 @@ -32,7 +32,7 @@ #define __HEAP_SIZE APP_HP_HEAP_SIZE #define __APP_HEAP_SIZE 0x00004000 #define __ROM_BASE APP_MRAM_HP_BASE -#define __ROM_SIZE APP_MRAM_HP_SIZE +#define __ROM_SIZE APP_CODE_MRAM_SIZE /* * Note: @@ -50,6 +50,7 @@ MEMORY SRAM1 (rwx) : ORIGIN = APP_SRAM1_BASE, LENGTH = APP_SRAM1_SIZE #endif MRAM (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE + MRAM_USER (rw) : ORIGIN = APP_MRAM_USER_BASE, LENGTH = APP_MRAM_USER_SIZE } ENTRY(Reset_Handler) @@ -270,6 +271,15 @@ SECTIONS KEEP(*(.eh_frame*)) . = ALIGN(16); } > MRAM + + .mram_user (NOLOAD) : ALIGN(16) + { + __mram_user_start__ = .; + *(.mram_user) + *(.mram_user*) + . = ALIGN(16); + __mram_user_end__ = .; + } > MRAM_USER /* Check if data + heap + stack exceeds RAM limit */ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_tcm.ld.src.base@2.0.4 b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_tcm.ld.src.base@2.0.4 deleted file mode 100644 index 13d7e63..0000000 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_tcm.ld.src.base@2.0.4 +++ /dev/null @@ -1,274 +0,0 @@ -/* This file was ported to work on Alif Semiconductor Ensemble family of devices. */ - -/* Copyright (C) 2023 Alif Semiconductor - All Rights Reserved. - * Use, distribution and modification of this code is permitted under the - * terms stated in the Alif Semiconductor Software License Agreement - * - * You should have received a copy of the Alif Semiconductor Software - * License Agreement with this file. If not, please write to: - * contact@alifsemi.com, or visit: https://alifsemi.com/license - * - */ - -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "app_mem_regions.h" - -#define __STACK_SIZE APP_HP_STACK_SIZE -#define __HEAP_SIZE APP_HP_HEAP_SIZE -#define __APP_HEAP_SIZE 0x00004000 - -/* - * Note: - * The empty regions(eg SRAM1) are ON by default, but may have been released - * by some example applications. So make sure your application requests - * power for these regions before adding contents. - */ - -MEMORY -{ - ITCM (rwx) : ORIGIN = APP_ITCM_BASE , LENGTH = APP_HP_ITCM_SIZE - DTCM (rwx) : ORIGIN = APP_DTCM_BASE , LENGTH = APP_HP_DTCM_SIZE - #if __HAS_BULK_SRAM - SRAM0 (rwx) : ORIGIN = APP_SRAM0_BASE, LENGTH = APP_SRAM0_SIZE - SRAM1 (rwx) : ORIGIN = APP_SRAM1_BASE, LENGTH = APP_SRAM1_SIZE - #endif -} - -ENTRY(Reset_Handler) - -SECTIONS -{ - /DISCARD/ : - { - *(.ARM.exidx*) - *(.ARM.extab* .gnu.linkonce.armextab.*) - } - - .startup.at_itcm : ALIGN(2048) - { - KEEP(*(.vectors)) - - *startup*(.text .rodata*) - *system*(.text .rodata*) - *sys_*(.text .rodata*) - *pm*(.text .rodata*) - *tgu*(.text .rodata*) - *mpu*(.text .rodata*) - *sau_tcm_ns_setup*(.text .rodata*) - - *lv_*(.text .rodata*) - - } > ITCM - - .copy.table : ALIGN(4) - { - __copy_table_start__ = .; - LONG ( LOADADDR(.tdata.at_dtcm) ) - LONG ( ADDR(.tdata.at_dtcm) ) - LONG ( SIZEOF(.tdata.at_dtcm)/4 ) - - LONG ( LOADADDR(.data.at_dtcm) ) - LONG ( ADDR(.data.at_dtcm) ) - LONG ( SIZEOF(.data.at_dtcm)/4 ) - __copy_table_end__ = .; - } > ITCM - - .zero.table : ALIGN(4) - { - __zero_table_start__ = .; - LONG (ADDR(.tbss)) - LONG (SIZEOF(.tbss)/4) - LONG (ADDR(.bss)) - LONG (SIZEOF(.bss)/4) -#if __HAS_BULK_SRAM - LONG (ADDR(.bss.at_sram0)) - LONG (SIZEOF(.bss.at_sram0)/4) -#endif - __zero_table_end__ = .; - } > ITCM - - .code.at_itcm : ALIGN(8) - { - *(.text*) - } > ITCM - - /* Thread Local Storage (.tdata) */ - .tdata.at_dtcm : ALIGN(8) - { - /* TLS base = beginning of TLS block */ - __tls_base = .; - /* Offset inside TLS block where TCB is expected */ - __arm32_tls_tcb_offset = .; - /* Initialized TLS variables */ - *(.tdata .tdata.* .gnu.linkonce.td.*) - __tdata_end = .; - } > DTCM AT > ITCM - - /* Thread-Local Uninitialized Data (.tbss) */ - .tbss (NOLOAD) : ALIGN(8) - { - *(.tbss .tbss.* .gnu.linkonce.tb.*) - /* TLS commons here */ - *(.tcommon) - __tbss_end = .; - } > DTCM - - .data.at_dtcm : ALIGN(8) - { - *(vtable) - *(.data) - *(.data*) - *arm_common_tables*(.data* .rodata*) - - KEEP(*(.jcr*)) - - . = ALIGN(8); - *(.ARM.extab* .gnu.linkonce.armextab.*) - . = ALIGN(8); - __exidx_start = .; - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - __exidx_end = .; - - } > DTCM AT > ITCM - -#if __HAS_BULK_SRAM - .bss.at_sram0 (NOLOAD) : ALIGN(8) - { - *(.bss.lcd_crop_and_interpolate_buf) /* LCD crop and intrepolate image processing buffer. */ - *(.bss.lcd_frame_buf) /* LCD frame Buffer. */ - *(.bss.camera_frame_buf) /* Camer Frame Buffer */ - *(.bss.camera_frame_bayer_to_rgb_buf) /* (Optional) Camera Frame Buffer for Bayer to RGB Conversion. */ - } > SRAM0 -#endif - - .bss (NOLOAD) : ALIGN(8) - { - __bss_start__ = .; - *(.bss) - *(.bss.*) - *(COMMON) - - . = ALIGN(8); - __bss_end__ = .; - } > DTCM - - .nonsecure0_region (NOLOAD) : - { - . = ALIGN(TGU_BLOCK_SIZE); - __ns_region_0_start = .; - * (eth_buf) - * (usb_dma_buf) - * (sd_dma_buf) - * (.driver.usbd0) - . = ALIGN(TGU_BLOCK_SIZE); - __ns_region_0_end = .; - } > DTCM - - .__app_heap (NOLOAD) : ALIGN(8) - { - . = ALIGN(8); - __RAM_segment_used_end__ = .; - . = . + __APP_HEAP_SIZE; - . = ALIGN(8); - } > DTCM - - .heap (NOLOAD) : ALIGN(8) - { - __end__ = .; - PROVIDE(end = .); - . = . + __HEAP_SIZE; - . = ALIGN(8); - __HeapLimit = .; - } > DTCM - - .stack (ORIGIN(DTCM) + LENGTH(DTCM) - __STACK_SIZE) (NOLOAD) : ALIGN(8) - { - __StackLimit = .; - . = . + __STACK_SIZE; - . = ALIGN(8); - __StackTop = .; - } > DTCM - PROVIDE(__stack = __StackTop); - - .readonly.at_itcm : ALIGN(8) - { - /* Use wildcards to mop up any read-only not directed to TCM */ - KEEP(*(.init)) - KEEP(*(.fini)) - - . = ALIGN(4); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(4); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(4); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata*) - - KEEP(*(.eh_frame*)) - } > ITCM - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") - - /* Picolib crt on clang compiler requires below definitions for data and bss sections copy. - * We have multiple sections at diff memory locations to copy e.g. itcm, dtcm etc. - * but the __start of picolib copies one section only. - * So, setting data and bss defines to zero to skip it. - */ - PROVIDE(__stack_limit = __StackLimit); - PROVIDE(__data_start = 0); - PROVIDE(__data_source = 0); - PROVIDE(__data_size = 0); - PROVIDE(__bss_start = 0); - PROVIDE(__bss_size = 0); - PROVIDE(__heap_start = 0); - PROVIDE(__heap_end = 0); - - /* TLS helper sizes */ - __tdata_size = __tdata_end - __tls_base; - __tbss_size = __tbss_end - __tdata_end; - __tls_end = __tbss_end; -} diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_tcm.ld.src.update@2.1.0 b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_tcm.ld.src.base@2.1.0 similarity index 100% rename from RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_tcm.ld.src.update@2.1.0 rename to RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_tcm.ld.src.base@2.1.0 diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/ethosu_cb_dcache.c b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/ethosu_cb_dcache.c index 2a4da1d..fe24749 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/ethosu_cb_dcache.c +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/ethosu_cb_dcache.c @@ -22,6 +22,10 @@ #include "ethosu_driver.h" #include "app_mem_regions.h" +#define ITCM_BASE APP_ITCM_BASE +#define ITCM_SIZE APP_HP_ITCM_SIZE +#define DTCM_BASE APP_DTCM_BASE +#define DTCM_SIZE APP_HP_DTCM_SIZE #define MRAM_BASE APP_MRAM_HP_BASE #define MRAM_SIZE APP_MRAM_HP_SIZE @@ -31,9 +35,9 @@ typedef struct { } mem_block_t; const mem_block_t non_cached_memory[] = { - {0x00000000, 0x01FFFFFF}, /* TCM */ - {0x20000000, 0x21FFFFFF}, /* TCM */ - {MRAM_BASE, MRAM_BASE + MRAM_SIZE - 1} /* MRAM */ + {ITCM_BASE, ITCM_BASE + ITCM_SIZE - 1}, + {DTCM_BASE, DTCM_BASE + DTCM_SIZE - 1}, + {MRAM_BASE, MRAM_BASE + MRAM_SIZE - 1} }; /** @@ -66,32 +70,36 @@ static bool check_mem_region(const void *p, size_t bytes) return true; } -void ethosu_flush_dcache(uint32_t *p, size_t bytes) +void ethosu_flush_dcache(const uint64_t *base_addr, const size_t *base_addr_size, int num_base_addr) { + for (int i = 0; i < num_base_addr; i++) { + if (check_mem_region((const void *)(uintptr_t)base_addr[i], base_addr_size[i])) { + /* Call CleanDCache instead of CleanDCache_by_Addr to avoid delays. */ + /* Memory regions size is usually large and calling by_Addr consumes time. */ + SCB_CleanDCache(); - if (check_mem_region(p, bytes)) { - /* Call CleanDCache instead of CleanDCache_by_Addr to avoid delays. */ - /* Memory regions size is usually large and calling by_Addr consumes time. */ - SCB_CleanDCache(); - } else { - __DSB(); + /* Cache is cleaned, return immediately */ + return; + } } + + /* No cleaning, just ensure all memory accesses are completed before continuing */ + __DSB(); } -void ethosu_invalidate_dcache(uint32_t *p, size_t bytes) +void ethosu_invalidate_dcache(const uint64_t *base_addr, const size_t *base_addr_size, int num_base_addr) { - bool invalidate; + for (int i = 0; i < num_base_addr; i++) { + if (check_mem_region((const void *)(uintptr_t)base_addr[i], base_addr_size[i])) { + /* Call CleanInvalidateDCache instead of SCB_InvalidateDCache to avoid silently losing data. */ + /* This avoids losing dirty lines that the CPU has written but not yet committed to memory. */ + SCB_CleanInvalidateDCache(); - if (p == NULL) { - invalidate = true; - } else { - invalidate = check_mem_region(p, bytes); + /* Cache is cleaned and invalidated, return immediately */ + return; + } } - if (invalidate) { - /* Clean and invalidate data cache */ - SCB_CleanInvalidateDCache(); - } else { - __DSB(); - } + /* No invalidation, just ensure all memory accesses are completed before continuing */ + __DSB(); } diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/main.c b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/main.c index 8c1d4b4..5c26f78 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/main.c +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/main.c @@ -26,7 +26,6 @@ #include "board_config.h" #include "ethosu_driver.h" #include "ext_init.h" -#include "core_cm55.h" #include "main.h" #include "profiler.h" @@ -86,18 +85,6 @@ void vbat_init(void) VBAT->PWR_CTRL &= ~VBAT_PWR_CTRL_UPHY_ISO; } -/* - Enable the CPU I-Cache and D-Cache. -*/ -static void CpuCacheEnable(void) -{ - /* Enable I-Cache */ - SCB_EnableICache(); - - /* Enable D-Cache */ - SCB_EnableDCache(); -} - int main(void) { /* Apply pin configuration */ @@ -136,9 +123,6 @@ int main(void) shield_setup(); #endif - /* Enable the CPU Cache */ - CpuCacheEnable(); - #if ENABLE_TIME_PROFILING /* Initialize ET PAL */ profiler_init(); diff --git a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/retarget_stdio.c b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/retarget_stdio.c index 0d08905..2275546 100644 --- a/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/retarget_stdio.c +++ b/RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/retarget_stdio.c @@ -1,5 +1,5 @@ /*--------------------------------------------------------------------------- - * Copyright (c) 2025-2026 Arm Limited (or its affiliates). + * Copyright (c) 2025 Arm Limited (or its affiliates). * All rights reserved. * * SPDX-License-Identifier: Apache-2.0 @@ -23,18 +23,14 @@ #include "RTE_Components.h" #include CMSIS_target_header -#include "cmsis_os2.h" /* Compile-time configuration */ #ifndef UART_BAUDRATE #define UART_BAUDRATE 115200 #endif -/* Exported functions */ +/* Exported function */ extern int stdio_init(void); -extern int stdin_getchar(void); -extern int stdout_putchar(int ch); -extern int stderr_putchar(int ch); /* Reference to the underlying USART driver */ #define ptrUSART (&ARM_Driver_USART_(RETARGET_STDIO_UART)) @@ -56,8 +52,8 @@ int stdio_init(void) } if (ptrUSART->Control(ARM_USART_MODE_ASYNCHRONOUS | ARM_USART_DATA_BITS_8 | - ARM_USART_PARITY_NONE | ARM_USART_STOP_BITS_1 | - ARM_USART_FLOW_CONTROL_NONE, + ARM_USART_PARITY_NONE | ARM_USART_STOP_BITS_1 | + ARM_USART_FLOW_CONTROL_NONE, UART_BAUDRATE) != ARM_DRIVER_OK) { return -1; } @@ -76,65 +72,3 @@ int stdio_init(void) return 0; } - -#if defined(RTE_CMSIS_Compiler_STDIN_Custom) -/** - Get a character from stdin - - \return The next character from the input, or -1 on read error. -*/ -int stdin_getchar(void) -{ - uint8_t buf[1]; - - if (ptrUSART->Receive(buf, 1) != ARM_DRIVER_OK) { - return (-1); - } - while (ptrUSART->GetRxCount() != 1) { - osDelay(10U); - } - return (buf[0]); -} -#endif - -#if defined(RTE_CMSIS_Compiler_STDOUT_Custom) -/** - Put a character to the stdout - - \param[in] ch Character to output - \return The character written, or -1 on write error. -*/ -int stdout_putchar(int ch) -{ - uint8_t buf[1]; - - buf[0] = (uint8_t) ch; - if (ptrUSART->Send(buf, 1) != ARM_DRIVER_OK) { - return (-1); - } - while (ptrUSART->GetTxCount() != 1) { - } - return ch; -} -#endif - -#if defined(RTE_CMSIS_Compiler_STDERR_Custom) -/** - Put a character to the stderr - - \param[in] ch Character to output - \return The character written, or -1 on write error. -*/ -int stderr_putchar(int ch) -{ - uint8_t buf[1]; - - buf[0] = (uint8_t) ch; - if (ptrUSART->Send(buf, 1) != ARM_DRIVER_OK) { - return (-1); - } - while (ptrUSART->GetTxCount() != 1) { - } - return ch; -} -#endif diff --git a/RockPaperScissors/AppKit-E8_USB/SDS.cbuild-pack.yml b/RockPaperScissors/AppKit-E8_USB/SDS.cbuild-pack.yml index d265a03..d37ae8a 100644 --- a/RockPaperScissors/AppKit-E8_USB/SDS.cbuild-pack.yml +++ b/RockPaperScissors/AppKit-E8_USB/SDS.cbuild-pack.yml @@ -2,10 +2,9 @@ cbuild-pack: resolved-packs: - resolved-pack: ARM::CMSIS@6.3.0 selected-by-pack: - - ARM::CMSIS - ARM::CMSIS@^6.2.0 - ARM::CMSIS@^6.3.0 - - resolved-pack: ARM::CMSIS-Compiler@2.1.0 + - resolved-pack: ARM::CMSIS-Compiler@2.3.0 selected-by-pack: - ARM::CMSIS-Compiler@^2.1.0 - resolved-pack: ARM::CMSIS-Driver@2.10.0 @@ -23,17 +22,13 @@ cbuild-pack: - resolved-pack: ARM::SSE_320_BSP@1.1.0 selected-by-pack: - ARM::SSE_320_BSP@1.1.0 - - resolved-pack: ARM::ethos-u-core-driver@1.25.2 - selected-by-pack: - - ARM::ethos-u-core-driver@1.25.2 - resolved-pack: ARM::ethos-u-core-driver@1.26.2 selected-by-pack: - - ARM::ethos-u-core-driver@^1.25.2 - - resolved-pack: AlifSemiconductor::Ensemble@2.2.0-dev8 + - ARM::ethos-u-core-driver@^1.26.2 + - resolved-pack: AlifSemiconductor::Ensemble@2.2.0 selected-by-pack: - - AlifSemiconductor::Ensemble@^2.1.1-0 - AlifSemiconductor::Ensemble@^2.2.0-0 - - resolved-pack: Keil::MDK-Middleware@8.1.0 + - resolved-pack: Keil::MDK-Middleware@8.3.0 selected-by-pack: - Keil::MDK-Middleware@^8.0.0 - resolved-pack: SEGGER::RTT@8.58.0 diff --git a/packs/AlifSemiconductor.Ensemble.2.2.0-dev8+g560eb47.pack b/packs/AlifSemiconductor.Ensemble.2.2.0-dev8+g560eb47.pack deleted file mode 100644 index d812641..0000000 Binary files a/packs/AlifSemiconductor.Ensemble.2.2.0-dev8+g560eb47.pack and /dev/null differ