Misc parts libraries cleanup

edg/electronics_model/UsbPort.py

@@ -26,8 +26,30 @@ def contents(self) -> None:
         )
 
 
+class UsbHostBridge(PortBridge):
+    def __init__(self) -> None:
+        super().__init__()
+        self.outer_port = self.Port(UsbHostPort.empty())
+        self.inner_link = self.Port(UsbDevicePort.empty())
+
+    @override
+    def contents(self) -> None:
+        from .DigitalPorts import DigitalBidirBridge
+
+        super().contents()
+
+        self.dm_bridge = self.Block(DigitalBidirBridge())
+        self.connect(self.outer_port.dm, self.dm_bridge.outer_port)
+        self.connect(self.dm_bridge.inner_link, self.inner_link.dm)
+
+        self.dp_bridge = self.Block(DigitalBidirBridge())
+        self.connect(self.outer_port.dp, self.dp_bridge.outer_port)
+        self.connect(self.dp_bridge.inner_link, self.inner_link.dp)
+
+
 class UsbHostPort(Port[UsbLink]):
     link_type = UsbLink
+    bridge_type = UsbHostBridge
 
     def __init__(self) -> None:
         super().__init__()

edg/parts/Microcontroller_Stm32f103.py

@@ -268,7 +268,7 @@ class Stm32f103_48_Device(Stm32f103Base_Device):
     }
     PACKAGE = "Package_QFP:LQFP-48_7x7mm_P0.5mm"
     PART = "STM32F103xxT6"
-    LCSC_PART = "C8734"  # C8T6 variant - basic part
+    LCSC_PART = "C8304"  # max memory CBT6 variant
     # C77994 for GD32F103C8T6, probably mostly drop-in compatible, NOT basic part
     LCSC_BASIC_PART = True
 
@@ -298,7 +298,7 @@ class Stm32f103Base(
     GeneratorBlock,
 ):
     DEVICE: Type[Stm32f103Base_Device] = Stm32f103Base_Device
-    DEFAULT_CRYSTAL_FREQUENCY = 12 * MHertz(tol=0.005)
+    DEFAULT_CRYSTAL_FREQUENCY = 8 * MHertz(tol=0.005)  # as in common dev boards / eval boards
 
     def __init__(self, **kwargs: Any) -> None:
         super().__init__(**kwargs)

edg/parts/PassiveConnector_Header.py

@@ -53,15 +53,30 @@ def part_footprint_mfr_name(self, length: int) -> Tuple[str, str, str]:
         )
 
 
-class PinSocket254Pair(SubboardConnectorPair):
+class PinSocket254Pair(SubboardConnectorPair, GeneratorBlock):
     """2.54mm pin socket (external) - header (internal) pair for sub-board connectors,
-    matching same pin-number to pin-number."""
+    matching same pin-number to pin-number.
 
-    def __init__(self, length: IntLike = 0) -> None:
+    Optionally can be reversed, with the header being on the external side and the socket being on the internal side."""
+
+    def __init__(self, length: IntLike = 0, *, reverse: BoolLike = False) -> None:
         super().__init__()
-        self.ext = self.Block(PinSocket254(length), external=True)
-        self.int = self.Block(PinHeader254(length))
-        self.pins = self.Export(self.int.pins)
+        self.length = self.ArgParameter(length)
+        self.reverse = self.ArgParameter(reverse)
+        self.generator_param(self.reverse)
+
+        self.pins = self.Port(Vector(Passive.empty()))
+
+    @override
+    def generate(self) -> None:
+        super().generate()
+        if not self.get(self.reverse):
+            self.ext: PassiveConnector = self.Block(PinSocket254(self.length), external=True)
+            self.int: PassiveConnector = self.Block(PinHeader254(self.length))
+        else:
+            self.ext = self.Block(PinHeader254(self.length), external=True)
+            self.int = self.Block(PinSocket254(self.length))
+        self.connect(self.pins, self.int.pins)
         self.export_tap(self.pins, self.ext.pins)
 
 

edg/parts/PowerConditioning.py

@@ -16,7 +16,11 @@ def __init__(self, voltage_drop: RangeLike, reverse_recovery_time: RangeLike = R
 
         self.pwr_in = self.Port(VoltageSink(current_draw=RangeExpr()))  # high-priority source
         self.pwr_in_diode = self.Port(VoltageSink(current_draw=RangeExpr()))  # low-priority source
-        self.pwr_out = self.Port(VoltageSource(voltage_out=RangeExpr()))
+        self.pwr_out = self.Port(
+            VoltageSource(  # use the spec voltage drop to avoid circular dependencies downstream
+                voltage_out=self.pwr_in.link().voltage.hull(self.pwr_in_diode.link().voltage - voltage_drop),
+            )
+        )
 
         self.diode = self.Block(
             Diode(
@@ -33,15 +37,6 @@ def __init__(self, voltage_drop: RangeLike, reverse_recovery_time: RangeLike = R
         )
         self.assign(self.pwr_in.current_draw, self.pwr_out.link().current_drawn)
         self.assign(self.pwr_in_diode.current_draw, self.pwr_out.link().current_drawn)
-        self.assign(
-            self.pwr_out.voltage_out,
-            self.pwr_in.link().voltage.hull(
-                (
-                    self.pwr_in_diode.link().voltage.lower() - self.diode.voltage_drop.upper(),
-                    self.pwr_in_diode.link().voltage.upper() - self.diode.voltage_drop.lower(),
-                )
-            ),
-        )
 
         self.connect(self.pwr_in_diode.net, self.diode.anode)
         self.connect(self.pwr_out.net, self.pwr_in.net, self.diode.cathode)
@@ -55,7 +50,13 @@ def __init__(self, voltage_drop: RangeLike, reverse_recovery_time: RangeLike = (
 
         self.pwr_in1 = self.Port(VoltageSink(current_draw=RangeExpr()))
         self.pwr_in2 = self.Port(VoltageSink(current_draw=RangeExpr()))
-        self.pwr_out = self.Port(VoltageSource(voltage_out=RangeExpr()))
+        self.pwr_out = self.Port(
+            VoltageSource(  # use the spec voltage drop to avoid circular dependencies downstream
+                voltage_out=(self.pwr_in1.link().voltage - voltage_drop).hull(
+                    self.pwr_in2.link().voltage - voltage_drop
+                )
+            )
+        )
 
         output_lower = (
             self.pwr_in1.link().voltage.lower().min(self.pwr_in2.link().voltage.lower())
@@ -78,17 +79,6 @@ def __init__(self, voltage_drop: RangeLike, reverse_recovery_time: RangeLike = (
             )
         )
 
-        self.assign(
-            self.pwr_out.voltage_out,
-            (
-                (self.pwr_in1.link().voltage.lower() - self.diode1.actual_voltage_drop.upper()).min(
-                    self.pwr_in2.link().voltage.lower() - self.diode2.actual_voltage_drop.upper()
-                ),
-                (self.pwr_in1.link().voltage.upper() - self.diode1.actual_voltage_drop.lower()).max(
-                    self.pwr_in2.link().voltage.upper() - self.diode2.actual_voltage_drop.lower()
-                ),
-            ),
-        )
         self.assign(self.pwr_in1.current_draw, self.pwr_out.link().current_drawn)
         self.assign(self.pwr_in2.current_draw, self.pwr_out.link().current_drawn)
 

examples/Keyboard/Keyboard.net.ref

@@ -188,8 +188,8 @@
   (property (name "edg_path") (value "mcu.crystal.package"))
   (property (name "edg_short_path") (value "mcu.crystal.package"))
   (property (name "edg_refdes") (value "X1"))
-  (property (name "edg_part") (value "X322512MSB4SI (Yangxing Tech)"))
-  (property (name "edg_value") (value "12MHz SMD Crystal Resonator 20pF ±10ppm ±30ppm -40℃~+85℃ SMD3225-4P Crystals ROHS"))
+  (property (name "edg_part") (value "X32258MOB4SI (Yangxing Tech)"))
+  (property (name "edg_value") (value "8MHz SMD Crystal Resonator 12pF ±10ppm ±30ppm -40℃~+85℃ SMD3225-4P Crystals ROHS"))
   (sheetpath (names "/mcu/crystal/") (tstamps "/02850146/0c1b0303/"))
   (tstamps "0b4e02cd"))
 (comp (ref "C9")
@@ -200,8 +200,8 @@
   (property (name "edg_path") (value "mcu.crystal.cap_a"))
   (property (name "edg_short_path") (value "mcu.crystal.cap_a"))
   (property (name "edg_refdes") (value "C9"))
-  (property (name "edg_part") (value "CL10C220JB8NNNC (Samsung Electro-Mechanics)"))
-  (property (name "edg_value") (value "50V 22pF C0G ±5% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS"))
+  (property (name "edg_part") (value "CL10C100JB8NNNC (Samsung Electro-Mechanics)"))
+  (property (name "edg_value") (value "50V 10pF C0G ±5% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS"))
   (sheetpath (names "/mcu/crystal/") (tstamps "/02850146/0c1b0303/"))
   (tstamps "05e701f5"))
 (comp (ref "C10")
@@ -212,8 +212,8 @@
   (property (name "edg_path") (value "mcu.crystal.cap_b"))
   (property (name "edg_short_path") (value "mcu.crystal.cap_b"))
   (property (name "edg_refdes") (value "C10"))
-  (property (name "edg_part") (value "CL10C220JB8NNNC (Samsung Electro-Mechanics)"))
-  (property (name "edg_value") (value "50V 22pF C0G ±5% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS"))
+  (property (name "edg_part") (value "CL10C100JB8NNNC (Samsung Electro-Mechanics)"))
+  (property (name "edg_value") (value "50V 10pF C0G ±5% 0603 Multilayer Ceramic Capacitors MLCC - SMD/SMT ROHS"))
   (sheetpath (names "/mcu/crystal/") (tstamps "/02850146/0c1b0303/"))
   (tstamps "05e801f6"))
 (comp (ref "SW1")

examples/test_swd_debugger.py

@@ -170,7 +170,6 @@ def refinements(self) -> Refinements:
             ],
             instance_values=[
                 (["refdes_prefix"], "S"),  # unique refdes for panelization
-                (["mcu", "crystal", "frequency"], Range.from_tolerance(8000000, 0.005)),
                 (
                     ["mcu", "pin_assigns"],
                     [

examples/test_tofarray.py

@@ -136,6 +136,7 @@ def refinements(self) -> Refinements:
                 (["can", "conn"], MolexSl),
             ],
             instance_values=[
+                (["mcu", "crystal", "frequency"], Range.from_tolerance(12000000, 0.005)),  # legacy default crystal
                 (
                     ["mcu", "pin_assigns"],
                     [