From 5049e3c8f891f117fe397d0d56f2d310ecf5ed95 Mon Sep 17 00:00:00 2001 From: hanzhijian Date: Fri, 31 Jul 2026 11:40:28 +0800 Subject: [PATCH] Optimize BaseType_t access for GCC ARM_CM4F --- portable/GCC/ARM_CM4F/portmacro.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/portable/GCC/ARM_CM4F/portmacro.h b/portable/GCC/ARM_CM4F/portmacro.h index 0a91d7c929e..e291e28d4cb 100644 --- a/portable/GCC/ARM_CM4F/portmacro.h +++ b/portable/GCC/ARM_CM4F/portmacro.h @@ -117,6 +117,13 @@ typedef unsigned long UBaseType_t; /* Critical section management. */ extern void vPortEnterCritical( void ); extern void vPortExitCritical( void ); + +/* This is a single-core port where BaseType_t and UBaseType_t are 32-bit, and + * uint8_t is 8-bit. Reads and writes of these widths are atomic, so accesses + * protected by these macros do not need to enter a critical section. */ +#define portBASE_TYPE_ENTER_CRITICAL() +#define portBASE_TYPE_EXIT_CRITICAL() + #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI() #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x ) #define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()