changes

----------
kfleming    Date: Sun May 15 19:17:39 EDT 2011  CSN: CSN-multifpga-3
                  Sun May 15 23:17:39 UTC 2011


Directory config/pm
 leap/                     Locally Added               0 

Directory config/pm/leap
 demos/                    Locally Added               0 

Directory config/pm/leap/demos
 traffic_light/            Locally Added               0 

Directory config/pm/leap/demos/traffic_light
 traffic_light_acp_synth_multifpga.apm Locally Added               0 

Directory modules
 leap/                     Locally Added               0 

Directory modules/leap
 build-support/            Locally Added               0 

Directory modules/leap/build-support
 stages/                   Locally Added               0 
 project/                  Locally Added               0 

Directory modules/leap/build-support/project
 project-multifpga.awb     Locally Added               0 

Directory modules/leap/build-support
 pipelines/                Locally Added               0 

Directory modules/leap/build-support/pipelines
 multifpga/                Locally Added               0 

Directory modules/multifpga
 README                    Locally Removed             2 


Fleshing out directory structure and adding some apm

----------
kfleming    Date: Mon May 16 09:24:36 EDT 2011  CSN: CSN-multifpga-4
                  Mon May 16 13:24:36 UTC 2011


Directory config/pm/leap/demos/traffic_light
 traffic_light_acp_synth_multifpga.apm Locally Modified            3 

Directory config/pm/multifpga
 fpga_submodels/           Locally Added               0 

Directory config/pm/multifpga/fpga_submodels
 acp0.apm                  Locally Added               0 
 acp1.apm                  Locally Added               0 

Directory modules
 leap-platforms/           Locally Added               0 

Directory modules/leap-platforms
 fpga-environments/        Locally Added               0 

Directory modules/leap-platforms/fpga-environments
 acp/                      Locally Added               0 

Directory modules/leap-platforms/fpga-environments/acp
 acp_fpga_env.awb          Locally Added               0 
 acp-dual.env              Locally Added               0 

Added more structure to the multifpga build

----------
kfleming    Date: Tue May 17 14:01:54 EDT 2011  CSN: CSN-multifpga-5
                  Tue May 17 18:01:54 UTC 2011


Directory config/pm/leap/demos/traffic_light
 traffic_light_acp_synth_multifpga.apm Locally Modified            4 

Directory modules/leap/build-support
 build-pipelines/          Locally Added               0 

Directory modules/leap/build-support/build-pipelines
 pipelines/                Locally Added               0 

Directory modules/leap/build-support/build-pipelines/pipelines
 multifpga/                Locally Added               0 

Directory modules/leap/build-support/build-pipelines/pipelines/multifpga
 multifpga-build-pipeline.awb Locally Added               0 
 multiFPGAPipeline.py      Locally Added               0 

Directory modules/leap/build-support/project
 project-multifpga.awb     Locally Modified            4 

Directory modules/leap-platforms/fpga-environments/acp
 acp-dual.env              Locally Modified            4 



Added an initial pipeline stage for parsing the fpga file

----------
kfleming    Date: Thu Jun 30 13:13:16 EDT 2011  CSN: CSN-multifpga-27
                  Thu Jun 30 17:13:16 UTC 2011


Directory modules/leap-platforms/fpga-environments/acp
 acp_fpga_env_airblue.awb  Locally Added               0 
 acp-dual-airblue.env      Locally Added               0 


Added ACP environment for airblue

----------
keflemin    Date: Thu Jul  7 09:14:35 EDT 2011  CSN: CSN-multifpga-29
                  Thu Jul  7 13:14:35 UTC 2011


Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_acp_16_multifpga.apm Locally Added               0 
 alpha_inorder_dm_wt_mesh_acp_64_multifpga.apm Locally Added               0 
 submodels/                Locally Added               0 

Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_16_connected_application.apm Locally Added               0 
 alpha_inorder_dm_wt_mesh_acp_64_connected_application.apm Locally Added               0 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_acp.apm Locally Modified           28 

Directory modules/leap/build-support/build-pipelines/stages/multifpga-generate-bitfile
 multiFPGAGenerateBitfile.py Locally Modified           28 

Directory modules/multifpga/alpha_inorder
 acp_mapping_time_func_cache.awb Locally Added               0 
 acp-mapping-time-func-cache.map Locally Added               0 


Added mapping files and apm for various alpha builds.

----------
keflemin    Date: Fri Jul  8 19:44:36 EDT 2011  CSN: CSN-multifpga-30
                  Fri Jul  8 23:44:36 UTC 2011


Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_ring_acp_64_multifpga.apm Locally Added               0 

Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_ring_acp_16_connected_application.apm Locally Added               0 
 alpha_inorder_dm_wt_ring_acp_64_connected_application.apm Locally Added               0 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_ring_acp_16_multifpga.apm Locally Added               0 


Added multifpga models for rings.

----------
mcadler     Date: Thu Aug  4 17:42:27 EDT 2011  CSN: CSN-multifpga-44
                  Thu Aug  4 21:42:27 UTC 2011


Directory modules/leap/build-support/build-pipelines/stages
 iface/                    Locally Removed            43 

Directory modules/leap/build-support/build-pipelines/stages/iface
 iface.awb                 Locally Removed            43 
 README                    Locally Removed            43 
 iface.py                  Locally Removed            43 

Remove iface code from multifpga.  It had no changes for multiple FPGAs and
was out of date.

----------
mcadler     Date: Fri Aug  5 16:16:50 EDT 2011  CSN: CSN-multifpga-45
                  Fri Aug  5 20:16:50 UTC 2011


Directory modules/leap/build-support/build-pipelines/stages/wrapper_gen
 multifpga_wrapper_gen.py  Locally Modified           44 

Patches from main leap repository version.

----------
kfleming    Date: Mon Aug 15 18:21:28 EDT 2011  CSN: CSN-multifpga-47
                  Mon Aug 15 22:21:28 UTC 2011


Directory modules/leap/build-support/build-pipelines/stages/null_software
 software_null.py          Locally Modified           46 


need fix for syntax.h.

----------
kfleming    Date: Fri Aug 19 14:48:53 EDT 2011  CSN: CSN-multifpga-48
                  Fri Aug 19 18:48:53 UTC 2011


Directory config/pm/leap/demos/traffic_light
 test_multifpga_exe.apm    Locally Modified           47 
 test_multifpga_loop.apm   Locally Added               0 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified           47 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified           47 
 flowcontrol-ingress.bsv   Locally Modified           47 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service.bsv Locally Modified           47 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           47 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device-bdpi.c Locally Modified           47 
 unix-communication-device-bdpi.h Locally Modified           47 
 unix-communication-device.bsv Locally Modified           47 

Directory modules/multifpga
 longChain/                Locally Added               0 

Directory modules/multifpga/longChain
 test-b.bsv                Locally Added               0 
 test-c.bsv                Locally Added               0 
 test_b.awb                Locally Added               0 
 test_c.awb                Locally Added               0 
 test-d.bsv                Locally Added               0 
 top.awb                   Locally Added               0 
 test_top.bsv              Locally Added               0 
 test_d.awb                Locally Added               0 


Buckets of code to support multifpga compilation.  

----------
kfleming    Date: Mon Aug 22 14:41:04 EDT 2011  CSN: CSN-multifpga-49
                  Mon Aug 22 18:41:04 UTC 2011


Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_time_func_16_acp_sram.apm Locally Added               0 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified           48 
 flowcontrol-ingress.bsv   Locally Modified           48 


Reduced 2-cycle behavior of flow control updates.  This nets about 5% performance in HAsim.  

----------
mpellaue    Date: Thu Aug 25 18:16:02 EDT 2011  CSN: CSN-multifpga-50
                  Thu Aug 25 22:16:02 UTC 2011


Directory config/pm/leap/demos/traffic_light
 traffic_light_acp_synth_multifpga.apm Locally Modified           49 
 test_multifpga.apm        Locally Modified           49 
 test_multifpga_exe.apm    Locally Modified           49 
 test_multifpga_rrr_exe.apm Locally Modified           49 
 test_multifpga_loop.apm   Locally Modified           49 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga0.apm Locally Modified           49 
 multifpgaenv-hybrid-exe-fpga1.apm Locally Modified           49 

Directory config/pm/leap/submodels/pipelines
 build-pipeline-xilinx-multifpga.apm Locally Modified           49 

Directory config/pm/multifpga/fpga_submodels
 acp0-sram.apm             Locally Modified           49 
 acp0.apm                  Locally Modified           49 
 acp1.apm                  Locally Modified           49 
 fpga0.apm                 Locally Modified           49 
 fpga1.apm                 Locally Modified           49 


* Updated stale .apm files.
* Removed reference to no-longer existing xst-nobasicio stage.

----------
kfleming    Date: Thu Sep  1 08:45:25 EDT 2011  CSN: CSN-multifpga-52
                  Thu Sep  1 12:45:25 UTC 2011


Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga0-dist-cache.apm Locally Modified           51 
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified           51 

Directory config/pm/multifpga/fpga_submodels
 fpga0-dist-cache.apm      Locally Modified           51 
 fpga1-dist-cache.apm      Locally Modified           51 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified           51 


Patched a few apm and broke some critical paths in flow control.

----------
mcadler     Date: Fri Sep  9 07:27:25 EDT 2011  CSN: CSN-multifpga-55
                  Fri Sep  9 11:27:25 UTC 2011


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           54 

Directory modules/leap/build-support/build-pipelines/stages/multifpga-generate-bitfile
 multiFPGAGenerateBitfile.py Locally Modified           54 

Build all sub-models under the parent in the multi_fpga directory.

----------
mcadler     Date: Fri Sep  9 10:41:24 EDT 2011  CSN: CSN-multifpga-56
                  Fri Sep  9 14:41:24 UTC 2011


Directory modules/leap/build-support/build-pipelines/stages/null_software
 software_null.py          Locally Modified           55 

Directory modules/leap/build-support/build-pipelines/stages/multifpga-generate-bitfile
 multiFPGAGenerateBitfile.py Locally Modified           55 

Directory modules/multifpga/synthTest
 test-c.dic                Locally Modified           55 
 test-d.dic                Locally Modified           55 

- Pass OPT, DEBUG, TRACE and EVENTS command line options to sub-model builds.
- Check status of sub-model build
- Fix a couple of syntax warnings.

----------
mcadler     Date: Mon Sep 12 17:08:52 EDT 2011  CSN: CSN-multifpga-58
                  Mon Sep 12 21:08:52 UTC 2011


Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_acp_64_multifpga_sram.apm Locally Removed            57 
 alpha_inorder_dm_wt_mesh_acp_64_multifpga_dual_sram.apm Locally Added               0 

Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_16_connected_application.apm Locally Modified           57 
 alpha_inorder_dm_wt_mesh_acp_64_connected_application.apm Locally Modified           57 

Directory config/pm/multifpga/fpga_submodels
 acp0.apm                  Locally Modified           57 
 acp0-sram.apm             Locally Modified           57 
 acp1.apm                  Locally Modified           57 
 acp1-sram.apm             Locally Modified           57 
 acp1-passthrough.apm      Locally Modified           57 

- ACP configuration:
  - Update soft connections CON_CWIDTH to 128 bits
  - Use -cm balanced during mapping
  - Make the default scratchpad L1 cache 4K entries
  - Set default model clock frequency to 50MHz for SRAM models.

- Alpha mesh models:
  - Set default memory controller location to the center of the mesh.
  - Replace single SRAM 64-CPU configuration with a dual SRAM configuration.

----------
mcadler     Date: Tue Sep 13 14:09:23 EDT 2011  CSN: CSN-multifpga-59
                  Tue Sep 13 18:09:23 UTC 2011


Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_acp_16_multifpga.apm Locally Removed            58 

Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_30_connected_application.apm Locally Added               0 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_acp_64_multifpga.apm Locally Removed            58 
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_sram.apm Locally Removed            58 
 alpha_inorder_dm_wt_mesh_acp_30_multifpga_dual_sram.apm Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga-generate-bitfile
 multiFPGAGenerateBitfile.py Locally Modified           58 

- The multi-FPGA rule for building the bitfiles in the 2nd pass now can take
  the command to execute from a variable specified on the SCons command
  line:  MULTIFPGA_BITFILE_COMPILE_CMD.  If set, that command will be executed
  in each bitfile build subdirectory.  The command could submit a batch job,
  compile for multiple cost tables, etc.  If not specified, the old behavior
  of invoking SCons remains.

- Add a 30-way mesh model (32 would be an 8x4 rectangle, 30 is more square at
  6x5).

- Remove all mesh models lacking SRAM on each FPGA.

----------
mcadler     Date: Thu Sep 15 16:41:59 EDT 2011  CSN: CSN-multifpga-60
                  Thu Sep 15 20:41:59 UTC 2011


Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_30_connected_application.apm Locally Removed            59 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_acp_30_multifpga_dual_sram.apm Locally Removed            59 

Remove useless model.  The mesh has to be square, so only 25 nodes are supported.
Model frequency was essentially the same as the 64 node model, so there is
nothing gained by building for 25.

----------
mcadler     Date: Wed Oct  5 17:43:33 EDT 2011  CSN: CSN-multifpga-61
                  Wed Oct  5 21:43:33 UTC 2011


Directory modules/leap/build-support/build-pipelines/stages/bluespec
 BSVmulti.py               Locally Modified           60 

Use SCons "Copy" factory instead of "cp" because SCons stores the signature of
the program in the build dependence.  If "cp" is a different binary it looks like
rebuilding is needed.

Removed mkdir from the rules instead of using "Mkdir" factory, since the
directories appear to be present already and the factory version fails if
the target exists.

----------
kfleming    Date: Tue Oct 11 16:45:24 EDT 2011  CSN: CSN-multifpga-62
                  Tue Oct 11 20:45:24 UTC 2011


Directory config/pm/leap/demos/traffic_light
 test_multifpga_chains_exe.apm Locally Modified           61 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified           61 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified           61 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           61 

Directory modules/leap/build-support/build-pipelines/stages/multifpga-generate-bitfile
 multiFPGAGenerateBitfile.py Locally Modified           61 


Added support for automatically instrumenting inter-FPGA links with statistics.

----------
kfleming    Date: Wed Oct 12 12:20:24 EDT 2011  CSN: CSN-multifpga-63
                  Wed Oct 12 16:20:24 UTC 2011


Directory config/pm
 h264/                     Locally Added               0 

Directory config/pm/h264
 softphy_SOVA_acp.apm      Locally Added               0 
 h264_multifpga_decoder_split_synth.apm Locally Added               0 
 submodels/                Locally Added               0 

Directory config/pm/h264/submodels
 h264_multifpga.apm        Locally Added               0 

Directory config/pm/h264
 h264_multifpga_decoder_split_synth_exe.apm Locally Added               0 

Directory config/pm
 airblue/                  Locally Added               0 

Directory config/pm/airblue
 library_tests/            Locally Added               0 

Directory config/pm/airblue/library_tests
 softphy_SOVA_acp.apm      Locally Added               0 
 submodels/                Locally Added               0 

Directory config/pm/airblue/library_tests/submodels
 viterbi_softphy_hw_only_submodel.apm Locally Added               0 
 viterbi_softphy_submodel.apm Locally Added               0 

Directory modules/multifpga
 h264/                     Locally Added               0 

Directory modules/multifpga/h264
 acp_mapping.awb           Locally Added               0 
 acp-mapping.map           Locally Added               0 
 sim_mapping.awb           Locally Added               0 
 sim-mapping.map           Locally Added               0 

Directory modules/multifpga
 airblue/                  Locally Added               0 

Directory modules/multifpga/airblue
 acp_mapping.awb           Locally Added               0 
 acp-mapping.map           Locally Added               0 
 sim_mapping.awb           Locally Added               0 

Added mappings for airblue and h264

----------
kfleming    Date: Thu Oct 27 13:21:15 EDT 2011  CSN: CSN-multifpga-66
                  Thu Oct 27 17:21:15 UTC 2011


Directory config/pm/leap/demos/traffic_light
 test_multifpga_perf_xupv5.apm Locally Added               0 
 test_multifpga_scratch_acp.apm Locally Modified           65 
 test_multifpga_chains_xupv5.apm Locally Added               0 
 test_multifpga_scratch.apm Locally Modified           65 

Directory config/pm/leap/submodels/fpgaenv
 inter-fpga-test/          Locally Added               0 

Directory config/pm/leap/submodels/fpgaenv/inter-fpga-test
 inter-fpga-test-hybrid-exe-fpga1.apm Locally Added               0 
 inter-fpga-test-hybrid-exe-fpga0.apm Locally Added               0 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_time_func_xupv5.apm Locally Added               0 

Directory config/pm/multifpga/fpga_submodels
 xupv50.apm                Locally Added               0 
 xupv51.apm                Locally Added               0 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Added               0 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Added               0 

Directory config/pm/multifpga
 inter_fpga_test/          Locally Added               0 

Directory config/pm/multifpga/inter_fpga_test
 simulation/               Locally Added               0 

Directory config/pm/multifpga/inter_fpga_test/simulation
 inter_test_0_simulation.apm Locally Added               0 
 inter_test_1_simulation.apm Locally Added               0 

Directory config/pm/multifpga/inter_fpga_test
 xupv5/                    Locally Added               0 

Directory config/pm/multifpga/inter_fpga_test/xupv5
 inter_test_0_xupv5.apm    Locally Added               0 
 inter_test_1_xupv5.apm    Locally Added               0 

Directory modules/leap
 libraries/                Locally Added               0 

Directory modules/leap/libraries
 platform-services/        Locally Added               0 

Directory modules/leap/libraries/platform-services
 platform-services-inter-fpga.awb Locally Added               0 
 platform-services-inter-fpga.bsv Locally Added               0 
 inter-fpga-service/       Locally Added               0 

Directory modules/leap/libraries/platform-services/inter-fpga-service
 simulation/               Locally Added               0 

Directory modules/leap/libraries/platform-services/inter-fpga-service/simulation
 simulation-interfpga-service.h Locally Added               0 
 simulation-interfpga-service.awb Locally Added               0 
 simulation-interfpga-service.bsv Locally Added               0 

Directory modules/leap/libraries/platform-services/inter-fpga-service
 xupv5/                    Locally Added               0 

Directory modules/leap/libraries/platform-services/inter-fpga-service/xupv5
 xupv5-interfpga-service.cpp Locally Added               0 
 xupv5-interfpga-service.rrr Locally Added               0 
 xupv5-interfpga-service.h Locally Added               0 
 xupv5-interfpga-service.awb Locally Added               0 
 xupv5-interfpga-service.bsv Locally Added               0 

Directory modules/leap/libraries/platform-services
 README                    Locally Added               0 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpga0
 sim-physical-platform-fpga0.awb Locally Modified           65 
 sim-physical-platform-fpga0.bsv Locally Modified           65 

Directory modules/leap-platforms/fpga-environments
 xupv5/                    Locally Added               0 

Directory modules/leap-platforms/fpga-environments/xupv5
 xupv5-dual.env            Locally Added               0 
 xupv5_fpga_env.awb        Locally Added               0 

Directory modules/multifpga
 inter-fpga-test/          Locally Added               0 

Directory modules/multifpga/inter-fpga-test
 inter-fpga-test.h         Locally Added               0 
 inter-fpga-test.awb       Locally Added               0 
 inter-fpga-test.bsv       Locally Added               0 
 inter-fpga-test.dic       Locally Added               0 
 inter-fpga-test.cpp       Locally Added               0 
 inter-fpga-test.rrr       Locally Added               0 


Added support multifpga compilation to a configuration of XUPV5s.

Also added some helpful single FPGA testbenches to be used in testing
pair-wise links.

----------
kfleming    Date: Fri Oct 28 08:09:34 EDT 2011  CSN: CSN-multifpga-67
                  Fri Oct 28 12:09:34 UTC 2011


Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified           66 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_time_func_exe.apm Locally Modified           66 
 alpha_inorder_multifpga_time_func_acp_sram.apm Locally Modified           66 
 alpha_inorder_multifpga_time_func_acp.apm Locally Modified           66 
 alpha_inorder_dm_wt_ring_exe_16_multifpga.apm Locally Modified           66 

Directory config/pm/multifpga/fpga_submodels
 fpga0-dist-cache.apm      Locally Modified           66 
 fpga1-dist-cache.apm      Locally Modified           66 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified           66 
 multifpga-router-service.bsv Locally Modified           66 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           66 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device-bdpi.c Locally Modified           66 
 unix-communication-device.awb Locally Modified           66 
 unix-communication-device.bsv Locally Modified           66 

Directory modules/multifpga/scratchdual
 connected_application/    Locally Added               0 

Directory modules/multifpga/scratchdual/connected_application
 connected-application-test.cpp Locally Added               0 
 connected-application-test.h Locally Added               0 
 connected-application-test.awb Locally Added               0 
 connected-application-test.bsv Locally Added               0 

Directory modules/multifpga/scratchdual
 test-c.bsv                Locally Modified           66 


Several changes

1) Improved multi-lane architecture, which removes several cycles of latency. 

2) Statistics collection for shared portions of multi-fpga routers

3) More realistic unix simulation, which, incidentally, greatly improves simulation speed. 

----------
kfleming    Date: Thu Nov  3 21:59:46 EDT 2011  CSN: CSN-multifpga-68
                  Fri Nov  4 01:59:46 UTC 2011


Directory config/pm/leap/demos/traffic_light
 test_multifpga_chains_acp.apm Locally Modified           67 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga1.apm Locally Modified           67 
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified           67 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_ring_acp_32_multifpga.apm Locally Modified           67 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified           67 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-switch.awb    Locally Modified           67 
 flowcontrol-egress.bsv    Locally Modified           67 
 flowcontrol-ingress.bsv   Locally Modified           67 
 flowcontrol-switch-regs.awb Locally Modified           67 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           67 
 danglingConnection.py     Locally Modified           67 

Directory modules/multifpga/longChain
 test-d.bsv                Locally Modified           67 

Directory modules/multifpga/synthTest
 test-c-chains.bsv         Locally Modified           67 
 test-d-chains.bsv         Locally Modified           67 


Two changes in this check in:

1) Fixed bug in flow control algorithm where packets lengths were
limited to 8.  These calculations are now done off a parameter. 

2) More intelligent marshalling scheme wherein we bit-pack as many
data bits in the header as possible.  This is useful in reducing
latencies/improving throughput in some multilane scenarios. 



----------
kfleming    Date: Wed Nov  9 18:19:16 EST 2011  CSN: CSN-multifpga-70
                  Wed Nov  9 23:19:16 UTC 2011


Directory config/pm/leap/demos/traffic_light
 test_multifpga_chains_xupv5.apm Locally Modified           69 
 test_multifpga_chains_xupv5_sma.apm Locally Added               0 
 test_multifpga_chains_xupv5_sata.apm Locally Added               0 

Directory config/pm/multifpga/fpga_submodels
 xupv50.apm                Locally Modified           69 
 xupv51.apm                Locally Modified           69 
 xupv50_sata.apm           Locally Added               0 
 xupv51_sata.apm           Locally Added               0 
 multifpgaenv-hybrid-xupv5-fpga0-sata.apm Locally Added               0 
 multifpgaenv-hybrid-xupv5-fpga1-sata.apm Locally Added               0 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified           69 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified           69 

Directory config/pm/multifpga/inter_fpga_test/xupv5
 inter_test_0_xupv5.apm    Locally Modified           69 
 inter_test_1_xupv5.apm    Locally Modified           69 
 inter_test_0_xupv5_sma_3.125gbps.apm Locally Added               0 
 inter_test_1_xupv5_sma_3.125gbps.apm Locally Added               0 
 inter_test_0_xupv5_sata_3gbps.apm Locally Added               0 
 inter_test_1_xupv5_sata_3gbps.apm Locally Added               0 

Directory config/pm/multifpga/inter_fpga_test
 submodels/                Locally Added               0 

Directory config/pm/multifpga/inter_fpga_test/submodels
 fpgaenv-hybrid-xup-v5-pcie-sma.apm Locally Added               0 
 fpgaenv-hybrid-xup-v5-pcie-sata.apm Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga-generate-bitfile
 multiFPGAGenerateBitfile.py Locally Modified           69 

Directory modules/leap/libraries/platform-services
 platform-services-inter-fpga.awb Locally Modified           69 

Directory modules/leap/libraries/platform-services/inter-fpga-service/xupv5
 xupv5-interfpga-service.bsv Locally Modified           69 

Directory modules/leap-platforms/fpga-environments/xupv5
 xupv5-dual.env            Locally Modified           69 
 xupv5-airblue-dual.env    Locally Added               0 
 xupv5_fpga_env.awb        Locally Modified           69 
 xupv5_airblue_fpga_env.awb Locally Added               0 
 xupv5-dual-sata.env       Locally Added               0 
 xupv5_fpga_env_sata.awb   Locally Added               0 

Directory modules/multifpga/synthTest/connected_application
 connected-application-test.cpp Locally Modified           69 


Added support for multi-fpga Airblue compilation.  The biggest
structural change here is that we now construct a coherent global view
of RRR and DICT files through the compilation process.  Previously,
support for this was limited. 


----------
kfleming    Date: Thu Nov 10 12:17:16 EST 2011  CSN: CSN-multifpga-71
                  Thu Nov 10 17:17:16 UTC 2011


Directory config/pm/leap/demos/traffic_light
 test_multifpga_perf_acp.apm Locally Modified           70 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_time_func_acp_sram.apm Locally Modified           70 
 alpha_inorder_multifpga_time_func_acp.apm Locally Modified           70 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           70 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device.bsv Locally Modified           70 


Added support for debug chains, and also several different styles of
multilane router, also primarily for debug purposes.

----------
kfleming    Date: Mon Nov 14 16:52:32 EST 2011  CSN: CSN-multifpga-72
                  Mon Nov 14 21:52:32 UTC 2011


Directory config/pm/leap/demos/traffic_light
 test_multifpga_perf_xupv5.apm Locally Modified           71 
 test_multifpga_rrr_exe.apm Locally Modified           71 
 test_multifpga_chains_exe.apm Locally Modified           71 
 test_multifpga_loop.apm   Locally Modified           71 
 test_multifpga_scratch_acp.apm Locally Modified           71 
 test_multifpga_chains_xupv5_sma.apm Locally Modified           71 
 test_multifpga_chains_xupv5.apm Locally Modified           71 
 traffic_light_acp_synth_multifpga.apm Locally Modified           71 
 test_multifpga_perf_acp.apm Locally Modified           71 
 test_multifpga_alternative_exe.apm Locally Modified           71 
 test_multifpga_perf_acp_single.apm Locally Modified           71 
 test_multifpga.apm        Locally Modified           71 
 test_multifpga_exe.apm    Locally Modified           71 
 test_multifpga_chains_xupv5_sata.apm Locally Modified           71 
 test_multifpga_scratch.apm Locally Modified           71 
 test_multifpga_chains_acp.apm Locally Modified           71 
 test_multifpga_rrr_acp.apm Locally Modified           71 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga0.apm Locally Modified           71 
 multifpgaenv-hybrid-exe-fpga1.apm Locally Modified           71 
 multifpgaenv-hybrid-exe-fpga0-dist-cache.apm Locally Modified           71 
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified           71 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_ring_acp_16_multifpga_sram.apm Locally Modified           71 
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram.apm Locally Modified           71 
 alpha_inorder_dm_wt_ring_acp_64_multifpga_sram.apm Locally Modified           71 
 alpha_inorder_dm_wt_ring_acp_16_multifpga_sram_big_cache.apm Locally Modified           71 
 alpha_inorder_dm_wt_ring_acp_16_dual_multifpga_sram.apm Locally Modified           71 
 alpha_inorder_dm_wt_mesh_acp_64_multifpga_dual_sram.apm Locally Modified           71 
 alpha_inorder_multifpga_time_func_exe.apm Locally Modified           71 
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram_4_lanes.apm Locally Modified           71 
 alpha_inorder_multifpga_time_func_acp_sram.apm Locally Modified           71 
 alpha_inorder_multifpga_time_func_xupv5.apm Locally Modified           71 
 alpha_inorder_dm_wt_ring_acp_32_multifpga.apm Locally Modified           71 
 alpha_inorder_multifpga_time_func_dist_cache_exe.apm Locally Modified           71 
 alpha_inorder_multifpga_exe.apm Locally Modified           71 
 alpha_inorder_dm_wt_ring_acp_16_multifpga.apm Locally Modified           71 
 alpha_inorder_multifpga_time_func_16_acp_sram.apm Locally Modified           71 
 alpha_inorder_dm_wt_ring_acp_64_multifpga.apm Locally Modified           71 
 alpha_inorder_dm_wt_ring_acp_16_multifpga_sram_2.apm Locally Modified           71 
 alpha_inorder_dm_wt_ring_acp_16_multifpga_sram_3.apm Locally Modified           71 
 alpha_inorder_multifpga_time_func_16_acp_dual_sram.apm Locally Modified           71 
 alpha_inorder_multifpga_time_func_acp.apm Locally Modified           71 
 alpha_inorder_multifpga_time_func_acp_sram_2.apm Locally Modified           71 
 alpha_inorder_dm_wt_ring_exe_16_multifpga.apm Locally Modified           71 
 alpha_inorder_multifpga_acp.apm Locally Modified           71 

Directory config/pm/multifpga/inter_fpga_test/simulation
 inter_test_0_simulation.apm Locally Modified           71 
 inter_test_1_simulation.apm Locally Modified           71 

Directory modules/leap/build-support/build-pipelines/stages
 multifpga_generate_logfile/ Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 multitest.py              Locally Added               0 
 tool.py                   Locally Added               0 
 connection.py             Locally Added               0 
 multi_fpga_parse.awb      Locally Added               0 
 multilex.py               Locally Added               0 
 fpgaenvironment.awb       Locally Added               0 
 platform.py               Locally Added               0 
 environment.py            Locally Added               0 
 multifpga_parser.py       Locally Added               0 
 multiparse.py             Locally Added               0 
 README                    Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages
 multifpga-generate-bitfile/ Locally Removed            71 

Directory modules/leap/build-support/build-pipelines/stages/multifpga-generate-bitfile
 multifpga-generate-bitfile.awb Locally Removed            71 
 multiFPGAGenerateBitfile.py Locally Removed            71 


Moved log generator phase of the multifpga compiler into the multifpga
package. Patched codes.

----------
kfleming    Date: Tue Nov 15 13:29:36 EST 2011  CSN: CSN-multifpga-73
                  Tue Nov 15 18:29:36 UTC 2011


Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_time_func_acp_sram.apm Locally Modified           72 
 alpha_inorder_multifpga_time_func_acp_sram_2.apm Locally Modified           72 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified           72 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified           72 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 via.py                    Locally Modified           72 
 multiFPGAConnect.py       Locally Modified           72 


Removed fifos from egress-switch. These fifos were a holdover from the
original RRR implementation.  Now we just use the FIFOs in the
SoftConnection packetizer logic.  Removing this latency improves the
IPS of HAsim models by about 5%. 

There might be some impact on frequency quality, but I haven't seen it yet. 


----------
kfleming    Date: Fri Nov 18 15:49:26 EST 2011  CSN: CSN-multifpga-74
                  Fri Nov 18 20:49:26 UTC 2011


Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified           73 
 flowcontrol-ingress.bsv   Locally Modified           73 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           73 


Removed the channelization layer from the egress side. This reduces
hardware usage and removes a cycle of latency from the egress
pipeline.  Next up is removing this layer from the ingress side. 

----------

----------
kfleming    Date: Sat Nov 19 20:30:33 EST 2011  CSN: CSN-multifpga-75
                  Sun Nov 20 01:30:33 UTC 2011


Directory admin
 mytags                    Locally Modified           74 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified           74 
 flowcontrol-ingress.bsv   Locally Modified           74 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           74 

Directory .
 changes                   Locally Modified           74 


Cut the final of 3 cycles from the multifpga routers. The
channelization layer is completely gone, and flow control is treated
as a special case of a normal channel. 

This set of changes appears to have decreased area substantially and
decreased runtimes by 11%.


----------
kfleming    Date: Mon Nov 21 11:16:36 EST 2011  CSN: CSN-multifpga-76
                  Mon Nov 21 16:16:36 UTC 2011


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           75 


Refactored multifpga-connect in preparation for new channel allocation
algorithms.

----------
kfleming    Date: Tue Nov 22 15:49:42 EST 2011  CSN: CSN-multifpga-77
                  Tue Nov 22 20:49:42 UTC 2011


Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified           76 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified           76 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified           76 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-ingress.bsv   Locally Modified           76 


1) Updated some stale xupv5 apms.
2) Removed channel ID from headers in flow control code.  Header information should not be used any longer.

----------
mcadler     Date: Mon Nov 28 07:22:58 EST 2011  CSN: CSN-multifpga-78
                  Mon Nov 28 12:22:58 UTC 2011


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           77 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 tool.py                   Locally Modified           77 

Use consistent options for building logfile step since the inter-FPGA connections
may vary with compilation options.

----------
kfleming    Date: Mon Nov 28 11:45:02 EST 2011  CSN: CSN-multifpga-79
                  Mon Nov 28 16:45:02 UTC 2011


Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_time_func_exe.apm Locally Modified           78 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-ingress.bsv   Locally Modified           78 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           78 
 danglingConnection.py     Locally Modified           78 


Fixed the *broken* code refactoring.  Connections were being mis-linked.  

----------
mcadler     Date: Mon Nov 28 14:18:09 EST 2011  CSN: CSN-multifpga-80
                  Mon Nov 28 19:18:09 UTC 2011


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           79 

Fix specification of explicit dependence of generated router on the Python
source file.  I don't understand how this worked as checked in.

----------
mcadler     Date: Thu Dec  1 14:38:18 EST 2011  CSN: CSN-multifpga-81
                  Thu Dec  1 19:38:18 UTC 2011


Directory config/pm/leap/submodels
 platform-services/        Locally Added               0 

Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-subordinate.apm Locally Added               0 
 multifpga-platform-services-standard.apm Locally Added               0 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga0.apm Locally Modified           80 
 multifpgaenv-hybrid-exe-airblue-fpga0.apm Locally Modified           80 
 multifpgaenv-hybrid-exe-fpga1.apm Locally Modified           80 
 multifpgaenv-hybrid-exe-airblue-fpga1.apm Locally Modified           80 
 multifpgaenv-hybrid-exe-fpga0-dist-cache.apm Locally Modified           80 

Directory config/pm/leap/submodels/fpgaenv/inter-fpga-test
 inter-fpga-test-hybrid-exe-fpga1.apm Locally Modified           80 
 inter-fpga-test-hybrid-exe-fpga0.apm Locally Modified           80 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified           80 

Directory config/pm/leap/submodels
 common/                   Locally Added               0 

Directory config/pm/leap/submodels/common
 multifpga-soft-services.apm Locally Added               0 

Directory config/pm/multifpga/fpga_submodels
 acp0-sram.apm             Locally Modified           80 
 acp0.apm                  Locally Modified           80 
 acp1-sram.apm             Locally Modified           80 
 acp1.apm                  Locally Modified           80 
 multifpgaenv-hybrid-xupv5-fpga0-sata.apm Locally Modified           80 
 multifpgaenv-hybrid-xupv5-fpga1-sata.apm Locally Modified           80 
 acp1-passthrough.apm      Locally Modified           80 
 fpga0.apm                 Locally Modified           80 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified           80 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified           80 

Directory config/pm/multifpga/inter_fpga_test/submodels
 fpgaenv-hybrid-xup-v5-pcie-sma.apm Locally Modified           80 
 fpgaenv-hybrid-xup-v5-pcie-sata.apm Locally Modified           80 

Directory modules/leap/virtual-platform/virtual-devices/platform-services
 platform-services-null.awb Locally Modified           80 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified           80 

Directory modules/leap/build-support/build-pipelines/stages/bluespec
 BSV-multi.py              Locally Modified           80 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 tool.py                   Locally Modified           80 

- Update platforms for LEAP changes:  moved platform and soft services to FPGA
  environment.

- Replace MULTI_FPGA_PLATFORM_ID and friends with awb parameters and Bluespec
  functions defined in all platforms (both multi and single FPGA).

- Reduce multi-FPGA soft services to two cases:  primary (has RRR connection to
  host) and subordinate (only intra and inter-FPGA services).

----------
kfleming    Date: Mon Dec  5 17:27:25 EST 2011  CSN: CSN-multifpga-82
                  Mon Dec  5 22:27:25 UTC 2011


Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified           81 
 flowcontrol-ingress.bsv   Locally Modified           81 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 via.py                    Locally Modified           81 
 multiFPGAConnect.py       Locally Modified           81 


Removed the cycles of latency introduced in last commit.  

Reorganized the switches to allow flowcontrol across a parametric
link.  Previously, link 0 was used for flowcontrol. However, with
asymetric lane allocation, the virtual channle used for flow control
can't be hard coded.  



----------
mcadler     Date: Wed Dec  7 11:54:09 EST 2011  CSN: CSN-multifpga-83
                  Wed Dec  7 16:54:09 UTC 2011


Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga1.apm Locally Modified           82 
 multifpgaenv-hybrid-exe-fpga0-dist-cache.apm Locally Modified           82 
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified           82 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-xupv5-fpga1-sata.apm Locally Modified           82 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified           82 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified           82 

Virtual devices no requires a local memory device.

----------
kfleming    Date: Fri Dec  9 14:31:06 EST 2011  CSN: CSN-multifpga-84
                  Fri Dec  9 19:31:06 UTC 2011


Directory config/pm/multifpga/fpga_submodels
 xupv50.apm                Locally Modified           83 
 xupv51.apm                Locally Modified           83 
 xupv51_sata.apm           Locally Modified           83 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified           83 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified           83 


Forward ported the XUPv5 enviroments to Adler's reorganized platforms.  

----------
mcadler     Date: Sat Dec 10 16:46:47 EST 2011  CSN: CSN-multifpga-85
                  Sat Dec 10 21:46:47 UTC 2011


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-subordinate.apm Locally Modified           84 
 multifpga-platform-services-standard.apm Locally Modified           84 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           84 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 environment.py            Locally Modified           84 

- FPGA platform numbering now must start with 0 (environment.py).

- Squash yet another use of absolute build directory paths.  I expect to be
  able to move a build tree and have all SCons paths be relative.

----------
kfleming    Date: Sun Dec 11 22:38:33 EST 2011  CSN: CSN-multifpga-86
                  Mon Dec 12 03:38:33 UTC 2011


Directory config/pm/leap/demos/traffic_light
 test_multifpga_throughput_acp.apm Locally Added               0 
 test_multifpga_throughput_exe.apm Locally Added               0 
 test_multifpga_throughput_xupv5.apm Locally Added               0 

Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-subordinate.apm Locally Modified           85 

Directory config/pm/multifpga/fpga_submodels
 fpga0-airblue.apm         Locally Modified           85 
 fpga1-airblue.apm         Locally Modified           85 
 fpga1.apm                 Locally Modified           85 
 fpga0-dist-cache.apm      Locally Modified           85 
 fpga1-dist-cache.apm      Locally Modified           85 

Directory modules/multifpga
 throughputTest/           Locally Added               0 

Directory modules/multifpga/throughputTest
 test-c-throughput.bsv     Locally Added               0 
 test-d-throughput.bsv     Locally Added               0 
 test_c_throughput.awb     Locally Added               0 
 test_d_throughput.awb     Locally Added               0 
 test-c-throughput.dic     Locally Added               0 
 connected_application/    Locally Added               0 

Directory modules/multifpga/throughputTest/connected_application
 connected-application-throughput.h Locally Added               0 
 connected-application-throughput.awb Locally Added               0 
 connected-application-throughput.bsv Locally Added               0 
 connected-application-throughput.cpp Locally Added               0 

Directory modules/multifpga/throughputTest
 test-d-throughput.dic     Locally Added               0 
 test-d-throughput.rrr     Locally Added               0 


Added a generic platform throughput test.  Also fixed stalness in modules. 

----------
mcadler     Date: Mon Dec 12 14:59:26 EST 2011  CSN: CSN-multifpga-87
                  Mon Dec 12 19:59:26 UTC 2011


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-subordinate.apm Locally Modified           86 

Set subordinate platform services configuration back to the correct state.

----------
mcadler     Date: Tue Dec 13 13:52:34 EST 2011  CSN: CSN-multifpga-88
                  Tue Dec 13 18:52:34 UTC 2011


Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified           87 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 tool.py                   Locally Modified           87 

Use relpath() in LEAP Utils.py instead of os.path.relpath.  The latter isn't
in the version of Python currently used in Hudson.

----------
mcadler     Date: Wed Dec 14 16:14:06 EST 2011  CSN: CSN-multifpga-89
                  Wed Dec 14 21:14:06 UTC 2011


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-subordinate.apm Locally Modified           88 
 multifpga-platform-services-standard.apm Locally Modified           88 

The central cache implementation is now part of platform services.

----------
mcadler     Date: Wed Dec 14 23:29:38 EST 2011  CSN: CSN-multifpga-90
                  Thu Dec 15 04:29:38 UTC 2011


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-standard.apm Locally Modified           89 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpga0.apm Locally Modified           89 
 multifpgaenv-hybrid-exe-fpga1.apm Locally Modified           89 
 multifpgaenv-hybrid-exe-fpga0-dist-cache.apm Locally Modified           89 
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified           89 

Directory config/pm/multifpga/fpga_submodels
 xupv50_sata.apm           Locally Modified           89 
 xupv51_sata.apm           Locally Modified           89 
 multifpgaenv-hybrid-xupv5-fpga0-sata.apm Locally Modified           89 
 multifpgaenv-hybrid-xupv5-fpga1-sata.apm Locally Modified           89 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified           89 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified           89 

Clean up.

----------
kfleming    Date: Fri Dec 16 13:44:41 EST 2011  CSN: CSN-multifpga-91
                  Fri Dec 16 18:44:41 UTC 2011


Directory modules/multifpga/throughputTest/connected_application
 connected-application-throughput.cpp Locally Modified           90 


Fixed print out in multifpga throughput test. 

----------
mcadler     Date: Mon Dec 19 09:06:44 EST 2011  CSN: CSN-multifpga-92
                  Mon Dec 19 14:06:44 UTC 2011


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-slave.apm Locally Added               - 
 multifpga-platform-services-master.apm Locally Added               0 
 multifpga-platform-services-subordinate.apm Locally Removed            91 
 multifpga-platform-services-standard.apm Locally Removed            91 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga0.apm Locally Modified           91 
 multifpgaenv-hybrid-exe-fpga1.apm Locally Modified           91 
 multifpgaenv-hybrid-exe-fpga0-dist-cache.apm Locally Modified           91 
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified           91 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-xupv5-fpga0-sata.apm Locally Modified           91 
 multifpgaenv-hybrid-xupv5-fpga1-sata.apm Locally Modified           91 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified           91 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified           91 

Directory modules/leap/virtual-platform/virtual-devices/platform-services
 platform-services-null.awb Locally Removed            91 
 platform-services-slave.awb Locally Added               - 
 platform-services-null.bsv Locally Removed            91 
 platform-services-slave.bsv Locally Added               - 
 platform-services-master.awb Locally Added               - 
 platform-services-master.bsv Locally Added               - 
 platform-services-standard.awb Locally Removed            91 
 platform-services-standard.bsv Locally Removed            91 

Use a single virtual devices configuration, taking advantage of automatic
master/slave configuration in virtual devices.

----------
mcadler     Date: Mon Dec 19 12:22:22 EST 2011  CSN: CSN-multifpga-93
                  Mon Dec 19 17:22:22 UTC 2011


Directory config/pm/leap/submodels/fpgaenv/inter-fpga-test
 inter-fpga-test-hybrid-exe-fpga0.apm Locally Modified           92 

Directory config/pm/multifpga/inter_fpga_test/submodels
 fpgaenv-hybrid-xup-v5-pcie-sma.apm Locally Modified           92 

Clean up after moving modules.

----------
kfleming    Date: Wed Dec 21 15:49:05 EST 2011  CSN: CSN-multifpga-94
                  Wed Dec 21 20:49:05 UTC 2011


Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified           93 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-ingress.bsv   Locally Modified           93 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 via.py                    Locally Modified           93 
 multiFPGAConnect.py       Locally Modified           93 


Fixed bug in flowcontrol-ingess thatq could lead the flow control
packets to be mis-sized in some cases.

Longest job first link allocation and scheduling now operational.  It
uses default values to determin longest job, which actually
underperforms some static schedules.  The feedback-driven version is
coming soon.


----------
mcadler     Date: Wed Dec 21 23:47:40 EST 2011  CSN: CSN-multifpga-95
                  Thu Dec 22 04:47:40 UTC 2011


Directory modules/leap/virtual-platform/virtual-devices/platform-services
 platform-services-slave.bsv Locally Modified           94 
 platform-services-master.bsv Locally Modified           94 

mkMemServices() no longer takes parameters.

----------
kfleming    Date: Wed Dec 28 09:05:10 EST 2011  CSN: CSN-multifpga-96
                  Wed Dec 28 14:05:10 UTC 2011


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           95 

Directory modules/multifpga/alpha_inorder
 acp-mapping-time-func-cache.stats Locally Added               0 
 acp_mapping_time_func_cache.awb Locally Modified           95 


Added support for feedback driven link allocation.  User must provide
a stats file from a previous run and use the LFJ channel allocation
alogrithm.  This code isn't well-characterized yet. 


----------
mcadler     Date: Sun Jan  8 16:16:50 EST 2012  CSN: CSN-multifpga-97
                  Sun Jan  8 21:16:50 UTC 2012


Directory config/pm/leap/submodels/common
 multifpga-soft-services.apm Locally Modified           96 

Directory modules/leap/build-support/build-pipelines/stages/bluespec
 BSVmulti.py               Locally Modified           96 

Directory modules/leap/build-support/build-pipelines/stages/wrapper_gen
 multifpga_wrapper_gen.py  Locally Modified           96 

Multi-FPGA support for global string tables.

----------
mcadler     Date: Sun Jan 15 09:25:06 EST 2012  CSN: CSN-multifpga-98
                  Sun Jan 15 14:25:06 UTC 2012


Directory config/pm/leap/submodels/common
 multifpga-soft-services.apm Locally Modified           97 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           97 

Directory modules/leap/build-support/build-pipelines/stages/wrapper_gen
 multifpga_wrapper_gen.py  Locally Modified           97 

Soft connections notFull and notEmpty debug scanning for multi-FPGA.

----------
mcadler     Date: Thu Jan 19 08:12:11 EST 2012  CSN: CSN-multifpga-99
                  Thu Jan 19 13:12:11 UTC 2012


Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified           98 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device.bsv Locally Modified           98 

Update for changed LibRL marshaller interface.

----------
mcadler     Date: Tue Feb  7 22:18:10 EST 2012  CSN: CSN-multifpga-100
                  Wed Feb  8 03:18:10 UTC 2012


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-slave.apm Locally Modified           99 
 multifpga-platform-services-master.apm Locally Modified           99 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified           99 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 tool.py                   Locally Modified           99 

- Add STDIO service to platform services.

- Interface to debug scan changed.  Made changes that are legal in the two
  Python files, but not optimal.  Should define actual fields instead of
  just dumping raw data.

----------
mcadler     Date: Wed Feb  8 01:20:43 EST 2012  CSN: CSN-multifpga-101
                  Wed Feb  8 06:20:43 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          100 

Stop generating pointless DEBUG_SCAN dictionary entries.

----------
kfleming    Date: Mon Feb 13 11:30:39 EST 2012  CSN: CSN-multifpga-102
                  Mon Feb 13 16:30:39 UTC 2012


Directory config/pm/leap/demos/traffic_light
 test_multifpga_loop_acp.apm Locally Added               0 
 test_multifpga_loop.apm   Locally Modified          101 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified          101 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified          101 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service.awb Locally Modified          101 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          101 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 multilex.py               Locally Modified          101 
 environment.py            Locally Modified          101 
 platform.py               Locally Modified          101 
 multiparse.py             Locally Modified          101 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device.awb Locally Modified          101 
 unix-communication-device.bsv Locally Modified          101 

Directory modules/leap-platforms/fpga-environments/acp
 acp-dual-sram-dual.env    Locally Modified          101 
 acp-dual-sram.env         Locally Modified          101 
 acp-dual.env              Locally Modified          101 
 acp-dual-airblue.env      Locally Modified          101 

Directory modules/leap-platforms/fpga-environments/xupv5
 xupv5-dual.env            Locally Modified          101 
 xupv5-airblue-dual.env    Locally Modified          101 
 xupv5-dual-sata.env       Locally Modified          101 

Directory modules/leap-platforms/fpga-environments/sim
 sim-dual.env              Locally Modified          101 
 sim-cache-dual.env        Locally Modified          101 
 sim-airblue-env.env       Locally Modified          101 

Directory modules/multifpga/longChain
 longChain.stats           Locally Added               0 
 test-d.rrr                Locally Added               0 
 connected_application/    Locally Added               0 

Directory modules/multifpga/longChain/connected_application
 connected-application-throughput.h Locally Added               0 
 connected-application-throughput.awb Locally Added               0 
 connected-application-throughput.bsv Locally Added               0 
 connected-application-throughput.cpp Locally Added               0 

Directory modules/multifpga/longChain
 test-c.bsv                Locally Modified          101 
 test-d.bsv                Locally Modified          101 
 test_d.awb                Locally Modified          101 
 top.awb                   Locally Modified          101 


Added a more elaborate lop test, driven by software. Also, fixed small
bug where FPGA ID's were assumed to be semantically meaningful.  We
now explicitly identify the master FPGA (i.e. the one connected to the
host) in the platform configuration file.  this decision should
probably be debated more fully.

----------
kfleming    Date: Mon Feb 13 17:32:46 EST 2012  CSN: CSN-multifpga-103
                  Mon Feb 13 22:32:46 UTC 2012


Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified          102 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified          102 
 flowcontrol-ingress.bsv   Locally Modified          102 

Directory modules/multifpga/longChain
 longChain.stats           Locally Modified          102 

Directory modules/multifpga/longChain/connected_application
 connected-application-throughput.cpp Locally Modified          102 

Directory modules/multifpga/longChain
 test-c.bsv                Locally Modified          102 
 test-d.bsv                Locally Modified          102 



Fixed some obvious and glaring bugs in LJF - namely we had some
holdovers from the old days when link 0 of a lane was always
flowcontrol.  As a result, whatever link was assigned to that lane had
no flow control run on it, leading to the occasional droppin of
data. This is fixed now. 

LJF gives a 2.75x speedup on the ACP over the Random, single lane for
the loop test.  I feel like this number should be closer to 5x though,
so there's probably a performance bug in the allocation algorithm.


----------
kfleming    Date: Wed Feb 15 13:04:03 EST 2012  CSN: CSN-multifpga-104
                  Wed Feb 15 18:04:03 UTC 2012


Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified          103 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified          103 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          103 

Directory modules/multifpga/alpha_inorder
 acp_mapping_time_func.awb Locally Modified          103 


Two perf bug fixes:

1) Marshalled links were sending PHYSICAL_CONNECTION_SIZE bits, even
if the link itself was narrower than this size.  This issue only
appears when a large number of channels are allocated (probably more
than 2).  In the LJF allocation it was a significant performance issue
in some cases.

2) LJF was setting lane widths without allocating an extra bit for
valid signalling. As a result the priority link for which the lane was
being sized was always forced to a marshalled implementation.  No
wonder LJF performance had been bad.  

There still seems to be some issue related to flow control priority in
the LJF case.  This may be the largest remaining source of performance
degredation remaining.  The solution is probably some combination of
tweaking when FC tokens get returned, increasing buffer length, and
giving priority to FC channels.  FC channels currently have very low
priority (based on my reading of the arbiter code). 




----------
mcadler     Date: Fri Feb 17 19:28:18 EST 2012  CSN: CSN-multifpga-105
                  Sat Feb 18 00:28:18 UTC 2012


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-slave.apm Locally Modified          104 
 multifpga-platform-services-master.apm Locally Modified          104 

Update stale configurations.

----------
mcadler     Date: Sun Feb 19 09:49:30 EST 2012  CSN: CSN-multifpga-106
                  Sun Feb 19 14:49:30 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/bluespec
 BSVmulti.py               Locally Modified          105 

A number of patches from BSV.py in leap were missing from the multi-FPGA version,
including some dependence tracking and an update to global string tables.
The latter caused string table corruption.

----------
mcadler     Date: Wed Feb 29 16:07:51 EST 2012  CSN: CSN-multifpga-108
                  Wed Feb 29 21:07:51 UTC 2012


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-slave.apm Locally Modified          107 

Directory modules/leap/virtual-platform/virtual-devices/platform-services
 platform-services-master.bsv Locally Modified          107 

Directory modules/multifpga/longChain/connected_application
 connected-application-throughput.cpp Locally Modified          107 

Directory modules/multifpga/synthTest/connected_application
 connected-application-test.cpp Locally Modified          107 
 connected-application-perf.cpp Locally Modified          107 

Directory modules/multifpga/inter-fpga-test
 inter-fpga-test.cpp       Locally Modified          107 

Directory modules/multifpga/throughputTest/connected_application
 connected-application-throughput.cpp Locally Modified          107 

Directory modules/multifpga/scratchdual/connected_application
 connected-application-test.cpp Locally Modified          107 

STATS_DEVICE is now STATS_SERVER.

----------
mcadler     Date: Wed Feb 29 20:12:06 EST 2012  CSN: CSN-multifpga-109
                  Thu Mar  1 01:12:06 UTC 2012


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-slave.apm Locally Modified          108 

Directory modules/leap/build-support/build-pipelines/stages/bluespec
 BSVmulti.py               Locally Modified          108 

Directory modules/multifpga/airblue
 acp-mapping.map           Locally Modified          108 

Directory modules/multifpga/h264
 acp-mapping.map           Locally Modified          108 
 sim-mapping.map           Locally Modified          108 

Directory modules/multifpga/synthTest
 sim-alternative.map       Locally Modified          108 
 sim-mapping.map           Locally Modified          108 
 acp-mapping.map           Locally Modified          108 
 acp-perf.map              Locally Modified          108 

Directory modules/multifpga/alpha_inorder
 sim-mapping-time-func.map Locally Modified          108 
 sim-mapping-time-func-cache.map Locally Modified          108 
 acp-mapping-time-func-cache-2.map Locally Modified          108 
 sim-mapping.map           Locally Modified          108 
 acp-mapping-time-func.map Locally Modified          108 
 acp-mapping-time-func-cache-3.map Locally Modified          108 
 acp-mapping-time-func-cache.map Locally Modified          108 

- Now that common services are a synthesis boundary, the code for slave FPGAs
  is actually simpler.  We no longer need the "NULL" implementation.  Instead,
  it is mapped to the master.

- Merge changes from LEAP's BSV.py to BSVmulti.py

----------
mcadler     Date: Thu Mar 15 15:28:25 EDT 2012  CSN: CSN-multifpga-110
                  Thu Mar 15 19:28:25 UTC 2012


Directory config/pm/multifpga/fpga_submodels
 acp0-sram.apm             Locally Modified          109 
 acp0.apm                  Locally Modified          109 
 acp1-sram.apm             Locally Modified          109 
 acp1.apm                  Locally Modified          109 
 acp1-passthrough.apm      Locally Modified          109 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          109 

- Generate debug scan data with named fields in the inter-FPGA router.
- Clean up ACP configuration files using latest awb that doesn't save
  global parameters with default values.

  

----------
kfleming    Date: Fri Mar 16 16:49:30 EDT 2012  CSN: CSN-multifpga-111
                  Fri Mar 16 20:49:30 UTC 2012


Directory config/pm/leap/demos/traffic_light
 test_multifpga_spiral_exe.apm Locally Added               0 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpgaN.apm Locally Added               0 
 multifpgaenv-hybrid-exe-fpga0-quad.apm Locally Added               0 

Directory config/pm/multifpga/fpga_submodels
 fpga0_4.apm               Locally Added               0 
 fpga1_4.apm               Locally Added               0 
 fpga2_4.apm               Locally Added               0 
 fpga3_4.apm               Locally Added               0 
 fpga0.apm                 Locally Modified          110 
 fpga1.apm                 Locally Modified          110 
 fpga0-dist-cache.apm      Locally Modified          110 
 fpga1-dist-cache.apm      Locally Modified          110 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified          110 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified          110 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          110 
 danglingConnection.py     Locally Modified          110 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 tool.py                   Locally Modified          110 
 multilex.py               Locally Modified          110 
 environment.py            Locally Modified          110 

Directory modules/leap/build-support/build-pipelines/stages/wrapper_gen
 fpgamaplex.py             Locally Modified          110 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation
 fpgaN/                    Locally Added               0 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpgaN
 sim-physical-platform-fpgaN.h Locally Added               0 
 sim-physical-platform-fpgaN.awb Locally Added               0 
 sim-physical-platform-fpgaN.bsv Locally Added               0 
 sim-physical-platform-fpgaN.bsh Locally Added               0 
 sim-physical-platform-fpgaN.cpp Locally Added               0 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpga0
 sim-physical-platform-fpga0.awb Locally Modified          110 
 sim-physical-platform-fpga0.bsv Locally Modified          110 

Directory modules/leap-platforms/fpga-environments/sim
 sim_fpga_env_quad.awb     Locally Added               0 
 sim-dual.env              Locally Modified          110 
 sim-cache-dual.env        Locally Modified          110 
 sim-quad-ring.env         Locally Added               0 
 sim-quad.env              Locally Added               0 
 sim_fpga_env_quad_ring.awb Locally Added               0 

Directory modules/multifpga
 ringTest/                 Locally Added               0 

Directory modules/multifpga/ringTest
 test_d_chains.awb         Locally Added               0 
 test-a.bsv                Locally Added               0 
 test-b.bsv                Locally Added               0 
 test_a.awb                Locally Added               0 
 test-d-rrr.rrr            Locally Added               0 
 test_b.awb                Locally Added               0 
 test-c-chains.bsv         Locally Added               0 
 test-d-chains.bsv         Locally Added               0 
 test-c.dic                Locally Added               0 
 test-d.dic                Locally Added               0 
 test_c_chains.awb         Locally Added               0 

Directory modules/multifpga/longChain/connected_application
 connected-application-throughput.cpp Locally Modified          110 

Directory modules/multifpga/synthTest
 sim_mapping_ring1.awb     Locally Added               0 
 sim_mapping_ring2.awb     Locally Added               0 
 sim-ring1.map             Locally Added               0 
 sim-ring2.map             Locally Added               0 

Directory modules/multifpga/synthTest/connected_application
 connected-application-test.cpp Locally Modified          110 

Directory modules/multifpga/alpha_inorder
 sim_mapping_quad.awb      Locally Added               0 
 sim-mapping-quad.map      Locally Added               0 

Directory modules/multifpga
 spiral/                   Locally Added               0 

Directory modules/multifpga/spiral
 test_common.bsv           Locally Added               0 
 test-a.bsv                Locally Added               0 
 test-b.bsv                Locally Added               0 
 test_a.awb                Locally Added               0 
 test_b.awb                Locally Added               0 
 test-c.bsv                Locally Added               0 
 test-d.bsv                Locally Added               0 
 test_c.awb                Locally Added               0 
 test_d.awb                Locally Added               0 
 test_top.bsv              Locally Added               0 
 test-common.bsv           Locally Added               0 
 longChain.stats           Locally Added               0 
 test_common.awb           Locally Added               0 
 test-d.rrr                Locally Added               0 
 top.awb                   Locally Added               0 


This large commit adds support for FPGA platforms with more than two
FPGAS.  This includes platforms with assymetric connections between FPGAs.

1) Added a new simulation platforms which generates N links between
simulation FPGAs.  This allows us to reuse the same physical platform
for all simulation runs.

2) Added route through links. If FPGAs are not physically connected,
the compiler syntheisizes routing between them.  I currently don't do
anything clever here.

3) Added configurations and test cases to test the new code. Things
seem to be working.


----------
kfleming    Date: Sun Mar 18 18:33:50 EDT 2012  CSN: CSN-multifpga-112
                  Sun Mar 18 22:33:50 UTC 2012


Directory config/pm/leap/demos
 traffic_light/            Locally Removed           111 

Directory config/pm/leap/demos/traffic_light
 test_multifpga_loop_acp.apm Locally Removed           111 
 test_multifpga_throughput_acp.apm Locally Removed           111 
 test_multifpga_perf_xupv5.apm Locally Removed           111 
 test_multifpga_rrr_exe.apm Locally Removed           111 
 test_multifpga_chains_exe.apm Locally Removed           111 
 test_multifpga_loop.apm   Locally Removed           111 
 test_multifpga_scratch_acp.apm Locally Removed           111 
 test_multifpga_throughput_exe.apm Locally Removed           111 
 test_multifpga_chains_xupv5_sma.apm Locally Removed           111 
 test_multifpga_chains_xupv5.apm Locally Removed           111 
 traffic_light_acp_synth_multifpga.apm Locally Removed           111 
 test_multifpga_perf_acp.apm Locally Removed           111 
 test_multifpga_alternative_exe.apm Locally Removed           111 
 test_multifpga.apm        Locally Removed           111 
 test_multifpga_throughput_xupv5.apm Locally Removed           111 
 test_multifpga_perf_acp_single.apm Locally Removed           111 
 test_multifpga_exe.apm    Locally Removed           111 
 test_multifpga_chains_xupv5_sata.apm Locally Removed           111 
 test_multifpga_scratch.apm Locally Removed           111 
 test_multifpga_rrr_acp.apm Locally Removed           111 
 test_multifpga_chains_acp.apm Locally Removed           111 
 test_multifpga_spiral_exe.apm Locally Removed           111 


Moved the multifpga test cases from traffic_light to multifpga.  Not
great, but better than before.

----------
mcadler     Date: Mon Mar 19 19:39:57 EDT 2012  CSN: CSN-multifpga-113
                  Mon Mar 19 23:39:57 UTC 2012


Directory modules/multifpga/longChain/connected_application
 connected-application-throughput.cpp Locally Modified          112 

Directory modules/multifpga/synthTest/connected_application
 connected-application-test.cpp Locally Modified          112 
 connected-application-perf.cpp Locally Modified          112 

Directory modules/multifpga/inter-fpga-test
 inter-fpga-test.cpp       Locally Modified          112 

Directory modules/multifpga/throughputTest/connected_application
 connected-application-throughput.cpp Locally Modified          112 

Directory modules/multifpga/scratchdual/connected_application
 connected-application-test.cpp Locally Modified          112 

Statistics initialization now handled by common platform services.  If these
modules used the standard application wrapper they wouldn't have to deal with
statistics at all.

----------
mcadler     Date: Sun Mar 25 17:11:37 EDT 2012  CSN: CSN-multifpga-114
                  Sun Mar 25 21:11:37 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          113 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          113 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 tool.py                   Locally Modified          113 

Directory modules/multifpga/ringTest
 test_d_chains.awb         Locally Modified          113 
 test-c-chains.bsv         Locally Modified          113 
 test-d-chains.bsv         Locally Modified          113 
 test-c.dic                Locally Removed           113 
 test-d.dic                Locally Removed           113 
 test_c_chains.awb         Locally Modified          113 

Directory modules/multifpga/synthTest
 test_d_chains.awb         Locally Modified          113 
 test-c-chains.bsv         Locally Modified          113 
 test-c.dic                Locally Removed           113 
 test-d.dic                Locally Removed           113 
 test_c_chains.awb         Locally Modified          113 
 test_d_rrr.awb            Locally Modified          113 
 test-d-chains.bsv         Locally Modified          113 
 test_d_perf.awb           Locally Modified          113 

Statistics IDs are now global strings instead of dictionary entries.

----------
mcadler     Date: Mon Mar 26 18:56:09 EDT 2012  CSN: CSN-multifpga-115
                  Mon Mar 26 22:56:09 UTC 2012


Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified          114 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          114 

- Move router statistics generation to a Python class so the code is in one
  place.

- Generate all statistics for a module as a single node instead of one node
  per counter.  Even on small designs this saves about 4% of a Virtex 5-LX330.

- Clean up some of the code generated by the Python script (break long lines)
  so it is human readable.

- Pass statistics increment methods as functions to the router code
  (needed for grouping multiple counters into a single node).

----------
mcadler     Date: Tue Mar 27 20:47:45 EDT 2012  CSN: CSN-multifpga-116
                  Wed Mar 28 00:47:45 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          115 

Move the code generation for statistics increments to the statistics class,
leaving only one line to change in order to use a different method.

----------
mcadler     Date: Thu Mar 29 08:02:58 EDT 2012  CSN: CSN-multifpga-117
                  Thu Mar 29 12:02:58 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          116 

Use non-blocking statistics counters to avoid deadlock.

----------
kfleming    Date: Fri Apr  6 18:00:15 EDT 2012  CSN: CSN-multifpga-118
                  Fri Apr  6 22:00:15 UTC 2012


Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified          117 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-ingress.bsv   Locally Modified          117 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 via.py                    Locally Modified          117 
 multiFPGAConnect.py       Locally Modified          117 

Directory modules/multifpga/spiral
 test_common.bsv           Locally Modified          117 
 test-common.bsv           Locally Modified          117 
 test_common.awb           Locally Modified          117 


Added support for back-to-back reads from the same channel in the
ingress switch.  This required adding more precise buffer control
mechanims to the packetizers and soft-connections.

Also, I made the type generation for the lanes a little more precise.
Now we use the maximum width link actually allocated to the lane,
rather than the PHYSICAL_CONNECTION_SIZE.  This makes packets more
efficient. It also allows us to eliminate marshalling logic in some of
the packetizers.

----------
mcadler     Date: Wed Apr 11 17:45:14 EDT 2012  CSN: CSN-multifpga-119
                  Wed Apr 11 21:45:14 UTC 2012


Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_128_connected_application.apm Locally Added               0 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_acp_128_multifpga_dual_sram.apm Locally Added               0 

Add configuration for 128-core mesh model.

----------
kfleming    Date: Tue Apr 17 17:53:14 EDT 2012  CSN: CSN-multifpga-120
                  Tue Apr 17 21:53:14 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          119 


Fixed bug in router type generation.  Python defaults to log base 2 as opposed to log base e.

----------
mcadler     Date: Sun Apr 22 09:24:02 EDT 2012  CSN: CSN-multifpga-121
                  Sun Apr 22 13:24:02 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/bluespec
 BSV-multi.py              Locally Removed           120 
 BSVmulti.py               Locally Modified          120 

Directory modules/leap/build-support/build-pipelines/stages/wrapper_gen
 multifpga_wrapper_gen.py  Locally Modified          120 

Port recent changes from LEAP.

----------
mcadler     Date: Mon Apr 23 18:58:29 EDT 2012  CSN: CSN-multifpga-122
                  Mon Apr 23 22:58:29 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          121 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          121 

Directory modules/leap/build-support/build-pipelines/stages/bluespec
 BSVmulti.py               Locally Modified          121 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 tool.py                   Locally Modified          121 

Directory modules/leap/build-support/build-pipelines/stages/wrapper_gen
 multifpga_wrapper_gen.py  Locally Modified          121 

Directory modules/leap/build-support/pipelines/multifpga_platform
 FPGAPlatformPipeline.py   Locally Modified          121 

New method of managing AWB parameters in the build flow that permits overriding
AWB parameters at compile time.  (See check-in to leap package.)

----------
mcadler     Date: Tue Apr 24 17:48:26 EDT 2012  CSN: CSN-multifpga-123
                  Tue Apr 24 21:48:26 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/bluespec
 BSVmulti.py               Locally Modified          122 

Support for the latest Bluespec compiler that doesn't generate .bi files.
Still works with old compilers.

----------
mcadler     Date: Wed Apr 25 21:52:46 EDT 2012  CSN: CSN-multifpga-124
                  Thu Apr 26 01:52:46 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/wrapper_gen
 multifpga_wrapper_gen.py  Locally Modified          123 

Add [Module] types to synthesis-boundary top-level modules in order to compile
correctly when no compiler back end is enabled.  (Per recommendation from
Bluespec.)

----------
kfleming    Date: Wed Apr 25 23:38:46 EDT 2012  CSN: CSN-multifpga-125
                  Thu Apr 26 03:38:46 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          124 


Concatenating strings files together as a part of the build process
saves me time.  Rent or buy?  Buy....

----------
mcadler     Date: Sat Apr 28 20:18:01 EDT 2012  CSN: CSN-multifpga-126
                  Sun Apr 29 00:18:01 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/bluespec
 BSVmulti.py               Locally Modified          125 

Directory modules/leap/build-support/build-pipelines/stages/wrapper_gen
 multifpga_wrapper_gen.py  Locally Modified          125 

All synthesis boundaries are now built in parallel and instantiated in the
top-level model build.  See the corresponding comment for leap.

----------
mcadler     Date: Sun Apr 29 19:31:34 EDT 2012  CSN: CSN-multifpga-127
                  Sun Apr 29 23:31:34 UTC 2012


Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpgaN.apm Locally Modified          126 
 multifpgaenv-hybrid-exe-fpga0.apm Locally Modified          126 
 multifpgaenv-hybrid-exe-airblue-fpga0.apm Locally Modified          126 
 multifpgaenv-hybrid-exe-fpga1.apm Locally Modified          126 
 multifpgaenv-hybrid-exe-airblue-fpga1.apm Locally Modified          126 
 multifpgaenv-hybrid-exe-fpga0-dist-cache.apm Locally Modified          126 
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified          126 
 multifpgaenv-hybrid-exe-fpga0-quad.apm Locally Modified          126 

Directory config/pm/leap/submodels/pipelines
 build-pipeline-xilinx-multifpga.apm Locally Modified          126 

Directory config/pm/airblue/library_tests
 softphy_SOVA_acp.apm      Locally Modified          126 

Directory config/pm/h264
 softphy_SOVA_acp.apm      Locally Modified          126 
 h264_multifpga_decoder_split_synth.apm Locally Modified          126 
 h264_multifpga_decoder_split_synth_exe.apm Locally Modified          126 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_ring_acp_16_multifpga_sram.apm Locally Modified          126 
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram.apm Locally Modified          126 
 alpha_inorder_dm_wt_ring_acp_64_multifpga_sram.apm Locally Modified          126 
 alpha_inorder_dm_wt_ring_acp_16_multifpga_sram_big_cache.apm Locally Modified          126 
 alpha_inorder_dm_wt_mesh_acp_64_multifpga_dual_sram.apm Locally Modified          126 
 alpha_inorder_dm_wt_ring_acp_16_dual_multifpga_sram.apm Locally Modified          126 
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram_4_lanes.apm Locally Modified          126 
 alpha_inorder_dm_wt_ring_acp_32_multifpga.apm Locally Modified          126 
 alpha_inorder_multifpga_time_func_xupv5.apm Locally Modified          126 
 alpha_inorder_dm_wt_ring_acp_16_multifpga.apm Locally Modified          126 
 alpha_inorder_dm_wt_ring_acp_64_multifpga.apm Locally Modified          126 
 alpha_inorder_dm_wt_ring_acp_16_multifpga_sram_2.apm Locally Modified          126 
 alpha_inorder_dm_wt_ring_acp_16_multifpga_sram_3.apm Locally Modified          126 
 alpha_inorder_multifpga_time_func_16_acp_dual_sram.apm Locally Modified          126 
 alpha_inorder_dm_wt_mesh_acp_128_multifpga_dual_sram.apm Locally Modified          126 
 alpha_inorder_dm_wt_ring_exe_16_multifpga.apm Locally Modified          126 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-xupv5-fpga0-sata.apm Locally Modified          126 
 multifpgaenv-hybrid-xupv5-fpga1-sata.apm Locally Modified          126 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified          126 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified          126 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multi-fpga-connect.awb    Locally Modified          126 

Directory modules/leap/build-support/build-pipelines/stages
 bluespec/                 Locally Removed           126 

Directory modules/leap/build-support/build-pipelines/stages/bluespec
 bsv-multi.awb             Locally Removed           126 
 BSVmulti.py               Locally Removed           126 

Directory modules/leap/build-support/build-pipelines/stages/wrapper_gen
 multi-fpga-wrapper-gen.awb Locally Removed           126 
 multifpga_wrapper_gen.py  Locally Removed           126 

Directory modules/leap/build-support/pipelines/multifpga_platform_sim
 sim-build-pipeline-multifpga.awb Locally Modified          126 

Directory modules/leap/build-support/pipelines/multifpga_platform
 fpga-platform-build-pipeline.awb Locally Modified          126 

Tired of maintaining multi-FPGA-specific versions of build_bsv and
wrapper_gen_tool build pipeline stages.  The leap versions now support
multi-FPGA.


----------
mcadler     Date: Sun Apr 29 19:36:03 EDT 2012  CSN: CSN-multifpga-128
                  Sun Apr 29 23:36:03 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multi-fpga-connect.awb    Locally Modified          127 

Accidentally changed the max. number of vias 3 to in the last commit.

----------
mcadler     Date: Mon Apr 30 17:02:23 EDT 2012  CSN: CSN-multifpga-129
                  Mon Apr 30 21:02:23 UTC 2012


Directory modules/leap/build-support/build-pipelines/pipelines/multifpga
 multifpga-build-pipeline.awb Locally Modified          128 

Directory modules/leap/build-support/project
 platform-multifpga.awb    Locally Modified          128 
 project-multifpga.awb     Locally Modified          128 

Directory modules/leap/build-support/pipelines/multifpga_platform_sim
 sim-build-pipeline-multifpga.awb Locally Modified          128 

Directory modules/leap/build-support/pipelines/multifpga_platform
 fpga-platform-build-pipeline.awb Locally Modified          128 

BUILD_PIPELINE_DEBUG flag shouldn't cause recompilation.

----------
mcadler     Date: Wed May  9 22:50:19 EDT 2012  CSN: CSN-multifpga-130
                  Thu May 10 02:50:19 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multi-fpga-connect.awb    Locally Modified          129 

Change the default number of vias to 4.

----------
kfleming    Date: Wed May 16 21:57:40 EDT 2012  CSN: CSN-multifpga-131
                  Thu May 17 01:57:40 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 viaAssignment.py          Locally Added               0 
 multi-fpga-connect.awb    Locally Modified          130 
 via.py                    Locally Modified          130 
 multiFPGAConnect.py       Locally Modified          130 
 linkAssignment.py         Locally Added               0 

Directory modules/leap/build-support/pipelines/multifpga_platform_sim
 SimulationPipelineMultiFPGA.py Locally Modified          130 


Refactored random and ljf channel allocation schemes to share many
pieces of code.  In particular the random scheme is reduced to around
20 lines of code.  

Random allocation now attempts to do load balancing, although for the
case I tested (2 lanes, 16 cores) no performance gain was achieved. 


----------
kfleming    Date: Wed May 30 10:34:23 EDT 2012  CSN: CSN-multifpga-132
                  Wed May 30 14:34:23 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          131 


Two bug fixes:

Fixed int/float cast bug that was causing some builds to fail, since chains not in the stats report were were weighted 0

If no link is assigned to the via, we use the via width at the maximum length.  This seems reasonable. 

----------
keflemin    Date: Thu Jun 14 09:51:32 EDT 2012  CSN: CSN-multifpga-133
                  Thu Jun 14 13:51:32 UTC 2012


Directory config/pm/leap
 tests/                    Locally Added               0 

Directory config/pm/leap/tests
 mem_perf/                 Locally Added               0 

Directory config/pm/leap/tests/mem_perf
 mem_perf_multifpga_acp.apm Locally Added               0 

Directory config/pm/leap/submodels/common
 multifpga-soft-services.apm Locally Modified          132 

Directory modules/multifpga
 mem_perf/                 Locally Added               0 

Directory modules/multifpga/mem_perf
 acp_mapping.awb           Locally Added               0 
 acp-mapping.map           Locally Added               0 


Added support for memory performance test on multiple FPGAs. 

----------
keflemin    Date: Fri Jun 15 16:45:49 EDT 2012  CSN: CSN-multifpga-134
                  Fri Jun 15 20:45:49 UTC 2012


Directory config/pm/leap/tests/mem_perf
 mem_perf_multifpga_single_mem_acp.apm Locally Added               0 
 mem_perf_multifpga_acp.apm Locally Modified          133 


Fixed memory test for the ACP.

----------
kfleming    Date: Wed Jun 20 19:21:42 EDT 2012  CSN: CSN-multifpga-135
                  Wed Jun 20 23:21:42 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          134 



Added brute-force channel allocation algorithm.  This runs over all
possible program-driven channel allocations and picks the best lane
allocation.  This can take a very long time to run (exponential), and
it doesn't do any better than LJF and only a little better than
random. Ball in bins to the max!

----------
mcadler     Date: Mon Jun 25 16:29:35 EDT 2012  CSN: CSN-multifpga-136
                  Mon Jun 25 20:29:35 UTC 2012


Directory modules/multifpga/alpha_inorder
 sim-mapping-time-func.map Locally Modified          135 
 sim-mapping-time-func-cache.map Locally Modified          135 
 sim-mapping-quad.map      Locally Modified          135 
 acp-mapping-time-func-cache-2.map Locally Modified          135 
 sim-mapping.map           Locally Modified          135 
 acp-mapping-time-func.map Locally Modified          135 
 acp-mapping-time-func-cache-3.map Locally Modified          135 
 acp-mapping-time-func-cache.map Locally Modified          135 

Place HAsim commands_service (usually with the timing model).

----------
kfleming    Date: Mon Jul  2 16:11:13 EDT 2012  CSN: CSN-multifpga-137
                  Mon Jul  2 20:11:13 UTC 2012


Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram.apm Locally Modified          136 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          136 
 danglingConnection.py     Locally Modified          136 


Added support for module decorations on soft connections in the
multifpga compiler.

----------
kfleming    Date: Thu Jul 12 18:10:06 EDT 2012  CSN: CSN-multifpga-138
                  Thu Jul 12 22:10:06 UTC 2012


Directory config/pm/leap/tests/mem_perf
 mem_perf_multifpga_acp.apm Locally Modified          137 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram.apm Locally Modified          137 
 alpha_inorder_dm_wt_ring_acp_16_dual_multifpga_sram.apm Locally Modified          137 
 alpha_inorder_multifpga_time_func_exe.apm Locally Modified          137 
 alpha_inorder_dm_wt_mesh_acp_128_multifpga_dual_sram.apm Locally Modified          137 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 typelex.py                Locally Added               0 
 type_parser.py            Locally Added               0 
 multiFPGAConnect.py       Locally Modified          137 
 dumpStructures.tcl        Locally Added               0 
 danglingConnection.py     Locally Modified          137 
 taggedUnion.py            Locally Added               0 
 member.py                 Locally Added               0 
 parse_type.py             Locally Added               0 
 multi-fpga-connect.awb    Locally Modified          137 
 typeparser.awb            Locally Added               0 
 type.py                   Locally Added               0 
 struct.py                 Locally Added               0 


Added a parser for bluespec types. We can now build a type representation in python.

----------
kfleming    Date: Mon Jul 16 17:34:29 EDT 2012  CSN: CSN-multifpga-139
                  Mon Jul 16 21:34:29 UTC 2012


Directory config/pm/leap/demos/multifpga
 test_multifpga_loop_acp.apm Locally Modified          138 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          138 


Added support for counting the number of lanes enqueued per
cycle. This helps evaluate the quality of channel allocations.

----------
keflemin    Date: Wed Jul 18 10:57:04 EDT 2012  CSN: CSN-multifpga-140
                  Wed Jul 18 14:57:04 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          139 
 multi-fpga-connect.awb    Locally Modified          139 


Added awb parameters to control the lane allocation scheme used by the 
multifpga compiler. This is useful in scripting experiments. 


----------
kfleming    Date: Thu Jul 19 00:01:28 EDT 2012  CSN: CSN-multifpga-141
                  Thu Jul 19 04:01:28 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          140 
 viaAssignment.py          Locally Modified          140 


Fixed bug in load balancer code.  We made the assumption that header
were 12 bits wide, but this was causing load balancing mistakes for
narrow lanes. Now the load balancing is recursive. We set provisional
header widths, do a lane allocation, and check if the provisional
header sizes were feasible.  If they weren't, we store the correct
header sizes and iterate until a fixed point is reached.  Usually this
happens after a couple of iterations.  

Balancing errors in HAsim were as high as 40%, but now seem to be
under 10%.


----------
kfleming    Date: Sat Jul 21 18:50:15 EDT 2012  CSN: CSN-multifpga-142
                  Sat Jul 21 22:50:15 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 typelex.py                Locally Modified          141 
 multiFPGAConnect.py       Locally Modified          141 
 typeclass.py              Locally Added               0 
 typeparser.awb            Locally Modified          141 
 type.py                   Locally Modified          141 


Added parser support for examining typeclasses and instances in
advance of the Compress typeclass.  Parser now handles functions and
provisos.

I also added better support for recognizing polymorphic types, which
will be needed for type unification of polymorphic Compress instances.

----------
mcadler     Date: Mon Jul 23 07:39:23 EDT 2012  CSN: CSN-multifpga-143
                  Mon Jul 23 11:39:23 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 tool.py                   Locally Modified          142 

Now that AWB parameters can be updated on the SCons command line it is necessary
to pass all command line arguments down to the first pass (logfile) build instead
of just DEBUG, OPT, TRACE and EVENTS.

----------
kfleming    Date: Mon Jul 23 19:45:24 EDT 2012  CSN: CSN-multifpga-144
                  Mon Jul 23 23:45:24 UTC 2012


Directory config/pm/leap/demos/multifpga
 test_multifpga_loop.apm   Locally Modified          143 
 test_multifpga_compress.apm Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 linkType.py               Locally Added               0 
 multiFPGAConnect.py       Locally Modified          143 
 taggedUnion.py            Locally Modified          143 
 member.py                 Locally Modified          143 
 parse_type.py             Locally Modified          143 
 typeparse.py              Locally Added               0 
 multi-fpga-connect.awb    Locally Modified          143 
 type.py                   Locally Modified          143 
 struct.py                 Locally Modified          143 

Directory modules/multifpga/compressionTest
 connected_application/    Locally Removed           143 

Directory modules/multifpga/compressionTest/connected_application
 connected-application-throughput.h Locally Removed           143 
 connected-application-throughput.awb Locally Removed           143 
 connected-application-throughput.bsv Locally Removed           143 
 connected-application-throughput.cpp Locally Removed           143 

Directory modules/multifpga/compressionTest
 test_b.awb                Locally Removed           143 
 test_top.bsv              Locally Removed           143 
 top.awb                   Locally Removed           143 


Began adding support for type unification of Compression class. This
may end up being more difficult than I initially imagined.  

This checkin also disables type parsing by parameter, since it is an
experimental feature.  I also *added* the type parser, an embarassing
omission that was discovered by Michael Adler.

----------
mcadler     Date: Fri Aug  3 16:43:14 EDT 2012  CSN: CSN-multifpga-145
                  Fri Aug  3 20:43:14 UTC 2012


Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_acp_64_multifpga_dual_sram.apm Locally Modified          144 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          144 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          144 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 tool.py                   Locally Modified          144 

Generate APM files in a sub-directory of the build instead of in the workspace's
private config tree.  This allows for parallel building of the same model
(in different pm directories) with no destructive interference in APM files.

----------
keflemin    Date: Wed Aug  8 11:16:02 EDT 2012  CSN: CSN-multifpga-146
                  Wed Aug  8 15:16:02 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          145 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          145 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 tool.py                   Locally Modified          145 
 multi_fpga_parse.awb      Locally Modified          145 


Two refinements as a result of ongoing characterizations efforts

1) Simplified the generation of packet types for the routers.  I was
   trying to use bluespec type functions, but that was resulting in
   errors in some cases. Instead, python just calculates the numbers. 

2) When labelling channels with loading factors, we can now match
   soft-connection chunks against the base name.  In the case of many
   narrow lanes this is necessary to get a good placement. 


----------
keflemin    Date: Thu Aug  9 19:39:03 EDT 2012  CSN: CSN-multifpga-147
                  Thu Aug  9 23:39:03 UTC 2012


Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_acp_64_multifpga_dual_sram.apm Locally Modified          146 
 alpha_inorder_dm_wt_mesh_exe_8_128_multifpga_dual_sram.apm Locally Added               0 

Directory config/pm/multifpga/fpga_submodels
 fpga0_8.apm               Locally Added               0 
 fpga1_8.apm               Locally Added               0 
 fpga2_8.apm               Locally Added               0 
 fpga3_8.apm               Locally Added               0 
 fpga4_8.apm               Locally Added               0 
 fpga5_8.apm               Locally Added               0 
 fpga6_8.apm               Locally Added               0 
 fpga7_8.apm               Locally Added               0 

Directory modules/leap-platforms/fpga-environments/sim
 sim-octo.env              Locally Added               0 
 sim_fpga_env_octo.awb     Locally Added               0 

Directory modules/multifpga/alpha_inorder
 sim-mapping-time-func-cache-8.map Locally Added               0 
 sim_mapping_time_func_cache_8.awb Locally Added               0 


Added 8-way software simulator for 128-core hasim. 

----------
kfleming    Date: Fri Aug 10 14:15:00 EDT 2012  CSN: CSN-multifpga-148
                  Fri Aug 10 18:15:00 UTC 2012


Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram.apm Locally Modified          147 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified          147 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 Schedulers.bsv            Locally Modified          147 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 typelex.py                Locally Modified          147 
 linkType.py               Locally Modified          147 
 multiFPGAConnect.py       Locally Modified          147 
 taggedUnion.py            Locally Modified          147 
 member.py                 Locally Modified          147 
 typeparse.py              Locally Modified          147 
 type.py                   Locally Modified          147 
 struct.py                 Locally Modified          147 

Directory modules/multifpga/compressionTest
 test-c.bsv                Locally Modified          147 
 test-d.bsv                Locally Modified          147 

Directory modules/multifpga/longChain
 longChain.stats           Locally Modified          147 


Support for automatic instantiation of compressor typeclass from
source.

----------
kfleming    Date: Mon Sep 10 16:52:03 EDT 2012  CSN: CSN-multifpga-149
                  Mon Sep 10 20:52:03 UTC 2012


Directory config/pm/leap/demos/multifpga
 test_multifpga_chains_exe.apm Locally Modified          148 
 test_multifpga_throughput_exe.apm Locally Modified          148 
 test_multifpga_spiral_exe.apm Locally Modified          148 

Directory config/pm/h264
 h264_multifpga_decoder_split_synth.apm Locally Modified          148 
 h264_multifpga_decoder_split_synth_exe.apm Locally Modified          148 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_exe.apm Locally Modified          148 
 alpha_inorder_dm_wt_mesh_exe_16_multifpga_dual_sram.apm Locally Added               0 
 alpha_inorder_dm_wt_mesh_exe_16_multifpga_quad_sram.apm Locally Added               0 
 alpha_inorder_dm_wt_mesh_exe_64_multifpga_octo_sram.apm Locally Added               0 
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram_4_lanes.apm Locally Modified          148 
 alpha_inorder_dm_wt_mesh_exe_64_multifpga_dual_sram.apm Locally Added               0 
 alpha_inorder_dm_wt_mesh_exe_64_multifpga_quad_sram.apm Locally Added               0 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified          148 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          148 
 danglingConnection.py     Locally Modified          148 
 via.py                    Locally Modified          148 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          148 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device.bsv Locally Modified          148 

Directory modules/multifpga/longChain
 test-c.bsv                Locally Modified          148 
 test-d.bsv                Locally Modified          148 

Directory modules/multifpga/h264
 sim-mapping-4.map         Locally Added               0 
 sim_mapping_4.awb         Locally Added               0 

Directory modules/multifpga/alpha_inorder
 sim-mapping-time-func-cache-4.map Locally Added               0 
 sim-mapping-quad.map      Locally Modified          148 
 sim_mapping_time_func_cache_4.awb Locally Added               0 
 sim_mapping_time_func_cache_8.awb Locally Modified          148 

Directory modules/multifpga/spiral
 test-d.bsv                Locally Modified          148 
 test-common.bsv           Locally Modified          148 
 test-common-bdpi.c        Locally Added               0 
 test-common-bdpi.h        Locally Added               0 


Huge commit, and long over due. 

1) Resurrected support for FPGA routing phase of the compiler.  This
had been allowed to bit rot.

2) Added better support for running mutliple FPGA simulations.  This
will serve as a template when we get more complex multifpga systems.

3) With this new capability, I spent a lot of time benchmarking and
playing with the simulator. Results are good: some HAsim simulators
are faster in two processes than in one!  Added testbench code.


----------
kfleming    Date: Thu Sep 13 11:58:23 EDT 2012  CSN: CSN-multifpga-150
                  Thu Sep 13 15:58:23 UTC 2012


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-slave.apm Locally Modified          149 
 multifpga-platform-services-master.apm Locally Modified          149 


Fixed compilation bug due to prefetcher requiring wider meta-data tags.  

----------
kfleming    Date: Fri Sep 14 12:24:39 EDT 2012  CSN: CSN-multifpga-151
                  Fri Sep 14 16:24:39 UTC 2012


Directory config/pm/leap/demos/multifpga
 test_multifpga_compress_acp.apm Locally Added               0 


Added compression test for acp. 

----------
kfleming    Date: Wed Sep 19 10:59:13 EDT 2012  CSN: CSN-multifpga-152
                  Wed Sep 19 14:59:13 UTC 2012


Directory config/pm/leap/demos/multifpga
 test_multifpga_compress_acp.apm Locally Modified          151 
 test_multifpga_chains_acp.apm Locally Modified          151 
 test_multifpga_compress.apm Locally Modified          151 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          151 
 danglingConnection.py     Locally Modified          151 
 code.py                   Locally Added               0 
 parse_type.py             Locally Modified          151 
 multi-fpga-connect.awb    Locally Modified          151 
 taggedUnionCompress.py    Locally Added               0 

Directory modules/multifpga/compressionTest
 common.awb                Locally Added               0 
 common.bsv                Locally Added               0 
 test-c.bsv                Locally Modified          151 
 test-d.bsv                Locally Modified          151 
 test_top.bsv              Locally Added               0 
 top.awb                   Locally Added               0 

Directory modules/multifpga/alpha_inorder
 sim-mapping-time-func-cache-8.map Locally Modified          151 


Added support for automatic compression of tagged unions. General
strategy is to 

1) Find tagged union 

2) Split tagged union into channels based on widths of member types.

3) Synthesis compression module with code for disassembling and
re-assembling split channels.

4) Inject new channels into program graph, removing original uncompressed channel.

5) Inject module code into synthesized router.


Modifications to multi-fpga-connect were small, and I think the method
of code generation employed here should generalize and simplify the
code generation phase.


----------
kfleming    Date: Thu Sep 20 12:27:35 EDT 2012  CSN: CSN-multifpga-153
                  Thu Sep 20 16:27:35 UTC 2012


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 taggedUnionCompress.py    Locally Modified          152 

Directory modules/multifpga/compressionTest
 common.bsv                Locally Modified          152 


The tagged union compressor now optimizes for same-length tagged union
legs.  Instead of building a null channel, we instantiate only one for
same-length legs.


----------
mcadler     Date: Fri Oct 12 16:02:41 EDT 2012  CSN: CSN-multifpga-154
                  Fri Oct 12 20:02:41 UTC 2012


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-slave.apm Locally Modified          153 
 multifpga-platform-services-master.apm Locally Modified          153 

Use default central cache metadata size, which is now larger than the
setting was here.

----------
mcadler     Date: Wed Oct 17 07:43:54 EDT 2012  CSN: CSN-multifpga-155
                  Wed Oct 17 11:43:54 UTC 2012


Directory config/pm/leap/demos/multifpga
 test_multifpga_perf_acp.apm Locally Modified          154 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified          154 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          154 

Timing closure was too difficult for egress arbiters that have a large number of input
ports.  The arbiter is now configurable for either the previous single cycle mode
or a new dual cycle mode in which an input channel is picked in one cycle and data
movement begins in the next cycle.  The dual cycle mode is pipelined except that the
same input channel may not be chosen in consecutive cycles.  Given that the arbiter
is already managing lots of input channels and consecutive cycles matter only when
the input channel's message size is only a single UMF chunk, this rarely affects
performance.

The current code in multiFPGAConnect.py choses multi cycle arbitration when more than
10 input ports are competing for a physical channel.

----------
kfleming    Date: Thu Oct 18 20:10:05 EDT 2012  CSN: CSN-multifpga-156
                  Fri Oct 19 00:10:05 UTC 2012


Directory config/pm/leap/tests/mem_perf
 mem_perf_multifpga_exe.apm Locally Added               0 
 mem_perf_multifpga_acp.apm Locally Modified          155 
 mem_perf_multifpga_alt_acp.apm Locally Added               0 

Directory modules/multifpga/mem_perf
 acp-mapping-alt.map       Locally Added               0 
 acp_mapping_alt.awb       Locally Added               0 
 acp-mapping.map           Locally Modified          155 
 sim_mapping.awb           Locally Added               0 
 sim-mapping.map           Locally Added               0 


Multifpga testbench now does experiments approxiamately in parallel.

----------
mcadler     Date: Tue Oct 30 15:38:17 EDT 2012  CSN: CSN-multifpga-157
                  Tue Oct 30 19:38:17 UTC 2012


Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified          156 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified          156 
 multifpgaenv-hybrid-xupv5-fpga0-sata.apm Locally Modified          156 

Directory config/pm/multifpga/inter_fpga_test/submodels
 fpgaenv-hybrid-xup-v5-pcie-sma.apm Locally Modified          156 
 fpgaenv-hybrid-xup-v5-pcie-sata.apm Locally Modified          156 

Restore XUPv5 PCIe configuration.

----------
mcadler     Date: Mon Nov  5 20:06:00 EST 2012  CSN: CSN-multifpga-158
                  Tue Nov  6 01:06:00 UTC 2012


Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-xupv5-fpga1-sata.apm Locally Modified          157 

Missing PCIe configuration.

----------
kfleming    Date: Tue Jan  1 15:58:30 EST 2013  CSN: CSN-multifpga-160
                  Tue Jan  1 20:58:30 UTC 2013


Directory config/pm/leap/submodels/fpgaenv
 fpgaenv-hybrid-ml605-pcie-aurora.apm Locally Modified          159 


Updated aurora physical platform to use new-style clock imports.

----------
kfleming    Date: Sat Jan  5 16:14:42 EST 2013  CSN: CSN-multifpga-161
                  Sat Jan  5 21:14:42 UTC 2013


Directory config/pm/leap/tests
 aurora_driver/            Locally Added               0 

Directory config/pm/leap/tests/aurora_driver
 aurora_driver_test.apm    Locally Added               0 
 fpgaenv-aurora-debug.apm  Locally Added               0 

Directory modules/leap
 debug/                    Locally Added               0 

Directory modules/leap/debug
 aurora-flowcontrol-debug/ Locally Added               0 

Directory modules/leap/debug/aurora-flowcontrol-debug
 aurora_driver.bsh         Locally Added               0 
 aurora_device.bsh         Locally Added               0 
 aurora-flowcontrol-debug.cpp Locally Added               0 
 sim-physical-platform.cpp Locally Added               0 
 aurora-flowcontrol-debug.h Locally Added               0 
 sim-physical-platform.h   Locally Added               0 
 aurora-flowcontrol-debug.awb Locally Added               0 
 sim-physical-platform.awb Locally Added               0 
 aurora-flowcontrol-debug.bsv Locally Added               0 
 README                    Locally Added               0 
 sim-physical-platform.bsv Locally Added               0 

Directory modules/leap/libraries/platform-services/aurora-service
 aurora-service.bsv        Locally Modified          160 

Directory modules/leap/examples/hello-fellow
 hello-world.bsv           Locally Modified          160 


Added test code for aurora link flow control protocol.

----------
kfleming    Date: Sun Jan  6 15:22:30 EST 2013  CSN: CSN-multifpga-162
                  Sun Jan  6 20:22:30 UTC 2013


Directory modules/leap/libraries/platform-services/aurora-service
 aurora-service.bsv        Locally Modified          161 

Directory modules/leap/examples/hello-fellow
 hello-world.bsv           Locally Modified          161 


Added some debug registers to the ml60 aurora test code. 

----------
kfleming    Date: Wed Jan 16 19:42:38 EST 2013  CSN: CSN-multifpga-163
                  Thu Jan 17 00:42:38 UTC 2013


Directory modules/leap/libraries/platform-services/aurora-service
 aurora-service.bsv        Locally Modified          162 

Directory modules/leap/examples/hello-fellow
 hello-fellow.awb          Locally Modified          162 
 hello-world.bsv           Locally Modified          162 
 hello-world.cpp           Locally Modified          162 

Directory modules/leap-platforms/fpga-environments
 ml605/                    Locally Added               0 

Directory modules/leap-platforms/fpga-environments/ml605
 ml605_fpga_env.awb        Locally Added               0 
 ml605-dual.env            Locally Added               0 



Two things, in light of the stability of the ml605

1) Added some debug refinements for the inter-fpga tests.
2) Began adding scaffold for ml605 multifpga implementations.

----------
kfleming    Date: Sun Jan 20 21:57:14 EST 2013  CSN: CSN-multifpga-164
                  Mon Jan 21 02:57:14 UTC 2013


Directory config/pm/leap/tests/mem_perf
 mem_perf_multifpga_ml605.apm Locally Added               0 

Directory config/pm/leap/demos/multifpga
 test_multifpga_chains_exe.apm Locally Modified          163 
 test_multifpga_chains_ml605.apm Locally Added               0 

Directory config/pm/leap/submodels/fpgaenv
 fpgaenv-hybrid-ml605-pcie-aurora.apm Locally Modified          163 

Directory config/pm/multifpga/fpga_submodels
 ml605_0.apm               Locally Added               0 
 ml605_1.apm               Locally Added               0 
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Added               0 
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Added               0 

Directory modules/leap/libraries/platform-services/aurora-service
 aurora-service.awb        Locally Modified          163 
 aurora-service.bsv        Locally Modified          163 



1) Added in remaining scaffold to support dual-ML605 designs

2) Added a few such designs

3) Added some switches to permit the aurora service to be used for
debugging.

----------
kfleming    Date: Wed Jan 23 21:05:15 EST 2013  CSN: CSN-multifpga-165
                  Thu Jan 24 02:05:15 UTC 2013


Directory config/pm/leap/tests/mem_perf
 mem_perf_multifpga_ml605.apm Locally Modified          164 

Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_ml605.apm Locally Added               0 
 test_multifpga_throughput_acp.apm Locally Modified          164 
 test_multifpga_perf_ml605.apm Locally Added               0 
 test_multifpga_throughput_aurora_exe.apm Locally Added               0 
 test_multifpga_chains_ml605.apm Locally Modified          164 

Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-slave.apm Locally Modified          164 
 multifpga-platform-services-master.apm Locally Modified          164 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpgaN.apm Locally Modified          164 
 multifpgaenv-hybrid-exe-fpga0.apm Locally Modified          164 
 fpgaenv-hybrid-ml605-pcie-aurora.apm Locally Modified          164 
 multifpgaenv-hybrid-exe-airblue-fpgaN-aurora.apm Locally Added               0 
 multifpgaenv-hybrid-exe-fpga0-aurora.apm Locally Added               0 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_aurora_exe.apm Locally Added               0 

Directory config/pm/multifpga/fpga_submodels
 ml605_0.apm               Locally Modified          164 
 ml605_1.apm               Locally Modified          164 
 fpga1-aurora.apm          Locally Added               0 
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          164 
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          164 
 fpga0-aurora.apm          Locally Added               0 

Directory modules/leap/libraries/platform-services/aurora-service
 aurora-service.bsv        Locally Modified          164 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpgaN
 sim-physical-platform-fpgaN.awb Locally Modified          164 
 sim-physical-platform-fpgaN.bsv Locally Modified          164 
 sim-physical-platform-fpgaN.bsh Locally Modified          164 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpga0
 sim-physical-platform-fpga0.awb Locally Modified          164 
 sim-physical-platform-fpga0.bsv Locally Modified          164 
 sim-physical-platform-fpga0.bsh Locally Modified          164 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpga1
 sim-physical-platform-fpga1.awb Locally Modified          164 
 sim-physical-platform-fpga1.bsv Locally Modified          164 
 sim-physical-platform-fpga1.bsh Locally Modified          164 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices
 simulation-communication/ Locally Added               0 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/simulation-communication
 simulation-communication-device.bsh Locally Added               0 
 simulation-communication.bsh Locally Added               0 
 simulation-communication-device.awb Locally Added               0 
 simulation-communication-device.bsv Locally Added               0 

Directory modules/leap-platforms/fpga-environments/sim
 sim-octo.env              Locally Modified          164 
 sim-dual.env              Locally Modified          164 
 sim-cache-dual.env        Locally Modified          164 
 sim-quad-ring.env         Locally Modified          164 
 sim-airblue-env.env       Locally Modified          164 
 sim_dual_aurora_env.awb   Locally Added               0 
 sim-quad.env              Locally Modified          164 
 sim-dual-aurora.env       Locally Added               0 

Directory modules/multifpga/throughputTest/connected_application
 connected-application-throughput.cpp Locally Modified          164 


1) Abstracted the simulation communication so that we can test both
the aurora flowcontrol scheme and the router network using real
workloads.  This will be helpful as the aurora flowcontrol grows more
parametric.

2) Added a simulator for the aurora flow control.

3) Added several dual ml605 designs.  Some of the designs work, though
longer runs are currently encumbered by glitches which I believe are
related to soft reset (or the lack thereof).



----------
kfleming    Date: Thu Jan 24 20:35:51 EST 2013  CSN: CSN-multifpga-166
                  Fri Jan 25 01:35:51 UTC 2013


Directory config/pm/leap/demos/multifpga
 test_multifpga_chains_exe.apm Locally Modified          165 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_acp.apm Locally Modified          165 
 alpha_inorder_multifpga_ml605.apm Locally Added               0 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          165 
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          165 

Directory modules/leap/libraries/platform-services/aurora-service
 aurora-service.bsv        Locally Modified          165 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpgaN
 sim-physical-platform-fpgaN.bsv Locally Modified          165 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpga0
 sim-physical-platform-fpga0.bsv Locally Modified          165 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpga1
 sim-physical-platform-fpga1.bsv Locally Modified          165 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device-bdpi.c Locally Modified          165 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/simulation-communication
 simulation-communication-device.bsv Locally Modified          165 


1) Some bug fixes from yesterday's check-in 

2) Changed how inter-fpga simulation fifos are created.  We were
putting them in /tmp but that's an issue if there are multiple people
using the simulator.  Instead, we now put them in $HOME/.multifpga
which enables multiple users.  If we need simulataneous simulation,
then some counter will be necessary.




----------
kfleming    Date: Mon Jan 28 15:16:11 EST 2013  CSN: CSN-multifpga-167
                  Mon Jan 28 20:16:11 UTC 2013


Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga1.apm Locally Modified          166 
 multifpgaenv-hybrid-exe-fpga0-dist-cache.apm Locally Modified          166 
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified          166 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_ml605_16_multifpga_dual_sram.apm Locally Added               0 
 alpha_inorder_multifpga_ml605.apm Locally Modified          166 


1) Fixed some APM based on recent refactoring of the multifpga simulator

2) Added some HAsim apm. 

----------
kfleming    Date: Wed Jan 30 14:21:21 EST 2013  CSN: CSN-multifpga-168
                  Wed Jan 30 19:21:21 UTC 2013


Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-ingress.bsv   Locally Modified          167 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          167 
 danglingConnection.py     Locally Modified          167 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device.awb Locally Modified          167 
 unix-communication-device.bsv Locally Modified          167 


1) Bug fix in multifpga connect.  Loads for chains and for undefined
channels were not handled properly.  As a result these channels were
almost always allocated to the same lane, which is likely to cause
some performance degredation.  

2) Added an extra parameter to the unix communication device.  This
parameter controlls word width and can be useful in provoking some
edge cases of the multifpga compiler.

These fixes were provoked by the mem_perf benchmark not working on the
ML605.  Although the cause of this is almost assuredly in the
Scratchpad code, the investigation turned up several other issues in
multifpga compilation.

We do a bad job of detecting illegal router configurations in the
python.  Bluespec does catch them and correctly fails to build, but it
would be better to throw a warning in the python and to choose a legal
configuration.  These issues typically appear in the case of heavily-
loaded, narrow lanes (<16 bits, >16 channels).  Such configuarations
can arise if some of the fast, sub-optimal routing algorithms are used.  

----------
kfleming    Date: Sun Feb 10 23:28:14 EST 2013  CSN: CSN-multifpga-169
                  Mon Feb 11 04:28:14 UTC 2013


Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          168 


Changed the remote ml605 apm to include the physical channel. This
patches the dynamic parameters enumeration issue for the ml605.  Not
satisfying to be sure, but at least we can scale the SSD. 

----------
kfleming    Date: Sat Feb 16 13:30:46 EST 2013  CSN: CSN-multifpga-170
                  Sat Feb 16 18:30:46 UTC 2013


Directory config/pm/leap/submodels/fpgaenv
 fpgaenv-hybrid-ml605-pcie-aurora.apm Locally Modified          169 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          169 
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          169 

Directory modules/leap/libraries/platform-services/aurora-service
 aurora-service.bsv        Locally Modified          169 

Directory modules/leap-platforms/fpga-environments/ml605
 ml605-dual.env            Locally Modified          169 


Updated multifpga apm and environment files to reflect the new
organization of the aurora logic.

----------
kfleming    Date: Wed Feb 20 14:16:44 EST 2013  CSN: CSN-multifpga-171
                  Wed Feb 20 19:16:44 UTC 2013


Directory config/pm/leap/demos/multifpga
 test_multifpga_chains_dual_hub_exe.apm Locally Added               0 
 test_multifpga_chains_quad_hub_ml605.apm Locally Added               0 
 test_multifpga_chains_quad_hub_exe.apm Locally Added               0 
 test_multifpga_chains_dual_hub_ml605.apm Locally Added               0 

Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-slave.apm Locally Modified          170 

Directory config/pm/multifpga/fpga_submodels
 fpga1_8.apm               Locally Modified          170 
 fpga2_8.apm               Locally Modified          170 
 fpga3_8.apm               Locally Modified          170 
 fpga4_8.apm               Locally Modified          170 
 fpga5_8.apm               Locally Modified          170 
 fpga6_8.apm               Locally Modified          170 
 fpga7_8.apm               Locally Modified          170 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          170 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          170 

Directory modules/leap-platforms/fpga-environments/ml605
 ml605_fpga_quad_hub.awb   Locally Added               0 
 ml605-dual-hub.env        Locally Added               0 
 ml605_fpga_dual_hub.awb   Locally Added               0 
 ml605-quad-hub.env        Locally Added               0 

Directory modules/leap-platforms/fpga-environments/sim
 sim-hub-quad.env          Locally Added               0 
 sim_fpga_hub_dual.awb     Locally Added               0 
 sim_fpga_hub_quad.awb     Locally Added               0 
 sim-quad.env              Locally Modified          170 
 sim-hub-dual.env          Locally Added               0 


1) Fixed bug in routethrough naming - if two routethroughs for the
same chain were routed through the same platform, these routethroughs
would have conflicting names.

2) Added ML605 and Simulation models reflecting the Bluessd organization.


----------
kfleming    Date: Tue Feb 26 20:50:35 EST 2013  CSN: CSN-multifpga-172
                  Wed Feb 27 01:50:35 UTC 2013


Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpgaN.apm Locally Modified          171 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          171 


Two bug fixes

1) Bug fix from last week was not actually a bug fix in all cases - in
some cases chains could arise that had the same name.

2) The fpgaN module was building software.

----------
mcadler     Date: Wed Feb 27 09:31:42 EST 2013  CSN: CSN-multifpga-173
                  Wed Feb 27 14:31:42 UTC 2013


Directory modules/leap/examples/hello-fellow
 hello-world.bsv           Locally Modified          172 

STDIO sync at end of run now automatic.

----------
kfleming    Date: Thu Feb 28 16:59:45 EST 2013  CSN: CSN-multifpga-174
                  Thu Feb 28 21:59:45 UTC 2013


Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          173 
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          173 

Directory modules/leap/libraries/platform-services/aurora-service
 aurora-service.bsv        Locally Modified          173 

Directory modules/multifpga/throughputTest/connected_application
 connected-application-throughput.cpp Locally Modified          173 


1) Upgraded the main ml605 targets to use the 4gbps SERDES.  In practice
this gets us a thoughput of 350MB/s/lane and a latency of about
~.3-.5us for each FPGA hop.


2) Upgraded the aurora debug interface to support vectors of FPGAs.

3) Extend range of throughput testing code. 

----------
kfleming    Date: Fri Mar  1 11:49:59 EST 2013  CSN: CSN-multifpga-175
                  Fri Mar  1 16:49:59 UTC 2013


Directory modules/multifpga/throughputTest
 test-d-throughput.bsv     Locally Modified          174 

Directory modules/multifpga/throughputTest/connected_application
 connected-application-throughput.cpp Locally Modified          174 

Directory modules/multifpga/throughputTest
 test-d-throughput.rrr     Locally Modified          174 


The throughput test now also tracks average latency.  Little's law
rides again.

----------
mcadler     Date: Fri Mar  1 14:10:00 EST 2013  CSN: CSN-multifpga-176
                  Fri Mar  1 19:10:00 UTC 2013


Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_16_connected_application.apm Locally Modified          175 
 alpha_inorder_dm_wt_ring_acp_32_connected_application.apm Locally Modified          175 
 alpha_inorder_dm_wt_mesh_acp_64_connected_application.apm Locally Modified          175 
 alpha_inorder_dm_wt_ring_acp_16_connected_application.apm Locally Modified          175 
 alpha_inorder_dm_wt_mesh_acp_128_connected_application.apm Locally Modified          175 
 alpha_inorder_dm_wt_ring_acp_64_connected_application.apm Locally Modified          175 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_acp.apm Locally Modified          175 
 alpha_inorder_multifpga_time_func_16_acp_sram.apm Locally Modified          175 

Changed AWB parameter NUM_CPUS to MAX_NUM_CPUS.

----------
kfleming    Date: Mon Mar  4 13:50:27 EST 2013  CSN: CSN-multifpga-177
                  Mon Mar  4 18:50:27 UTC 2013


Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          176 
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          176 

Directory modules/leap/libraries/platform-services/aurora-service
 aurora-service.bsv        Locally Modified          176 


Upgraded ml605 builds to use the 5gbps transceivers. 

----------
kfleming    Date: Wed Mar  6 16:02:14 EST 2013  CSN: CSN-multifpga-178
                  Wed Mar  6 21:02:14 UTC 2013


Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_dual_hub_ml605.apm Locally Added               0 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          177 
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          177 

Directory modules/leap-platforms/fpga-environments/ml605
 ml605-dual-hub.env        Locally Modified          177 


Added new dual-hub design.  This runs on a 3-FPGA configuration of
ML605s.  Also updated the ml605 apm to reflect the new code in the
aurora.

----------
kfleming    Date: Fri Mar 15 17:47:04 EDT 2013  CSN: CSN-multifpga-179
                  Fri Mar 15 21:47:04 UTC 2013


Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_exe.apm Locally Modified          178 
 test_multifpga_throughput_dual_hub_ml605.apm Locally Modified          178 
 test_multifpga_throughput_tri_hub_ml605.apm Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          178 

Directory modules/leap-platforms/fpga-environments/ml605
 ml605-tri-hub.env         Locally Added               0 
 ml605_fpga_tri_hub.awb    Locally Added               0 

Directory modules/multifpga/throughputTest
 test_c_throughput.awb     Locally Removed           178 
 test_d_throughput.awb     Locally Removed           178 
 basestation.awb           Locally Added               0 

Directory modules/multifpga/throughputTest/connected_application
 connected-application-throughput.h Locally Modified          178 
 connected-application-throughput.cpp Locally Modified          178 

Directory modules/multifpga/throughputTest
 basestationImpl.bsv       Locally Added               0 
 repeater-1.bsv            Locally Added               - 
 repeater-2.bsv            Locally Added               0 
 test-c-throughput.bsv     Locally Removed           178 
 test-d-throughput.bsv     Locally Removed           178 
 repeater_2.awb            Locally Added               0 
 basestationImpl.rrr       Locally Added               0 
 test-c-throughput.dic     Locally Removed           178 
 test-d-throughput.dic     Locally Removed           178 
 throughput-repeater.bsv   Locally Added               0 
 throughput_repeater.awb   Locally Added               0 
 singleRepeater/           Locally Added               0 

Directory modules/multifpga/throughputTest/singleRepeater
 singleRepeater.awb        Locally Added               0 
 mapping.map               Locally Added               0 
 test_top.bsv              Locally Added               0 
 sim_mapping.awb           Locally Added               0 

Directory modules/multifpga/throughputTest
 test-d-throughput.rrr     Locally Removed           178 
 repeater-1.awb            Locally Added               - 
 dualRepeater/             Locally Added               0 

Directory modules/multifpga/throughputTest/dualRepeater
 dualRepeater.awb          Locally Added               0 
 mapping.map               Locally Added               0 
 test_top.bsv              Locally Added               0 
 sim_mapping.awb           Locally Added               0 


1) Fixed bug in the multifpga debug.  Debug was not being uniquified
and failed if more than two platforms were in an environment.

2) Made the throughput test more general so that it can be scaled more
easily to larger fpga systems.  Until I destroy synthesis boundaries,
this expansion will still be clunky but at least the amount of code is
reduced.


3) Added some new FPGA environments.

----------
mcadler     Date: Sat Mar 16 11:33:06 EDT 2013  CSN: CSN-multifpga-180
                  Sat Mar 16 15:33:06 UTC 2013


Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_time_func_exe.apm Locally Modified          179 
 alpha_inorder_multifpga_exe.apm Locally Modified          179 

Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_16_connected_application.apm Locally Modified          179 
 alpha_inorder_dm_wt_ring_acp_32_connected_application.apm Locally Modified          179 
 alpha_inorder_dm_wt_mesh_acp_64_connected_application.apm Locally Modified          179 
 alpha_inorder_dm_wt_ring_acp_16_connected_application.apm Locally Modified          179 
 alpha_inorder_dm_wt_mesh_acp_128_connected_application.apm Locally Modified          179 
 alpha_inorder_dm_wt_ring_acp_64_connected_application.apm Locally Modified          179 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_aurora_exe.apm Locally Modified          179 
 alpha_inorder_multifpga_time_func_acp.apm Locally Modified          179 
 alpha_inorder_multifpga_time_func_acp_sram_2.apm Locally Modified          179 
 alpha_inorder_multifpga_acp.apm Locally Modified          179 
 alpha_inorder_multifpga_time_func_acp_sram.apm Locally Modified          179 
 alpha_inorder_multifpga_time_func_dist_cache_exe.apm Locally Modified          179 
 alpha_inorder_multifpga_time_func_xupv5.apm Locally Modified          179 
 alpha_inorder_multifpga_time_func_16_acp_sram.apm Locally Modified          179 
 alpha_inorder_multifpga_ml605.apm Locally Modified          179 

Add topology manager to timing models.

----------
mcadler     Date: Tue Mar 19 08:57:10 EDT 2013  CSN: CSN-multifpga-181
                  Tue Mar 19 12:57:10 UTC 2013


Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_16_connected_application.apm Locally Modified          180 
 alpha_inorder_dm_wt_mesh_acp_64_connected_application.apm Locally Modified          180 
 alpha_inorder_dm_wt_mesh_acp_128_connected_application.apm Locally Modified          180 

Set MAX_NUM_MEM_CTRLS to a value that would permit up to one memory controller
at each node on the edge of two sides of a mesh.  The true number can be
set at run time.

----------
mcadler     Date: Wed Mar 20 11:37:58 EDT 2013  CSN: CSN-multifpga-182
                  Wed Mar 20 15:37:58 UTC 2013


Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_16_connected_application.apm Locally Modified          181 
 alpha_inorder_dm_wt_mesh_acp_64_connected_application.apm Locally Modified          181 
 alpha_inorder_dm_wt_mesh_acp_128_connected_application.apm Locally Modified          181 

Mesh model memory controller location(s) now determined algorithmically.

----------
kfleming    Date: Tue Mar 26 21:23:24 EDT 2013  CSN: CSN-multifpga-183
                  Wed Mar 27 01:23:24 UTC 2013


Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_512_connected_application.apm Locally Added               0 
 alpha_inorder_dm_wt_mesh_acp_256_connected_application.apm Locally Added               0 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_vc707_512_multifpga_dual_sram.apm Locally Added               0 
 alpha_inorder_dm_wt_mesh_vc707_256_multifpga_dual_sram.apm Locally Added               0 


Added new apms for large hasim models. 

----------
keflemin    Date: Tue Apr  9 10:53:35 EDT 2013  CSN: CSN-multifpga-184
                  Tue Apr  9 14:53:35 UTC 2013


Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_ml605.apm Locally Modified          183 
 test_multifpga_throughput_vc707.apm Locally Added               0 

Directory config/pm/leap/demos/hello_fellow
 hello_fellow_hybrid_vc707.apm Locally Added               0 

Directory config/pm/leap/submodels/fpgaenv
 fpgaenv-hybrid-ml605-pcie-aurora.apm Locally Modified          183 
 fpgaenv-hybrid-vc707-pcie-aurora.apm Locally Added               0 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_vc707_512_multifpga_dual_sram.apm Locally Modified          183 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-vc707-fpga0.apm Locally Added               - 
 multifpgaenv-hybrid-vc707-fpga1.apm Locally Added               - 
 vc707_0.apm               Locally Added               0 
 vc707_1.apm               Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 tool.py                   Locally Modified          183 

Directory modules/leap/libraries/platform-services/aurora-service
 aurora-service.awb        Locally Modified          183 
 aurora-service.bsv        Locally Modified          183 

Directory modules/leap/examples/hello-fellow
 hello-world.bsv           Locally Modified          183 

Directory modules/leap-platforms/fpga-environments
 vc707/                    Locally Added               0 

Directory modules/leap-platforms/fpga-environments/vc707
 vc707-dual.env            Locally Added               0 
 vc707_dual_env.awb        Locally Added               0 

Directory modules/multifpga/alpha_inorder
 acp-mapping-time-func-cache.map Locally Modified          183 



Started adding scaffolding for the VC707. Small designs run, but large
designs are untested. 

----------
keflemin    Date: Tue Apr  9 12:22:47 EDT 2013  CSN: CSN-multifpga-185
                  Tue Apr  9 16:22:47 UTC 2013


Directory config/pm/leap/submodels/fpgaenv
 fpgaenv-hybrid-ml605-pcie-aurora.apm Locally Modified          184 


Missed updating an apm.

----------
keflemin    Date: Tue Apr 16 14:43:11 EDT 2013  CSN: CSN-multifpga-186
                  Tue Apr 16 18:43:11 UTC 2013


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-master.apm Locally Modified          185 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpgaN.apm Locally Modified          185 
 multifpgaenv-hybrid-exe-fpga0.apm Locally Modified          185 
 multifpgaenv-hybrid-exe-airblue-fpga0.apm Locally Modified          185 
 multifpgaenv-hybrid-exe-fpga1.apm Locally Modified          185 
 multifpgaenv-hybrid-exe-airblue-fpga1.apm Locally Modified          185 
 multifpgaenv-hybrid-exe-fpga0-dist-cache.apm Locally Modified          185 
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified          185 
 multifpgaenv-hybrid-exe-airblue-fpgaN-aurora.apm Locally Modified          185 
 multifpgaenv-hybrid-exe-fpga0-aurora.apm Locally Modified          185 
 multifpgaenv-hybrid-exe-fpga0-quad.apm Locally Modified          185 

Directory config/pm/leap/submodels/pipelines
 build-pipeline-xilinx-multifpga.apm Locally Modified          185 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-vc707-fpga0.apm Locally Modified          185 
 multifpgaenv-hybrid-vc707-fpga1.apm Locally Modified          185 
 multifpgaenv-hybrid-xupv5-fpga1-sata.apm Locally Modified          185 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified          185 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified          185 
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          185 
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          185 
 multifpgaenv-hybrid-xupv5-fpga0-sata.apm Locally Modified          185 

Directory modules/leap/build-support/pipelines/multifpga_platform_sim
 sim-build-pipeline-multifpga.awb Locally Modified          185 

Directory modules/leap/build-support/pipelines/multifpga_platform
 fpga-platform-build-pipeline.awb Locally Modified          185 


Multifpga apms/build pipelines need to include li_module.

----------
mcadler     Date: Sat Apr 20 08:54:58 EDT 2013  CSN: CSN-multifpga-187
                  Sat Apr 20 12:54:58 UTC 2013


Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_time_func_exe.apm Locally Modified          186 
 alpha_inorder_multifpga_exe.apm Locally Modified          186 

Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_16_connected_application.apm Locally Modified          186 
 alpha_inorder_dm_wt_ring_acp_32_connected_application.apm Locally Modified          186 
 alpha_inorder_dm_wt_mesh_acp_512_connected_application.apm Locally Modified          186 
 alpha_inorder_dm_wt_mesh_acp_64_connected_application.apm Locally Modified          186 
 alpha_inorder_dm_wt_ring_acp_16_connected_application.apm Locally Modified          186 
 alpha_inorder_dm_wt_mesh_acp_128_connected_application.apm Locally Modified          186 
 alpha_inorder_dm_wt_ring_acp_64_connected_application.apm Locally Modified          186 
 alpha_inorder_dm_wt_mesh_acp_256_connected_application.apm Locally Modified          186 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_aurora_exe.apm Locally Modified          186 
 alpha_inorder_multifpga_time_func_acp.apm Locally Modified          186 
 alpha_inorder_multifpga_time_func_acp_sram_2.apm Locally Modified          186 
 alpha_inorder_multifpga_acp.apm Locally Modified          186 
 alpha_inorder_multifpga_time_func_acp_sram.apm Locally Modified          186 
 alpha_inorder_multifpga_time_func_xupv5.apm Locally Modified          186 
 alpha_inorder_multifpga_time_func_dist_cache_exe.apm Locally Modified          186 
 alpha_inorder_multifpga_time_func_16_acp_sram.apm Locally Modified          186 
 alpha_inorder_multifpga_ml605.apm Locally Modified          186 

Change awb type name from hasim_l1_caches to hasim_private_caches in preparation
for adding an L2 cache.  The private caches will hold all CPU-private caches
and, as a group, will have connections up to the CPU and down to the
uncore.

----------
keflemin    Date: Fri Apr 26 23:09:33 EDT 2013  CSN: CSN-multifpga-188
                  Sat Apr 27 03:09:33 UTC 2013


Directory config/pm/leap/submodels/fpgaenv
 fpgaenv-hybrid-vc707-pcie-aurora.apm Locally Modified          187 

Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_512_connected_application.apm Locally Modified          187 
 alpha_inorder_dm_wt_mesh_acp_256_connected_application.apm Locally Modified          187 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_vc707_256_multifpga_dual_sram.apm Locally Modified          187 
 alpha_inorder_dm_wt_mesh_vc707_512_multifpga_quad.apm Locally Added               0 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-vc707-fpga0.apm Locally Modified          187 
 multifpgaenv-hybrid-vc707-fpga1.apm Locally Modified          187 
 vc707_0.apm               Locally Modified          187 
 vc707_1.apm               Locally Modified          187 

Directory modules/leap-platforms/fpga-environments/vc707
 vc707_quad_env.awb        Locally Added               0 
 vc707-quad.env            Locally Added               0 

Directory modules/multifpga/alpha_inorder
 sim-mapping-time-func-cache-4.map Locally Modified          187 
 acp-mapping-time-func-cache.map Locally Modified          187 


1) Added new apms in support of very large hasim models, including a quad-vc707 target.

2) Upgraded aurora in vc707.


----------
mcadler     Date: Mon Apr 29 15:28:30 EDT 2013  CSN: CSN-multifpga-189
                  Mon Apr 29 19:28:30 UTC 2013


Directory modules/leap/build-support/project
 platform-multifpga.awb    Locally Modified          188 
 project-multifpga.awb     Locally Modified          188 

Top level model now defines AWB parameters naming the leap_debug directory.

----------
kfleming    Date: Sun May 12 17:07:47 EDT 2013  CSN: CSN-multifpga-190
                  Sun May 12 21:07:47 UTC 2013


Directory config/pm/leap/submodels/pipelines
 build-pipeline-xilinx-multifpga.apm Locally Modified          189 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-vc707-fpga0.apm Locally Modified          189 
 multifpgaenv-hybrid-vc707-fpga1.apm Locally Modified          189 
 multifpgaenv-hybrid-xupv5-fpga1-sata.apm Locally Modified          189 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified          189 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified          189 
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          189 
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          189 
 multifpgaenv-hybrid-xupv5-fpga0-sata.apm Locally Modified          189 

Directory modules/leap/build-support/pipelines/multifpga_platform
 fpga-platform-build-pipeline.awb Locally Modified          189 

Directory modules/leap-platforms/fpga-environments/ml605
 ml605-dual.env            Locally Modified          189 


Updated various apms to use new paramter parser. 

----------
mcadler     Date: Wed May 22 17:15:58 EDT 2013  CSN: CSN-multifpga-191
                  Wed May 22 21:15:58 UTC 2013


Directory config/pm/leap/submodels/common
 multifpga-soft-services.apm Locally Modified          190 

We aren't using many to one or one to many connections.  Use a NULL version.

----------
keflemin    Date: Tue Jun  4 16:10:17 EDT 2013  CSN: CSN-multifpga-192
                  Tue Jun  4 20:10:17 UTC 2013


Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device.ld Locally Added               0 
 unix-communication-device.awb Locally Modified          191 


The interfpga communication device uses glib and gthread. We express
those library dependencies in the .ld file.

----------
keflemin    Date: Thu Jun  6 16:17:03 EDT 2013  CSN: CSN-multifpga-193
                  Thu Jun  6 20:17:03 UTC 2013


Directory config/pm/leap/submodels/pipelines
 build-pipeline-xilinx-multifpga.apm Locally Modified          192 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-vc707-fpga0.apm Locally Modified          192 
 multifpgaenv-hybrid-vc707-fpga1.apm Locally Modified          192 
 multifpgaenv-hybrid-xupv5-fpga1-sata.apm Locally Modified          192 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified          192 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified          192 
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          192 
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          192 
 multifpgaenv-hybrid-xupv5-fpga0-sata.apm Locally Modified          192 


Changed apms to use synplify library.  But really, we should use a submodel.

----------
keflemin    Date: Fri Jul 19 16:25:36 EDT 2013  CSN: CSN-multifpga-194
                  Fri Jul 19 20:25:36 UTC 2013


Directory config/pm/leap/demos/hello_fellow
 hello_fellow_hybrid_vc707.apm Locally Modified          193 

Directory config/pm/leap/submodels/fpgaenv
 fpgaenv-hybrid-ml605-pcie-aurora.apm Locally Modified          193 
 fpgaenv-hybrid-vc707-pcie-aurora.apm Locally Modified          193 
 multifpgaenv-hybrid-exe-airblue-fpgaN-aurora.apm Locally Modified          193 
 multifpgaenv-hybrid-exe-fpga0-aurora.apm Locally Modified          193 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-vc707-fpga0.apm Locally Modified          193 
 multifpgaenv-hybrid-vc707-fpga1.apm Locally Modified          193 
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          193 
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          193 

Directory modules/leap/libraries/platform-services/aurora-service
 aurora-service.awb        Locally Modified          193 
 aurora-service.bsv        Locally Modified          193 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device.awb Locally Modified          193 
 unix-communication-device.bsv Locally Modified          193 

Directory modules/leap-platforms/fpga-environments/sim
 sim-cache-dual.env        Locally Modified          193 

Directory modules/multifpga/throughputTest
 basestationImpl.bsv       Locally Modified          193 


1) Adjusted aurora apms to use aurora debugger.

2) Added an error generation mode to the unix communication simulator.
This models bit flips and data drops in the real hardware.

3) Changed the memory test code to exit simulation if an error is detected. 


----------
mcadler     Date: Wed Sep 11 15:54:56 EDT 2013  CSN: CSN-multifpga-195
                  Wed Sep 11 19:54:56 UTC 2013


Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_16_connected_application.apm Locally Modified          194 
 alpha_inorder_dm_wt_mesh_acp_512_connected_application.apm Locally Modified          194 
 alpha_inorder_dm_wt_mesh_acp_64_connected_application.apm Locally Modified          194 
 alpha_inorder_dm_wt_mesh_acp_128_connected_application.apm Locally Modified          194 
 alpha_inorder_dm_wt_mesh_acp_256_connected_application.apm Locally Modified          194 

Directory modules/multifpga/scratchdual
 test-c.bsv                Locally Modified          194 
 test-d.bsv                Locally Modified          194 

- New scratchpad parameters.
- Update models for new interconnect modules.

----------
keflemin    Date: Wed Oct 23 12:37:35 EDT 2013  CSN: CSN-multifpga-196
                  Wed Oct 23 16:37:35 UTC 2013


Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 pointer-egress.bsv        Locally Added               0 
 pointer-ingress.bsv       Locally Added               0 
 pointer-switch.awb        Locally Added               0 


Added a pointer-based channel virtualization implementation.  This
layer is designed to operate with high-latency inter-plarform links
like PCI-e and ethernet.

----------
keflemin    Date: Sat Nov 30 16:12:09 EST 2013  CSN: CSN-multifpga-197
                  Sat Nov 30 21:12:09 UTC 2013


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-slave.apm Locally Modified          196 
 multifpga-platform-services-master.apm Locally Modified          196 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpgaN-aurora.apm Locally Modified          196 
 multifpgaenv-hybrid-exe-fpga0-aurora.apm Locally Modified          196 

Directory config/pm/leap/submodels/common
 multifpga-soft-services.apm Locally Modified          196 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-ingress.bsv   Locally Modified          196 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          196 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 platform.py               Locally Modified          196 
 multiparse.py             Locally Modified          196 

Directory modules/leap/build-support/project
 platform-multifpga.awb    Locally Modified          196 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpga0
 sim-physical-platform-fpga0.h Locally Modified          196 
 sim-physical-platform-fpga0.bsv Locally Modified          196 

Directory modules/leap-platforms/fpga-environments/vc707
 vc707-dual.env            Locally Modified          196 

Directory modules/leap-platforms/fpga-environments/sim
 sim-cache-dual.env        Locally Modified          196 


Updated multifpga to fix bit rot from recent code
reorganizations. Most of this code came from the new LIM compiler, but
I have backported it to ensure continuity.

----------
mcadler     Date: Wed Dec 18 09:49:47 EST 2013  CSN: CSN-multifpga-198
                  Wed Dec 18 14:49:47 UTC 2013


Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_512_connected_application.apm Locally Modified          197 
 alpha_inorder_dm_wt_mesh_acp_256_connected_application.apm Locally Modified          197 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_vc707_512_multifpga_dual_sram.apm Locally Modified          197 

Fix a few configuration errors.

----------
mcadler     Date: Sun Dec 22 19:58:43 EST 2013  CSN: CSN-multifpga-199
                  Mon Dec 23 00:58:43 UTC 2013


Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          198 

Directory modules/leap-platforms/fpga-environments/ml605
 ml605-dual.env            Locally Modified          198 

A couple of repairs to ML605 configuration.

----------
keflemin    Date: Mon Dec 23 17:14:03 EST 2013  CSN: CSN-multifpga-200
                  Mon Dec 23 22:14:03 UTC 2013


Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_exe.apm Locally Modified          199 
 li/                       Locally Added               0 

Directory config/pm/leap/demos/multifpga/li
 traffic_light_acp_synth_multifpga.apm Locally Added               0 
 hasim_test_vc707.apm      Locally Added               0 
 rrr_test_li.apm           Locally Added               0 
 hasim_test_sim.apm        Locally Added               0 
 li_test_vc707.apm         Locally Added               0 
 traffic_light_li.apm      Locally Added               0 
 test_multifpga_throughput_hwsw_exe.apm Locally Added               0 
 li_test_sim.apm           Locally Added               0 
 rrr_test_li_vc707.apm     Locally Added               0 
 li_test_dual_sim.apm      Locally Added               0 

Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_vc707.apm Locally Modified          199 

Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-slave-li.apm Locally Added               0 
 multifpga-platform-services-master-li.apm Locally Added               0 
 multifpga-platform-services-master-hwsw.apm Locally Added               0 

Directory config/pm/leap/submodels/fpgaenv
 hwsw/                     Locally Added               0 

Directory config/pm/leap/submodels/fpgaenv/hwsw
 multifpgaenv-hybrid-pcie-cpu0.apm Locally Added               0 
 multifpgaenv-hybrid-exe-cpu0.apm Locally Added               0 
 multifpgaenv-hwsw-exe-fpga0-aurora.apm Locally Added               0 
 multifpgaenv-hwsw-exe-fpga0.apm Locally Added               0 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_vc707_256_multifpga_exe.apm Locally Added               0 
 alpha_inorder_multifpga_exe.apm Locally Modified          199 
 alpha_inorder_dm_wt_mesh_vc707_256_multifpga_dual_sram.apm Locally Modified          199 
 alpha_inorder_multifpga_vc707.apm Locally Added               0 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-vc707-fpga0.apm Locally Modified          199 
 multifpgaenv-hybrid-vc707-fpga1.apm Locally Modified          199 
 hwsw/                     Locally Added               0 

Directory config/pm/multifpga/fpga_submodels/hwsw
 fpga0-hwsw.apm            Locally Added               0 
 multifpgaenv-hwsw-vc707-fpga0.apm Locally Added               0 
 cpu0.apm                  Locally Added               0 
 cpu0_pcie.apm             Locally Added               0 
 fpga0-aurora-hwsw.apm     Locally Added               0 
 vc707_0-hwsw.apm          Locally Added               0 
 fpga0-dual-sim-vestigial-aurora.apm Locally Added               0 

Directory modules/leap/virtual-platform
 virtual-platform-li.h     Locally Added               0 
 virtual-platform-li.awb   Locally Added               0 
 virtual-platform-li.bsv   Locally Added               0 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified          199 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.cpp    Locally Added               0 
 flowcontrol-switch.awb    Locally Modified          199 
 flowcontrol-switch-li.awb Locally Added               - 
 pointer-ingress.bsv       Locally Modified          199 
 flowcontrol-egress.h      Locally Added               0 
 pointer-switch.awb        Locally Modified          199 
 flowcontrol-egress.bsv    Locally Modified          199 
 pointer-egress.cpp        Locally Added               0 
 pointer-egress-regional.h Locally Added               0 
 pointer-egress.h          Locally Added               0 
 pointer-egress.bsv        Locally Modified          199 
 flowcontrol-ingress.cpp   Locally Added               0 
 flowcontrol-ingress.h     Locally Added               0 
 flowcontrol-ingress.bsv   Locally Modified          199 
 pointer-ingress.cpp       Locally Added               0 
 pointer-ingress-regional.h Locally Added               0 
 pointer-ingress.h         Locally Added               0 

Directory modules/leap/virtual-platform/virtual-devices/platform-services
 platform-services-master.bsv Locally Modified          199 

Directory modules/leap/virtual-platform
 low-level-platform-interface/ Locally Added               0 

Directory modules/leap/virtual-platform/low-level-platform-interface
 llpi-li.cpp               Locally Added               0 
 llpi-li.h                 Locally Added               0 
 llpi-li.awb               Locally Added               0 
 llpi-li.bsv               Locally Added               0 
 README                    Locally Added               0 
 llpi-li.bsh               Locally Added               0 

Directory modules/leap/virtual-platform
 virtual-platform-li.cpp   Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 umfType.py                Locally Added               0 
 multiFPGAConnect.py       Locally Modified          199 
 danglingConnection.py     Locally Modified          199 
 multi-fpga-connect.awb    Locally Modified          199 
 via.py                    Locally Modified          199 
 viaType.py                Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 tool.py                   Locally Modified          199 
 environment.py            Locally Modified          199 
 platform.py               Locally Modified          199 

Directory modules/leap/build-support/project
 platform-multifpga.awb    Locally Modified          199 
 null_environment.awb      Locally Modified          199 

Directory modules/leap/build-support/pipelines/multifpga_platform_sim
 sim-build-pipeline-multifpga.awb Locally Modified          199 

Directory modules/leap/build-support/pipelines
 hwsw/                     Locally Added               0 

Directory modules/leap/build-support/pipelines/hwsw
 multifpga_platform_sim/   Locally Added               - 
 multifpga_platform/       Locally Added               - 

Directory modules/leap/build-support/pipelines/multifpga_platform
 fpga-platform-build-pipeline.awb Locally Modified          199 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpga0
 sim-physical-platform-fpga0.cpp Locally Modified          199 
 sim-physical-platform-fpga0.h Locally Modified          199 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device-bdpi.c Locally Modified          199 

Directory modules/leap-platforms/fpga-environments/vc707
 vc707-hwsw.env            Locally Added               0 
 vc707_hwsw.awb            Locally Added               0 

Directory modules/leap-platforms/fpga-environments/sim
 sim-dual-hwsw.env         Locally Added               0 
 sim-dual.env              Locally Modified          199 
 sim-hwsw-dual-fpga.env    Locally Added               0 
 sim-hwsw.env              Locally Added               0 
 sim_hwsw.awb              Locally Added               0 
 sim_hwsw_dual_fpga.awb    Locally Added               0 
 sim_dual_hwsw.awb         Locally Added               0 

Directory modules/multifpga/synthTest
 acp-mapping.map           Locally Modified          199 

Directory modules/multifpga/alpha_inorder
 sim_mapping_hwsw.awb      Locally Added               0 
 sim-mapping-hwsw.map      Locally Added               0 
 sim-mapping.map           Locally Modified          199 
 acp-mapping-time-func.map Locally Modified          199 

Directory modules/multifpga/throughputTest
 basestation.awb           Locally Modified          199 

Directory modules/multifpga/throughputTest/connected_application
 connected-application-throughput.cpp Locally Modified          199 

Directory modules/multifpga/throughputTest
 basestationImpl.bsv       Locally Modified          199 
 basestationImpl.log       Locally Added               0 


This massive check-in adds support for LIM-style hardware-software
latency-insensitive channels. All previous multiple FPGA designs will
remain fully functional (I hope.)  

Merry Christmas. 


----------
mcadler     Date: Thu Dec 26 22:50:47 EST 2013  CSN: CSN-multifpga-201
                  Fri Dec 27 03:50:47 UTC 2013


Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_acp_512_connected_application.apm Locally Modified          200 
 alpha_inorder_dm_wt_mesh_acp_64_connected_application.apm Locally Modified          200 
 alpha_inorder_dm_wt_mesh_acp_128_connected_application.apm Locally Modified          200 
 alpha_inorder_dm_wt_mesh_acp_256_connected_application.apm Locally Modified          200 

Match single FPGA configurations.

----------
mcadler     Date: Mon Dec 30 14:38:38 EST 2013  CSN: CSN-multifpga-202
                  Mon Dec 30 19:38:38 UTC 2013


Directory config/pm/leap/tests/mem_perf
 mem_perf_multifpga_exe.apm Locally Modified          201 
 mem_perf_multifpga_acp.apm Locally Modified          201 
 mem_perf_multifpga_alt_acp.apm Locally Modified          201 
 mem_perf_multifpga_ml605.apm Locally Modified          201 
 mem_perf_multifpga_vc707.apm Locally Added               0 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpgaN-aurora.apm Locally Modified          201 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device-bdpi.c Locally Modified          201 

Directory modules/multifpga/mem_perf
 mem-perf-mapping-std.map  Locally Added               - 
 acp_mapping.awb           Locally Removed           201 
 acp-mapping-alt.map       Locally Removed           201 
 acp_mapping_alt.awb       Locally Removed           201 
 mem_perf_mapping_std.awb  Locally Added               - 
 acp-mapping.map           Locally Removed           201 
 sim_mapping.awb           Locally Removed           201 
 mem-perf-mapping-alt.map  Locally Added               0 
 sim-mapping.map           Locally Removed           201 
 mem_perf_mapping_alt.awb  Locally Added               0 

- Clean up mem_perf configurations.
- Fix compilation warnings in unix-communication-device-bdpi.c

----------
mcadler     Date: Tue Dec 31 13:46:35 EST 2013  CSN: CSN-multifpga-203
                  Tue Dec 31 18:46:35 UTC 2013


Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpgaN.apm Locally Modified          202 
 multifpgaenv-hybrid-exe-fpga0.apm Locally Modified          202 
 multifpgaenv-hybrid-exe-airblue-fpga0.apm Locally Modified          202 
 multifpgaenv-hybrid-exe-fpga1.apm Locally Modified          202 
 multifpgaenv-hybrid-exe-airblue-fpga1.apm Locally Modified          202 
 multifpgaenv-hybrid-exe-fpga0-dist-cache.apm Locally Modified          202 

Directory config/pm/leap/submodels/fpgaenv/hwsw
 multifpgaenv-hwsw-exe-fpga0.apm Locally Modified          202 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified          202 
 multifpgaenv-hybrid-exe-airblue-fpgaN-aurora.apm Locally Modified          202 
 multifpgaenv-hybrid-exe-fpga0-aurora.apm Locally Modified          202 
 multifpgaenv-hybrid-exe-fpga0-quad.apm Locally Modified          202 

Directory config/pm/leap/submodels/pipelines
 build-pipeline-xilinx-multifpga.apm Locally Modified          202 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-vc707-fpga0.apm Locally Modified          202 
 multifpgaenv-hybrid-vc707-fpga1.apm Locally Modified          202 
 multifpgaenv-hybrid-xupv5-fpga1-sata.apm Locally Modified          202 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified          202 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified          202 

Directory config/pm/multifpga/fpga_submodels/hwsw
 multifpgaenv-hwsw-vc707-fpga0.apm Locally Modified          202 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          202 
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          202 
 multifpgaenv-hybrid-xupv5-fpga0-sata.apm Locally Modified          202 

Remove non-default BSC_FLAGS specification.

----------
keflemin    Date: Tue Dec 31 14:45:10 EST 2013  CSN: CSN-multifpga-204
                  Tue Dec 31 19:45:10 UTC 2013


Directory experiments
 multifpga/                Locally Added               0 

Directory experiments/multifpga
 nightly/                  Locally Added               0 

Directory experiments/multifpga/nightly
 nightly.models            Locally Added               0 
 nightly.benchmarks        Locally Added               0 

Directory .
 experiments/              Locally Added               0 

Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_exe.apm Locally Modified          203 

Directory config/pm/leap/demos/multifpga/li
 rrr_test_li.apm           Locally Modified          203 
 li_test_vc707.apm         Locally Modified          203 
 li_test_sim.apm           Locally Modified          203 
 li_test_dual_vc707.apm    Locally Added               0 
 li_test_dual_sim.apm      Locally Modified          203 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-dual-pcie-cpu0.apm Locally Added               0 

Directory config/pm/multifpga/fpga_submodels/hwsw
 fpga0-hwsw.apm            Locally Modified          203 
 fpga1-hwsw.apm            Locally Added               0 
 cpu0_dual_pcie.apm        Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          203 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          203 

Directory modules/bluespec/common/fpgaenv/physical-platform
 pcie/                     Locally Added               0 

Directory modules/bluespec/common/fpgaenv/physical-platform/pcie
 dualPCIE/                 Locally Added               0 

Directory modules/bluespec/common/fpgaenv/physical-platform/pcie/dualPCIE
 dual-pcie-physical-platform.cpp Locally Added               0 
 dual-pcie-physical-platform.h Locally Added               0 
 dual-pcie-physical-platform.awb Locally Added               0 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpgaN
 sim-physical-platform-fpgaN.h Locally Modified          203 
 sim-physical-platform-fpgaN.cpp Locally Modified          203 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpga0
 sim-physical-platform-fpga0.cpp Locally Modified          203 
 sim-physical-platform-fpga0.h Locally Modified          203 

Directory modules/leap-platforms/fpga-environments/vc707
 vc707-dual-hwsw.env       Locally Added               0 
 vc707_dual_hwsw.awb       Locally Added               0 

Directory modules/leap-platforms/fpga-environments/sim
 sim-dual-hwsw.env         Locally Modified          203 
 sim-hwsw.env              Locally Modified          203 

Directory modules/multifpga/synthTest
 acp-mapping.map           Locally Modified          203 


1) Added support for multiple platforms communicating simultaneously
with software.

2) Fixed build rules for CPU and FPGA platforms.  The dependencies for
producing the FPGA strings files were not correct.

3) Added a nightly regression test for the multifpga package. 



----------
mcadler     Date: Wed Jan  1 21:16:43 EST 2014  CSN: CSN-multifpga-205
                  Thu Jan  2 02:16:43 UTC 2014


Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-vc707-fpga1.apm Locally Modified          204 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpgaN
 sim-physical-platform-fpgaN.cpp Locally Modified          204 

- Temporary hack to make the platform's set of AWB parameters identical on both master
  and slave VC707s.  The master defines a BlueNoC PCIe channel, which has a few AWB
  parameters.  Add a dummy physical channel to the slave build where the same
  parameters can be defined.  The real solution is for the multi-FPGA compiler
  to unify the dynamic parameter dictionaries across all FPGAs.  It does not,
  currently, and variations in the dynamic parameter namespaces lead to improper
  initialization.

- `PLATFORM_ID isn't defined in fpgaN simulation environment.

----------
mcadler     Date: Mon Jan  6 23:05:37 EST 2014  CSN: CSN-multifpga-206
                  Tue Jan  7 04:05:37 UTC 2014


Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga0.apm Locally Modified          205 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_ring_acp_16_multifpga_sram.apm Locally Removed           205 
 alpha_inorder_dm_wt_mesh_ml605_16_multifpga_dual_sram.apm Locally Modified          205 
 alpha_inorder_dm_wt_ring_acp_64_multifpga_sram.apm Locally Removed           205 
 alpha_inorder_dm_wt_ring_acp_16_dual_multifpga_sram.apm Locally Removed           205 
 alpha_inorder_dm_wt_mesh_acp_64_multifpga_dual_sram.apm Locally Modified          205 
 alpha_inorder_dm_wt_mesh_vc707_256_multifpga_exe.apm Locally Modified          205 

Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_0016_connected_application.apm Locally Added               - 
 alpha_inorder_dm_wt_mesh_0512_connected_application.apm Locally Added               - 
 alpha_inorder_dm_wt_mesh_acp_16_connected_application.apm Locally Removed           205 
 alpha_inorder_dm_wt_mesh_0064_connected_application.apm Locally Added               - 
 alpha_inorder_dm_wt_ring_acp_32_connected_application.apm Locally Removed           205 
 alpha_inorder_dm_wt_mesh_acp_512_connected_application.apm Locally Removed           205 
 alpha_inorder_dm_wt_mesh_0128_connected_application.apm Locally Added               - 
 alpha_inorder_dm_wt_mesh_acp_64_connected_application.apm Locally Removed           205 
 alpha_inorder_dm_wt_ring_acp_16_connected_application.apm Locally Removed           205 
 alpha_inorder_dm_wt_mesh_0256_connected_application.apm Locally Added               - 
 alpha_inorder_dm_wt_mesh_acp_128_connected_application.apm Locally Removed           205 
 alpha_inorder_dm_wt_ring_acp_64_connected_application.apm Locally Removed           205 
 alpha_inorder_dm_wt_mesh_acp_256_connected_application.apm Locally Removed           205 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_exe_16_multifpga_dual_sram.apm Locally Modified          205 
 alpha_inorder_dm_wt_ring_acp_64_multifpga.apm Locally Removed           205 
 alpha_inorder_dm_wt_mesh_exe_16_multifpga_quad_sram.apm Locally Modified          205 
 alpha_inorder_dm_wt_mesh_vc707_512_multifpga_dual_sram.apm Locally Modified          205 
 alpha_inorder_dm_wt_mesh_exe_8_128_multifpga_dual_sram.apm Locally Modified          205 
 alpha_inorder_dm_wt_mesh_vc707_256_multifpga_dual_sram.apm Locally Modified          205 
 alpha_inorder_dm_wt_ring_exe_16_multifpga.apm Locally Removed           205 
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram.apm Locally Modified          205 
 alpha_inorder_dm_wt_mesh_exe_64_multifpga_octo_sram.apm Locally Modified          205 
 alpha_inorder_dm_wt_ring_acp_16_multifpga_sram_big_cache.apm Locally Removed           205 
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram_4_lanes.apm Locally Modified          205 
 alpha_inorder_dm_wt_mesh_vc707_512_multifpga_quad.apm Locally Modified          205 
 alpha_inorder_dm_wt_ring_acp_32_multifpga.apm Locally Removed           205 
 alpha_inorder_dm_wt_ring_acp_16_multifpga.apm Locally Removed           205 
 alpha_inorder_dm_wt_ring_acp_16_multifpga_sram_2.apm Locally Removed           205 
 alpha_inorder_dm_wt_ring_acp_16_multifpga_sram_3.apm Locally Removed           205 
 alpha_inorder_dm_wt_mesh_exe_64_multifpga_dual_sram.apm Locally Modified          205 
 alpha_inorder_multifpga_time_func_16_acp_dual_sram.apm Locally Removed           205 
 alpha_inorder_dm_wt_mesh_acp_128_multifpga_dual_sram.apm Locally Modified          205 
 alpha_inorder_dm_wt_mesh_exe_64_multifpga_quad_sram.apm Locally Modified          205 

Directory modules/leap-platforms/fpga-environments/acp
 acp-dual-sram-dual.env    Locally Modified          205 

- A few tweaks to make ACP models compile.

- Delete ring models.  They haven't been updated in quite a while and the mesh
  model can be configured as a ring.

- Rename "ACP" submodels so they are generic.  They are also used on other
  physical platforms.

----------
mcadler     Date: Wed Jan  8 21:49:01 EST 2014  CSN: CSN-multifpga-207
                  Thu Jan  9 02:49:01 UTC 2014


Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpga0.apm Locally Modified          206 
 multifpgaenv-hybrid-exe-airblue-fpga1.apm Locally Modified          206 
 multifpgaenv-hybrid-exe-fpga0-aurora.apm Locally Modified          206 
 multifpgaenv-hybrid-exe-airblue-fpgaN-aurora.apm Locally Modified          206 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_vc707_64_multifpga_dual_sram.apm Locally Added               0 

Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_0064_connected_application.apm Locally Modified          206 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_exe_16_multifpga_dual_sram.apm Locally Removed           206 
 alpha_inorder_dm_wt_mesh_exe_64_multifpga_dual_sram.apm Locally Modified          206 
 alpha_inorder_dm_wt_mesh_exe_16_multifpga_quad_sram.apm Locally Removed           206 
 alpha_inorder_dm_wt_mesh_vc707_256_multifpga_dual_sram.apm Locally Modified          206 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-vc707-fpga0.apm Locally Modified          206 
 multifpgaenv-hybrid-vc707-fpga1.apm Locally Modified          206 
 vc707_0.apm               Locally Modified          206 
 vc707_1.apm               Locally Modified          206 

Some cleanup:
- HAsim models on VC707 use 300 bit SOFT_CONN_CWIDTH for slightly better performance.
- Some models had missing definitions.
- Add Aurora to simulation with Aurora models.

----------
mcadler     Date: Thu Jan  9 14:13:10 EST 2014  CSN: CSN-multifpga-208
                  Thu Jan  9 19:13:10 UTC 2014


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-slave.apm Locally Modified          207 
 multifpga-platform-services-slave-li.apm Locally Modified          207 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram.apm Locally Modified          207 
 alpha_inorder_dm_wt_mesh_ml605_16_multifpga_dual_sram.apm Locally Modified          207 
 alpha_inorder_dm_wt_mesh_acp_64_multifpga_dual_sram.apm Locally Modified          207 
 alpha_inorder_dm_wt_mesh_vc707_256_multifpga_exe.apm Locally Modified          207 
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram_4_lanes.apm Locally Modified          207 
 alpha_inorder_dm_wt_mesh_vc707_64_multifpga_dual_sram.apm Locally Modified          207 
 alpha_inorder_dm_wt_mesh_exe_64_multifpga_dual_sram.apm Locally Modified          207 
 alpha_inorder_dm_wt_mesh_vc707_512_multifpga_dual_sram.apm Locally Modified          207 
 alpha_inorder_dm_wt_mesh_acp_128_multifpga_dual_sram.apm Locally Modified          207 
 alpha_inorder_dm_wt_mesh_vc707_256_multifpga_dual_sram.apm Locally Modified          207 

Directory modules/multifpga/alpha_inorder
 acp-mapping-time-func-cache.stats Locally Removed           207 
 sim-mapping-time-func-cache.map Locally Removed           207 
 sim_mapping_time_func_cache.awb Locally Removed           207 
 inorder-mapping-time-func-cache.map Locally Added               0 
 acp-mapping-time-func-cache.map Locally Removed           207 
 inorder_mapping_time_func_cache.awb Locally Added               0 
 acp_mapping_time_func_cache.awb Locally Removed           207 
 inorder-mapping-time-func-cache.stats Locally Added               0 

- Share HAsim Alpha in-order model mapping for FPGA and simulation.

- Update statistics using alpha_inorder_dm_wt_mesh_vc707_64_multifpga_dual_sram.

----------
keflemin    Date: Sun Jan 12 14:27:40 EST 2014  CSN: CSN-multifpga-209
                  Sun Jan 12 19:27:40 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          208 


1) Fixed bug with compiler optimization
flags. ENABLE_AGRESSIVE_UMF_PARAMETERS was used where
USE_DEFAULT_UMF_PARAMETERS was intended.

2) Corrected off by one error in lane sizing code.  Valid bits were
removed for single lane routers to simplify software
decoding. However, this bit needs to be added back for multiple lane
routers.

----------
mcadler     Date: Thu Jan 16 14:24:53 EST 2014  CSN: CSN-multifpga-210
                  Thu Jan 16 19:24:53 UTC 2014


Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_exe.apm Locally Modified          209 
 test_multifpga_throughput_aurora_exe.apm Locally Modified          209 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpgaN.apm Locally Modified          209 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_vc707_64_multifpga_dual_sram.apm Locally Modified          209 
 alpha_inorder_dm_wt_mesh_exe_64_multifpga_dual_sram.apm Locally Modified          209 
 alpha_inorder_dm_wt_mesh_vc707_256_multifpga_dual_sram.apm Locally Modified          209 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multi-fpga-connect.awb    Locally Modified          209 

Directory modules/leap-platforms/fpga-environments/sim
 sim-dual-aurora.env       Locally Modified          209 

- Change multi-FPGA connect param defaults to be appropriate for HAsim.

- Set appropriate max timing model inter-stage buffer sizes for HAsim models.

- Fix sim Aurora config and test.

----------
mcadler     Date: Fri Jan 17 16:43:05 EST 2014  CSN: CSN-multifpga-211
                  Fri Jan 17 21:43:05 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 dumpStructures.tcl        Locally Modified          210 

Fix handling of "-p" argument.

----------
mcadler     Date: Tue Jan 21 13:34:37 EST 2014  CSN: CSN-multifpga-212
                  Tue Jan 21 18:34:37 UTC 2014


Directory config/pm/leap/demos/multifpga
 test_multifpga_compress_acp.apm Locally Modified          211 
 test_multifpga_compress.apm Locally Modified          211 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_dm_wt_mesh_ml605_16_multifpga_dual_sram.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_acp_64_multifpga_dual_sram.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_vc707_256_multifpga_exe.apm Locally Removed           211 
 submodels/                Locally Removed           211 

Directory config/pm/hasim-alpha/multifpga/submodels
 alpha_inorder_dm_wt_mesh_0016_connected_application.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_0512_connected_application.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_0064_connected_application.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_0128_connected_application.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_0256_connected_application.apm Locally Removed           211 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0064_multifpga.apm Locally Added               0 
 alpha_inorder_dm_wt_mesh_vc707_512_multifpga_dual_sram.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_vc707_256_multifpga_dual_sram.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_exe_8_128_multifpga_dual_sram.apm Locally Removed           211 
 alpha_inorder_mesh_sharedLLC_MESI_exe_0064_multifpga.apm Locally Added               0 
 alpha_inorder_dm_wt_mesh_exe_64_multifpga_octo_sram.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_acp_16_multifpga_dual_sram_4_lanes.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_vc707_64_multifpga_dual_sram.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_vc707_512_multifpga_quad.apm Locally Removed           211 
 alpha_inorder_mesh_sharedLLC_MESI_acp_0064_multifpga.apm Locally Added               0 
 alpha_inorder_dm_wt_mesh_exe_64_multifpga_dual_sram.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_acp_128_multifpga_dual_sram.apm Locally Removed           211 
 alpha_inorder_dm_wt_mesh_exe_64_multifpga_quad_sram.apm Locally Removed           211 
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0256_multifpga.apm Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          211 

Directory modules/multifpga/compressionTest
 test-c.bsv                Locally Modified          211 
 test-d.bsv                Locally Modified          211 

- Alpha in-order models now share model configuration with single FPGA variants.

- Stop attempting to build the global string database in the top level build.
  Run scripts now look for strings in all platform builds.

- Update compression test for changed type names.

----------
keflemin    Date: Thu Jan 23 23:32:51 EST 2014  CSN: CSN-multifpga-213
                  Fri Jan 24 04:32:51 UTC 2014


Directory config/pm/leap/demos
 hello/                    Locally Added               0 

Directory config/pm/leap/demos/hello
 hello_hybrid_dual_exe.apm Locally Added               0 
 hello_hybrid_dual_acp.apm Locally Added               0 
 hello_hybrid_dual_vc707.apm Locally Added               0 

Directory config/pm/leap/demos/multifpga
 test_multifpga_exe.apm    Locally Modified          212 


Added new hello world apms for DTS inspection.

----------
keflemin    Date: Fri Jan 24 04:52:07 EST 2014  CSN: CSN-multifpga-214
                  Fri Jan 24 09:52:07 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 generate_logfile.py       Locally Added               - 
 environment_parse.py      Locally Added               - 
 multi_fpga_parse.awb      Locally Modified          213 
 multilex.py               Locally Removed           213 
 multifpga_parser.py       Locally Removed           213 
 environment_lex.py        Locally Added               - 
 tool.py                   Locally Removed           213 
 environment_parser.py     Locally Added               - 
 fpgaenvironment.awb       Locally Modified          213 
 multiparse.py             Locally Removed           213 


Reorganizing files to improve code readability.

----------
keflemin    Date: Mon Jan 27 21:07:19 EST 2014  CSN: CSN-multifpga-215
                  Tue Jan 28 02:07:19 UTC 2014


Directory modules/leap/virtual-platform
 rrr/                      Locally Added               0 

Directory modules/leap/virtual-platform/rrr
 li/                       Locally Added               0 

Directory modules/leap/virtual-platform/rrr/li
 li-rrr.awb                Locally Added               0 
 li-rrr.bsv                Locally Added               0 
 li-rrr-server.h           Locally Added               0 
 li-rrr-common.h           Locally Added               0 
 li-rrr-client.cpp         Locally Added               0 
 li-rrr-client.h           Locally Added               0 
 li-rrr-server.cpp         Locally Added               0 
 README                    Locally Added               0 
 li-rrr-common.cpp         Locally Added               0 


Added a latency-insensitive RRR implementation.  This implementation
makes use of the new LI channel name matching service. Each service
makes use of a dedicated service thread.  This architecture needs to
be compared against other threading architectures, including the
orignal single threaded architecture.

----------
keflemin    Date: Wed Feb  5 19:53:51 EST 2014  CSN: CSN-multifpga-216
                  Thu Feb  6 00:53:51 UTC 2014


Directory config/pm/leap/demos/multifpga/li
 hasim_test_sim.apm        Locally Modified          215 
 li_test_vc707.apm         Locally Modified          215 
 li_test_sim.apm           Locally Modified          215 

Directory config/pm/leap/submodels/fpgaenv/hwsw
 multifpgaenv-hybrid-pcie-cpu0.apm Locally Modified          215 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified          215 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified          215 

Directory modules/leap-platforms/fpga-environments/vc707
 vc707-hwsw.env            Locally Modified          215 


Fixed bug in LI compiler.  To simplify software, we use fixed umf
protocol parameters as provided by the legacy umf code.  However,
these parameters were causing proviso failures in the router code
because some of the code was written in terms of the maximum value of
the parameter rather than the maximum value actually used in the
router. 

Changed the router to use the values provided by the actual channels,
rather than the absolute maximum of the parameter. Values that are too
large will still result in a compile time error, but only a
pathalogical program would run in to this case (i.e. LI channel width
>> 100000 bits).

----------
keflemin    Date: Thu Feb  6 13:44:51 EST 2014  CSN: CSN-multifpga-217
                  Thu Feb  6 18:44:51 UTC 2014


Directory config/pm/leap/submodels/fpgaenv/hwsw
 multifpgaenv-hybrid-pcie-cpu0.apm Locally Modified          216 

Directory config/pm/multifpga/fpga_submodels/hwsw
 cpu0_pcie.apm             Locally Modified          216 


Some apms were using the wrong physical platforms.

----------
keflemin    Date: Fri Feb  7 13:19:33 EST 2014  CSN: CSN-multifpga-218
                  Fri Feb  7 18:19:33 UTC 2014


Directory config/pm/leap/demos/multifpga/li
 li_test_dual_vc707.apm    Locally Modified          217 
 li_test_dual_sim.apm      Locally Modified          217 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-dual-pcie-cpu0.apm Locally Modified          217 

Directory config/pm/multifpga/fpga_submodels/hwsw
 fpga1-hwsw.apm            Locally Modified          217 

Directory modules/bluespec/common/fpgaenv/physical-platform/pcie/dualPCIE
 dual-pcie-physical-platform.awb Locally Modified          217 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device-bdpi.c Locally Modified          217 


Fixed some rotted APMs -- multiple PCIE now functions again.  Cleaned
up communications code.

----------
keflemin    Date: Sun Feb  9 16:12:21 EST 2014  CSN: CSN-multifpga-219
                  Sun Feb  9 21:12:21 UTC 2014


Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified          218 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          218 


1) Refactored chain packetization code to use a single parameterized
constructor with curried packetizers.  This greatly improves the
maintainability of the packetization code.

2) Added no-pack packetizers for chains. These get used when routing
chains through software to other platforms.



----------
keflemin    Date: Mon Feb 10 15:40:38 EST 2014  CSN: CSN-multifpga-220
                  Mon Feb 10 20:40:38 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          219 


Added support for routing chains through software. Two functionalities
are partially enabled by this support:

1) We can have a CPU + SIM + FPGA configuration, in which the modules in the
simulator talk to modules in the FPGA using the CPU as an intermediary.

2) Multiple FPGA configurations no longer require direct physical links. 

These features come with two caveats.  

1) Send/Recv channels are not yet supported.  Support for them will
come shortly.

2) The software-side route through code has a potential flow-control
related deadlock.  The software will take some reworking, but this bug
is not a show stopper. 

----------
keflemin    Date: Thu Feb 13 16:47:53 EST 2014  CSN: CSN-multifpga-221
                  Thu Feb 13 21:47:53 UTC 2014


Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_vexe.apm Locally Added               0 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-vexe-fpgaN.apm Locally Added               0 
 multifpgaenv-hybrid-vexe-fpga0.apm Locally Added               0 

Directory config/pm/multifpga/fpga_submodels
 fpga1-verilog.apm         Locally Added               0 
 fpga0-verilog.apm         Locally Added               0 

Directory modules/leap/build-support
 stages/                   Locally Removed           220 

Directory modules/leap/build-support/pipelines
 multifpga_platform_verilog/ Locally Added               0 

Directory modules/leap/build-support/pipelines/multifpga_platform_verilog
 VerilogSimulationPipelineMultiFPGA.py Locally Added               0 
 verilog-sim-build-pipeline-multifpga.awb Locally Added               0 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device.bsv Locally Modified          220 

Directory modules/leap-platforms/fpga-environments/sim
 verilog_sim_fpga_env.awb  Locally Added               0 
 verilog-sim-dual.env      Locally Added               0 


Added support for verilog simulation platforms in the LIM compiler.
This consisted of providing a verilog backend for the platform
compilation phase (shared with legacy single platforms).

Fixed small bug in communications simulation code.  Bluespec's
ClockGen.v has a hard minimum of 5 for its period.  

----------
mcadler     Date: Thu Feb 13 18:05:58 EST 2014  CSN: CSN-multifpga-222
                  Thu Feb 13 23:05:58 UTC 2014


Directory modules/leap/debug/aurora-flowcontrol-debug
 aurora-flowcontrol-debug.cpp Locally Modified          221 
 aurora-flowcontrol-debug.h Locally Modified          221 
 aurora-flowcontrol-debug.bsv Locally Modified          221 
 sim-physical-platform.bsv Locally Modified          221 

Directory modules/leap/virtual-platform
 virtual-platform-li.h     Locally Modified          221 
 virtual-platform-li.bsv   Locally Modified          221 

Directory modules/leap/virtual-platform/rrr/li
 li-rrr.bsv                Locally Modified          221 
 li-rrr-client.cpp         Locally Modified          221 
 li-rrr-server.cpp         Locally Modified          221 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified          221 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 pointer-ingress.bsv       Locally Modified          221 
 flowcontrol-egress.bsv    Locally Modified          221 
 pointer-egress.bsv        Locally Modified          221 
 flowcontrol-ingress-regs.bsv Locally Modified          221 
 flowcontrol-ingress.bsv   Locally Modified          221 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service.bsv Locally Modified          221 

Directory modules/leap/virtual-platform/virtual-devices/platform-services
 platform-services-slave.bsv Locally Modified          221 
 platform-services-master.bsv Locally Modified          221 

Directory modules/leap/virtual-platform/low-level-platform-interface
 llpi-li.cpp               Locally Modified          221 
 llpi-li.h                 Locally Modified          221 
 llpi-li.bsv               Locally Modified          221 

Directory modules/leap/virtual-platform
 virtual-platform-li.cpp   Locally Modified          221 

Directory modules/leap/libraries/platform-services
 platform-services-aurora.bsv Locally Modified          221 

Directory modules/leap/libraries/platform-services/aurora-service
 aurora-service.bsv        Locally Modified          221 

Directory modules/leap/libraries/platform-services
 platform-services-inter-fpga.bsv Locally Modified          221 

Directory modules/leap/libraries/platform-services/inter-fpga-service/simulation
 simulation-interfpga-service.bsv Locally Modified          221 

Directory modules/leap/libraries/platform-services/inter-fpga-service/xupv5
 xupv5-interfpga-service.bsv Locally Modified          221 

Directory modules/leap/examples/hello-fellow
 hello-world.bsv           Locally Modified          221 
 hello-world.cpp           Locally Modified          221 
 hello-world.h             Locally Modified          221 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpgaN
 sim-physical-platform-fpgaN.bsv Locally Modified          221 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpga0
 sim-physical-platform-fpga0.bsv Locally Modified          221 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpga1
 sim-physical-platform-fpga1.bsv Locally Modified          221 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device-bdpi.c Locally Modified          221 
 unix-communication-device-bdpi.h Locally Modified          221 
 unix-communication-device.bsv Locally Modified          221 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/simulation-communication
 simulation-communication-device.bsv Locally Modified          221 

Directory modules/multifpga/longChain/connected_application
 connected-application-throughput.bsv Locally Modified          221 

Directory modules/multifpga/synthTest/connected_application
 connected-application-test.bsv Locally Modified          221 

Directory modules/multifpga/throughputTest/connected_application
 connected-application-throughput.bsv Locally Modified          221 

Directory modules/multifpga/spiral
 test-common-bdpi.c        Locally Modified          221 
 test-common-bdpi.h        Locally Modified          221 

Directory modules/multifpga/scratchdual/connected_application
 connected-application-test.bsv Locally Modified          221 

Switch to BSD license.

----------
keflemin    Date: Sat Feb 15 18:11:32 EST 2014  CSN: CSN-multifpga-223
                  Sat Feb 15 23:11:32 UTC 2014


Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device-bdpi.c Locally Modified          222 
 unix-communication-device.bsv Locally Modified          222 


Added support for platform sandboxing. 

----------
keflemin    Date: Mon Feb 17 16:02:21 EST 2014  CSN: CSN-multifpga-224
                  Mon Feb 17 21:02:21 UTC 2014


Directory config/pm/leap/demos/multifpga/li
 li_test_dual_sim_vc707_hub.apm Locally Added               0 
 li_test_dual_sim_vc707.apm Locally Added               0 
 li_test_dual_sim_hub.apm  Locally Added               0 

Directory config/pm/leap/submodels/fpgaenv/hwsw
 multifpgaenv-hybrid-exe-cpu0.apm Locally Modified          223 

Directory modules/leap/virtual-platform
 physical-channel/         Locally Added               0 

Directory modules/leap/virtual-platform/physical-channel
 pcie/                     Locally Added               0 

Directory modules/leap/virtual-platform/physical-channel/pcie
 bluenoc/                  Locally Added               0 

Directory modules/leap/virtual-platform/physical-channel/pcie/bluenoc
 pcie-bluenoc-physical-channel-software.awb Locally Added               0 

Directory modules/leap/virtual-platform/physical-channel
 combined/                 Locally Added               0 

Directory modules/leap/virtual-platform/physical-channel/combined
 combined-physical-channel.h Locally Added               0 
 combined-physical-channel.awb Locally Added               0 

Directory modules/leap/virtual-platform/physical-channel
 sim/                      Locally Added               0 

Directory modules/leap/virtual-platform/physical-channel/sim
 sim-physical-channel-software.awb Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          223 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation
 li/                       Locally Added               0 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/li
 cpu0/                     Locally Added               - 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/li/cpu0
 sim-physical-platform-fpga0.cpp Locally Removed           223 
 physical-platform-cpu0.cpp Locally Added               - 
 sim-physical-platform-fpga0.h Locally Removed           223 
 sim-physical-platform-fpga0.awb Locally Removed           223 
 sim-physical-platform-fpga0.bsv Locally Removed           223 
 physical-platform-cpu0.h  Locally Added               - 
 sim-physical-platform-fpga0.bsh Locally Removed           223 
 physical-platform-cpu0.awb Locally Added               - 

Directory modules/leap-platforms/fpga-environments/sim
 sim-vc707-hub-li.env      Locally Added               0 
 sim-dual-hub-hwsw.env     Locally Added               0 
 sim_vc707_hub_li.awb      Locally Added               0 
 sim_dual_hub_hwsw.awb     Locally Added               0 


1) Added scaffold for latency insensitive channel route-throughs in
software. The "hub" environments exercise this functionality.

2) Added support for heterogeneous software physical connections. 

----------
keflemin    Date: Thu Feb 20 17:41:52 EST 2014  CSN: CSN-multifpga-225
                  Thu Feb 20 22:41:52 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          224 

Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpga0
 sim-physical-platform-fpga0.h Locally Modified          224 


Refactored channel routing code and router generation to include a
read thread function.  This became possible due to the physical
channel refactoring eariler this week. 

----------
keflemin    Date: Fri Feb 21 14:16:04 EST 2014  CSN: CSN-multifpga-226
                  Fri Feb 21 19:16:04 UTC 2014


Directory config/pm/leap/demos/multifpga/li
 hasim_test_dual_sim_hub.apm Locally Added               0 
 test_multifpga_throughput_dual_sim_vc707_hub.apm Locally Added               0 
 test_multifpga_throughput_dual_sim_hub.apm Locally Added               0 
 hasim_test_dual_sim_vc707_hub.apm Locally Added               0 

Directory modules/leap/virtual-platform/physical-channel/pcie/bluenoc
 README                    Locally Added               0 

Directory modules/leap/virtual-platform/physical-channel/sim
 README                    Locally Added               0 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.h      Locally Modified          225 
 flowcontrol-egress.bsv    Locally Modified          225 
 flowcontrol-ingress.h     Locally Modified          225 

Directory modules/multifpga/throughputTest/connected_application
 connected-application-throughput.cpp Locally Modified          225 


1) Added some apm testing new fpga <-> simulator capabilities 

2) Added readmes documenting some of the new code (these were
accidentally omitted)

3) Added new debugging mode to flowcontrol-ingress, enabling to dump
credit counts.  Additionally flowcontrol ingress will halt simultion
if it encounters a credit overflow. 

----------
keflemin    Date: Tue Mar  4 13:41:57 EST 2014  CSN: CSN-multifpga-227
                  Tue Mar  4 18:41:57 UTC 2014


Directory config/pm/leap/demos/multifpga/li
 hasim_test_dual_sim_hub.apm Locally Modified          226 
 hasim_test_dual_sim_vc707_hub.apm Locally Modified          226 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          226 

Directory modules/multifpga/alpha_inorder
 sim-mapping-time-func.map Locally Modified          226 
 sim-mapping.map           Locally Modified          226 
 sim_mapping_one.awb       Locally Added               0 
 sim-mapping-one.map       Locally Added               0 

Directory modules/multifpga/throughputTest
 basestationImpl.bsv       Locally Modified          226 
 throughput-repeater.bsv   Locally Modified          226 


1) Fixed bug in bitfile generation in which dynamic parameter
dictionaries were not globally visible.  If different platforms had
different dynamic parameters, then platforms could disagree on
dictionary definitions. 

2) Added some new mapping files to support various configurations of
hasim.

3) Removed display statements from throughput test.  They got
annoying.


----------
keflemin    Date: Tue Mar  4 18:14:52 EST 2014  CSN: CSN-multifpga-228
                  Tue Mar  4 23:14:52 UTC 2014


Directory modules/bluespec/common/fpgaenv/physical-platform/simulation/fpga0
 sim-physical-platform-fpga0.h Locally Modified          227 


Legacy builds must correctly register at device construction time, or
the correct pipes will not be used at runtime.

----------
keflemin    Date: Wed Mar  5 18:25:28 EST 2014  CSN: CSN-multifpga-229
                  Wed Mar  5 23:25:28 UTC 2014


Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified          228 



Converted loop with carry dependency into a foldl, dramatically
improving compilation time.

----------
keflemin    Date: Sat Mar 29 16:55:31 EDT 2014  CSN: CSN-multifpga-230
                  Sat Mar 29 20:55:31 UTC 2014


Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_exe.apm Locally Modified          229 
 test_multifpga_throughput_vc707.apm Locally Modified          229 
 test_multifpga_chains_exe.apm Locally Modified          229 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_vc707.apm Locally Modified          229 
 alpha_inorder_multifpga_exe.apm Locally Modified          229 

Directory config/pm/multifpga/fpga_submodels
 fpga1.apm                 Locally Modified          229 
 vc707_1.apm               Locally Modified          229 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service-local.bsv Locally Modified          229 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified          229 
 flowcontrol-ingress.bsv   Locally Modified          229 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service
 multifpga-router-service.awb Locally Modified          229 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 activity.py               Locally Added               0 
 multiFPGAConnect.py       Locally Modified          229 
 multi-fpga-connect.awb    Locally Modified          229 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          229 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 generate_logfile.py       Locally Modified          229 
 environment_parse.py      Locally Modified          229 
 connection.py             Locally Modified          229 
 environment.py            Locally Modified          229 
 platform.py               Locally Modified          229 

Directory modules/multifpga
 chainTest/                Locally Added               0 

Directory modules/multifpga/chainTest
 repeater-2.bsv            Locally Added               0 
 repeater_2.awb            Locally Added               0 
 basestationImpl.rrr       Locally Added               0 
 basestation.awb           Locally Added               0 
 connected_application/    Locally Added               0 

Directory modules/multifpga/chainTest/connected_application
 connected-application-throughput.h Locally Added               0 
 connected-application-throughput.awb Locally Added               0 
 connected-application-throughput.bsv Locally Added               0 
 connected-application-throughput.cpp Locally Added               0 

Directory modules/multifpga/chainTest
 basestationImpl.bsv       Locally Added               0 
 throughput-repeater.bsv   Locally Added               0 
 throughput_repeater.awb   Locally Added               0 
 singleRepeater/           Locally Added               0 

Directory modules/multifpga/chainTest/singleRepeater
 singleRepeater.awb        Locally Added               0 
 test_top.bsv              Locally Added               0 

Directory modules/multifpga/chainTest
 awb.delete                Locally Added               0 
 dualRepeater/             Locally Added               0 

Directory modules/multifpga/chainTest/dualRepeater
 dualRepeater.awb          Locally Added               0 
 test_top.bsv              Locally Added               0 

Directory modules/multifpga/chainTest
 repeater-1.awb            Locally Added               0 
 basestationImpl.log       Locally Added               0 
 repeater-1.bsv            Locally Added               0 


1) Added new version of chain benchmark.  This is used primarily as a
smoke test for the LIM compiler.  Oh, how I wish some one would run
nightly regressions for me.

2) MASSIVE!!! reorganization of the LIM compiler.  LIM compiler now
uses the LI library that has been in use during normal LEAP
compilation for ~9 months.  The main LIM compiler routines have now
been written to operate on this library rather than the old hack-job
data structures that the original LIM compiler operated on.  Next up
will be seperating multiFPGAConnect.py into numerous smaller files
based on this reorganization.

This change will break several of the LIM build modes.  However,
baseline multifpga builds should continue to function.
 


----------
keflemin    Date: Mon Mar 31 21:38:53 EDT 2014  CSN: CSN-multifpga-231
                  Tue Apr  1 01:38:53 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 routerStats.py            Locally Added               0 
 compression.py            Locally Added               0 
 multiFPGAConnect.py       Locally Modified          230 
 multi-fpga-connect.awb    Locally Modified          230 
 generateMultiplexors.py   Locally Added               0 
 generateCode.py           Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 platform.py               Locally Modified          230 


Continued refactoring and splitting up multiFPGAConnect. File size is
now less than 1000 lines.

----------
keflemin    Date: Tue Apr  1 11:55:21 EDT 2014  CSN: CSN-multifpga-232
                  Tue Apr  1 15:55:21 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 umfType.py                Locally Modified          231 
 multiFPGAConnect.py       Locally Modified          231 
 multi-fpga-connect.awb    Locally Modified          231 
 analyzeNetwork.py         Locally Added               0 


Continued refactroring of LIM compiler.  Router analysis routines have
now been split into seperate files.  Main compilation file now less
than 500 lines.

----------
keflemin    Date: Tue Apr  1 14:53:42 EDT 2014  CSN: CSN-multifpga-233
                  Tue Apr  1 18:53:42 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          232 
 analyzeNetwork.py         Locally Modified          232 
 generateCode.py           Locally Modified          232 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          232 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 generate_logfile.py       Locally Modified          232 
 environment.py            Locally Modified          232 
 platform.py               Locally Modified          232 

Directory modules/leap/build-support/build-pipelines/stages/wrapper_gen
 fpgamap.py                Locally Modified          232 



Continued refactoring code.  Most prints have been elimanted or put
under the control of the pipeline debug flag.

Most code has been set to 4 space indentation. 


----------
keflemin    Date: Tue Apr  1 16:13:37 EDT 2014  CSN: CSN-multifpga-234
                  Tue Apr  1 20:13:37 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 umfType.py                Locally Modified          233 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 generate_logfile.py       Locally Modified          233 

Directory modules/leap/build-support/build-pipelines/stages/wrapper_gen
 fpgamap.py                Locally Modified          233 



More code cleanup/print removal.  No spurious prints remain.

----------
keflemin    Date: Tue Apr  1 17:20:37 EDT 2014  CSN: CSN-multifpga-235
                  Tue Apr  1 21:20:37 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 umfType.py                Locally Modified          234 
 multiFPGAConnect.py       Locally Modified          234 
 generateCode.py           Locally Modified          234 



Fixed some compile time warnings in LIM code gen. 

----------
keflemin    Date: Wed Apr  2 10:10:16 EDT 2014  CSN: CSN-multifpga-236
                  Wed Apr  2 14:10:16 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 environment_lex.py        Locally Modified          235 
 environment_parse.py      Locally Modified          235 
 environment_parser.py     Locally Modified          235 

Directory modules/leap/build-support/build-pipelines/stages/wrapper_gen
 fpgamapparse.py           Locally Modified          235 
 fpgamap_parser.py         Locally Modified          235 


1) Fixed warnings during ply lex/yacc compilation.  
2) Cache generated parser/lexer to reduce compile time.

----------
keflemin    Date: Wed Apr  2 11:33:16 EDT 2014  CSN: CSN-multifpga-237
                  Wed Apr  2 15:33:16 UTC 2014


Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_exe.apm Locally Modified          236 

Directory modules/leap/build-support/build-pipelines/stages
 parsers/                  Locally Added               - 

Directory modules/leap/build-support/build-pipelines/stages/parsers
 fpgamap_parser.awb        Locally Removed           236 
 fpgamap.py                Locally Removed           236 
 environment/              Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/parsers/environment
 multitest.py              Locally Added               - 
 physical_via.py           Locally Added               - 
 environment_lex.py        Locally Added               - 
 environment_parse.py      Locally Added               - 
 environment_parser.py     Locally Added               - 
 fpgaenvironment.awb       Locally Added               - 
 environment.py            Locally Added               - 
 platform.py               Locally Added               - 

Directory modules/leap/build-support/build-pipelines/stages/parsers
 fpgamaplex.py             Locally Removed           236 
 fpgamapparse.py           Locally Removed           236 
 map/                      Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/parsers/map
 fpgamap_parser.awb        Locally Added               - 
 fpgamap.py                Locally Added               - 
 fpgamaplex.py             Locally Added               - 
 fpgamapparse.py           Locally Added               - 
 fpgamap_parser.py         Locally Added               - 

Directory modules/leap/build-support/build-pipelines/stages/parsers
 fpgamap_parser.py         Locally Removed           236 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 multiFPGAConnect.py       Locally Modified          236 
 taggedUnionCompress.py    Locally Modified          236 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 multitest.py              Locally Removed           236 
 environment_lex.py        Locally Removed           236 
 environment_parse.py      Locally Removed           236 
 connection.py             Locally Removed           236 
 environment_parser.py     Locally Removed           236 
 fpgaenvironment.awb       Locally Removed           236 
 environment.py            Locally Removed           236 
 platform.py               Locally Removed           236 

Directory modules/leap/build-support/build-pipelines/stages
 wrapper_gen/              Locally Removed           236 

Directory modules/leap/build-support/build-pipelines/stages/wrapper_gen
 fpgamap_parser.awb        Locally Removed           236 
 fpgamap.py                Locally Removed           236 
 fpgamaplex.py             Locally Removed           236 
 fpgamapparse.py           Locally Removed           236 
 fpgamap_parser.py         Locally Removed           236 


More code reorganization.  Moved ply parsers and associated AST data
structures to their own directory.

----------
keflemin    Date: Wed Apr  2 11:51:05 EDT 2014  CSN: CSN-multifpga-238
                  Wed Apr  2 15:51:05 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages
 multi_fpga_connect/       Locally Removed           237 

Directory modules/leap/build-support/build-pipelines/stages/multi_fpga_connect
 umfType.py                Locally Removed           237 
 typelex.py                Locally Removed           237 
 softConnection.py         Locally Removed           237 
 activity.py               Locally Removed           237 
 type_parser.py            Locally Removed           237 
 linkType.py               Locally Removed           237 
 routerStats.py            Locally Removed           237 
 compression.py            Locally Removed           237 
 multiFPGAConnect.py       Locally Removed           237 
 danglingConnection.py     Locally Removed           237 
 dumpStructures.tcl        Locally Removed           237 
 taggedUnion.py            Locally Removed           237 
 member.py                 Locally Removed           237 
 typeclass.py              Locally Removed           237 
 viaAssignment.py          Locally Removed           237 
 code.py                   Locally Removed           237 
 parse_type.py             Locally Removed           237 
 typeparse.py              Locally Removed           237 
 multi-fpga-connect.awb    Locally Removed           237 
 analyzeNetwork.py         Locally Removed           237 
 typeparser.awb            Locally Removed           237 
 via.py                    Locally Removed           237 
 taggedUnionCompress.py    Locally Removed           237 
 type.py                   Locally Removed           237 
 viaType.py                Locally Removed           237 
 generateMultiplexors.py   Locally Removed           237 
 struct.py                 Locally Removed           237 
 generateCode.py           Locally Removed           237 
 linkAssignment.py         Locally Removed           237 

Directory modules/leap/build-support/build-pipelines/stages
 multifpga_connect/        Locally Added               - 


More file renaming.

----------
keflemin    Date: Wed Apr  2 12:58:00 EDT 2014  CSN: CSN-multifpga-239
                  Wed Apr  2 16:58:00 UTC 2014


Directory config/pm/leap/tests/mem_perf
 mem_perf_multifpga_exe.apm Locally Modified          238 
 mem_perf_multifpga_single_mem_acp.apm Locally Modified          238 
 mem_perf_multifpga_acp.apm Locally Modified          238 
 mem_perf_multifpga_alt_acp.apm Locally Modified          238 
 mem_perf_multifpga_ml605.apm Locally Modified          238 
 mem_perf_multifpga_vc707.apm Locally Modified          238 

Directory config/pm/leap/demos/hello
 hello_hybrid_dual_exe.apm Locally Modified          238 
 hello_hybrid_dual_acp.apm Locally Modified          238 
 hello_hybrid_dual_vc707.apm Locally Modified          238 

Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_ml605.apm Locally Modified          238 
 test_multifpga_throughput_vexe.apm Locally Modified          238 
 test_multifpga_perf_xupv5.apm Locally Modified          238 
 test_multifpga_loop.apm   Locally Modified          238 
 test_multifpga_chains_dual_hub_exe.apm Locally Modified          238 
 test_multifpga_throughput_exe.apm Locally Modified          238 
 test_multifpga_chains_xupv5.apm Locally Modified          238 
 test_multifpga_compress_acp.apm Locally Modified          238 
 traffic_light_acp_synth_multifpga.apm Locally Modified          238 
 test_multifpga_perf_ml605.apm Locally Modified          238 
 test_multifpga_alternative_exe.apm Locally Modified          238 
 test_multifpga_perf_acp_single.apm Locally Modified          238 
 test_multifpga.apm        Locally Modified          238 

Directory config/pm/leap/demos/multifpga/li
 li_test_dual_sim_vc707_hub.apm Locally Modified          238 
 li_test_dual_sim_vc707.apm Locally Modified          238 
 hasim_test_sim.apm        Locally Modified          238 
 li_test_sim.apm           Locally Modified          238 
 hasim_test_dual_sim_hub.apm Locally Modified          238 
 rrr_test_li_vc707.apm     Locally Modified          238 
 li_test_dual_sim_hub.apm  Locally Modified          238 
 li_test_dual_sim.apm      Locally Modified          238 
 test_multifpga_throughput_dual_sim_vc707_hub.apm Locally Modified          238 
 traffic_light_acp_synth_multifpga.apm Locally Modified          238 
 hasim_test_vc707.apm      Locally Modified          238 
 rrr_test_li.apm           Locally Modified          238 
 li_test_vc707.apm         Locally Modified          238 
 test_multifpga_throughput_hwsw_exe.apm Locally Modified          238 
 traffic_light_li.apm      Locally Modified          238 
 test_multifpga_throughput_dual_sim_hub.apm Locally Modified          238 
 li_test_dual_vc707.apm    Locally Modified          238 
 hasim_test_dual_sim_vc707_hub.apm Locally Modified          238 

Directory config/pm/leap/demos/multifpga
 test_multifpga_exe.apm    Locally Modified          238 
 test_multifpga_scratch.apm Locally Modified          238 
 test_multifpga_chains_ml605.apm Locally Modified          238 
 test_multifpga_spiral_exe.apm Locally Modified          238 
 test_multifpga_throughput_acp.apm Locally Modified          238 
 test_multifpga_loop_acp.apm Locally Modified          238 
 test_multifpga_throughput_dual_hub_ml605.apm Locally Modified          238 
 test_multifpga_throughput_vc707.apm Locally Modified          238 
 test_multifpga_chains_quad_hub_ml605.apm Locally Modified          238 
 test_multifpga_rrr_exe.apm Locally Modified          238 
 test_multifpga_chains_exe.apm Locally Modified          238 
 test_multifpga_throughput_tri_hub_ml605.apm Locally Modified          238 
 test_multifpga_scratch_acp.apm Locally Modified          238 
 test_multifpga_chains_xupv5_sma.apm Locally Modified          238 
 test_multifpga_chains_quad_hub_exe.apm Locally Modified          238 
 test_multifpga_perf_acp.apm Locally Modified          238 
 test_multifpga_throughput_xupv5.apm Locally Modified          238 
 test_multifpga_throughput_aurora_exe.apm Locally Modified          238 
 test_multifpga_chains_xupv5_sata.apm Locally Modified          238 
 test_multifpga_rrr_acp.apm Locally Modified          238 
 test_multifpga_chains_acp.apm Locally Modified          238 
 test_multifpga_chains_dual_hub_ml605.apm Locally Modified          238 
 test_multifpga_compress.apm Locally Modified          238 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpgaN.apm Locally Modified          238 
 multifpgaenv-hybrid-exe-airblue-fpga0.apm Locally Modified          238 

Directory config/pm/leap/submodels/fpgaenv/hwsw
 multifpgaenv-hwsw-exe-fpga0-aurora.apm Locally Modified          238 
 multifpgaenv-hwsw-exe-fpga0.apm Locally Modified          238 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpga1.apm Locally Modified          238 
 multifpgaenv-hybrid-vexe-fpgaN.apm Locally Modified          238 
 multifpgaenv-hybrid-vexe-fpga0.apm Locally Modified          238 
 multifpgaenv-hybrid-exe-fpga0-aurora.apm Locally Modified          238 
 multifpgaenv-hybrid-exe-fpga0-quad.apm Locally Modified          238 
 multifpgaenv-hybrid-exe-fpga0.apm Locally Modified          238 
 multifpgaenv-hybrid-exe-fpga1.apm Locally Modified          238 
 multifpgaenv-hybrid-exe-fpga0-dist-cache.apm Locally Modified          238 

Directory config/pm/leap/submodels/fpgaenv/inter-fpga-test
 inter-fpga-test-hybrid-exe-fpga1.apm Locally Modified          238 
 inter-fpga-test-hybrid-exe-fpga0.apm Locally Modified          238 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified          238 
 multifpgaenv-hybrid-exe-airblue-fpgaN-aurora.apm Locally Modified          238 

Directory config/pm/airblue/library_tests
 softphy_SOVA_acp.apm      Locally Modified          238 

Directory config/pm/h264
 softphy_SOVA_acp.apm      Locally Modified          238 
 h264_multifpga_decoder_split_synth.apm Locally Modified          238 
 h264_multifpga_decoder_split_synth_exe.apm Locally Modified          238 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_mesh_sharedLLC_MESI_exe_0064_multifpga.apm Locally Modified          238 
 alpha_inorder_multifpga_vc707.apm Locally Modified          238 
 alpha_inorder_multifpga_time_func_exe.apm Locally Modified          238 
 alpha_inorder_multifpga_time_func_acp_sram.apm Locally Modified          238 
 alpha_inorder_multifpga_time_func_xupv5.apm Locally Modified          238 
 alpha_inorder_multifpga_time_func_dist_cache_exe.apm Locally Modified          238 
 alpha_inorder_multifpga_exe.apm Locally Modified          238 
 alpha_inorder_multifpga_time_func_16_acp_sram.apm Locally Modified          238 
 alpha_inorder_mesh_sharedLLC_MESI_acp_0064_multifpga.apm Locally Modified          238 
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0064_multifpga.apm Locally Modified          238 
 alpha_inorder_multifpga_aurora_exe.apm Locally Modified          238 
 alpha_inorder_multifpga_time_func_acp.apm Locally Modified          238 
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0256_multifpga.apm Locally Modified          238 
 alpha_inorder_multifpga_time_func_acp_sram_2.apm Locally Modified          238 
 alpha_inorder_multifpga_acp.apm Locally Modified          238 
 alpha_inorder_multifpga_ml605.apm Locally Modified          238 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-vc707-fpga0.apm Locally Modified          238 
 multifpgaenv-hybrid-vc707-fpga1.apm Locally Modified          238 
 multifpgaenv-hybrid-xupv5-fpga1-sata.apm Locally Modified          238 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified          238 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified          238 
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          238 

Directory config/pm/multifpga/fpga_submodels/hwsw
 multifpgaenv-hwsw-vc707-fpga0.apm Locally Modified          238 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          238 
 multifpgaenv-hybrid-xupv5-fpga0-sata.apm Locally Modified          238 

Directory config/pm/multifpga/inter_fpga_test/simulation
 inter_test_0_simulation.apm Locally Modified          238 
 inter_test_1_simulation.apm Locally Modified          238 

Directory config/pm/multifpga/inter_fpga_test/xupv5
 inter_test_0_xupv5.apm    Locally Modified          238 
 inter_test_1_xupv5.apm    Locally Modified          238 
 inter_test_0_xupv5_sma_3.125gbps.apm Locally Modified          238 
 inter_test_1_xupv5_sma_3.125gbps.apm Locally Modified          238 
 inter_test_0_xupv5_sata_3gbps.apm Locally Modified          238 
 inter_test_1_xupv5_sata_3gbps.apm Locally Modified          238 


Fixed broken/stale apms. 

----------
keflemin    Date: Wed Apr  2 13:42:28 EDT 2014  CSN: CSN-multifpga-240
                  Wed Apr  2 17:42:28 UTC 2014


Directory config/pm/leap/tests/mem_perf
 mem_perf_multifpga_exe.apm Locally Modified          239 
 mem_perf_multifpga_acp.apm Locally Modified          239 
 mem_perf_multifpga_alt_acp.apm Locally Modified          239 
 mem_perf_multifpga_ml605.apm Locally Modified          239 
 mem_perf_multifpga_vc707.apm Locally Modified          239 

Directory config/pm/leap/demos/hello
 hello_hybrid_dual_exe.apm Locally Modified          239 
 hello_hybrid_dual_acp.apm Locally Modified          239 
 hello_hybrid_dual_vc707.apm Locally Modified          239 

Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_ml605.apm Locally Modified          239 
 test_multifpga_throughput_vexe.apm Locally Modified          239 
 test_multifpga_loop.apm   Locally Modified          239 
 test_multifpga_chains_dual_hub_exe.apm Locally Modified          239 
 test_multifpga_throughput_exe.apm Locally Modified          239 
 test_multifpga_compress_acp.apm Locally Modified          239 
 test_multifpga_perf_ml605.apm Locally Modified          239 

Directory config/pm/leap/demos/multifpga/li
 li_test_dual_sim_vc707_hub.apm Locally Modified          239 
 li_test_dual_sim_vc707.apm Locally Modified          239 
 hasim_test_sim.apm        Locally Modified          239 
 li_test_sim.apm           Locally Modified          239 
 hasim_test_dual_sim_hub.apm Locally Modified          239 
 li_test_dual_sim_hub.apm  Locally Modified          239 
 li_test_dual_sim.apm      Locally Modified          239 
 test_multifpga_throughput_dual_sim_vc707_hub.apm Locally Modified          239 
 hasim_test_vc707.apm      Locally Modified          239 
 li_test_vc707.apm         Locally Modified          239 
 test_multifpga_throughput_hwsw_exe.apm Locally Modified          239 
 traffic_light_li.apm      Locally Modified          239 
 test_multifpga_throughput_dual_sim_hub.apm Locally Modified          239 
 li_test_dual_vc707.apm    Locally Modified          239 
 hasim_test_dual_sim_vc707_hub.apm Locally Modified          239 

Directory config/pm/leap/demos/multifpga
 test_multifpga_exe.apm    Locally Modified          239 
 test_multifpga_chains_ml605.apm Locally Modified          239 
 test_multifpga_spiral_exe.apm Locally Modified          239 
 test_multifpga_loop_acp.apm Locally Modified          239 
 test_multifpga_throughput_dual_hub_ml605.apm Locally Modified          239 
 test_multifpga_throughput_vc707.apm Locally Modified          239 
 test_multifpga_chains_quad_hub_ml605.apm Locally Modified          239 
 test_multifpga_chains_exe.apm Locally Modified          239 
 test_multifpga_throughput_tri_hub_ml605.apm Locally Modified          239 
 test_multifpga_chains_quad_hub_exe.apm Locally Modified          239 
 test_multifpga_perf_acp.apm Locally Modified          239 
 test_multifpga_throughput_aurora_exe.apm Locally Modified          239 
 test_multifpga_chains_acp.apm Locally Modified          239 
 test_multifpga_chains_dual_hub_ml605.apm Locally Modified          239 
 test_multifpga_compress.apm Locally Modified          239 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_mesh_sharedLLC_MESI_exe_0064_multifpga.apm Locally Modified          239 
 alpha_inorder_multifpga_vc707.apm Locally Modified          239 
 alpha_inorder_multifpga_time_func_exe.apm Locally Modified          239 
 alpha_inorder_multifpga_exe.apm Locally Modified          239 
 alpha_inorder_mesh_sharedLLC_MESI_acp_0064_multifpga.apm Locally Modified          239 
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0064_multifpga.apm Locally Modified          239 
 alpha_inorder_multifpga_aurora_exe.apm Locally Modified          239 
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0256_multifpga.apm Locally Modified          239 
 alpha_inorder_multifpga_acp.apm Locally Modified          239 
 alpha_inorder_multifpga_ml605.apm Locally Modified          239 

Directory modules/leap/build-support/build-pipelines/stages/parsers
 bsv-types/                Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/parsers/bsv-types
 typelex.py                Locally Added               - 
 parse_type.py             Locally Added               - 
 typeparse.py              Locally Added               - 
 type_parser.py            Locally Added               - 
 typeparser.awb            Locally Added               - 
 type.py                   Locally Added               - 
 dumpStructures.tcl        Locally Added               - 
 struct.py                 Locally Added               - 
 taggedUnion.py            Locally Added               - 
 typeclass.py              Locally Added               - 
 member.py                 Locally Added               - 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 typelex.py                Locally Removed           239 
 type_parser.py            Locally Removed           239 
 dumpStructures.tcl        Locally Removed           239 
 taggedUnion.py            Locally Removed           239 
 member.py                 Locally Removed           239 
 typeclass.py              Locally Removed           239 
 parse_type.py             Locally Removed           239 
 typeparse.py              Locally Removed           239 
 typeparser.awb            Locally Removed           239 
 type.py                   Locally Removed           239 
 struct.py                 Locally Removed           239 


1) Moved bsv type parser to its own directory. 

2) Fixed resulting stale apms. 

----------
keflemin    Date: Thu Apr  3 14:21:09 EDT 2014  CSN: CSN-multifpga-241
                  Thu Apr  3 18:21:09 UTC 2014


Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_exe.apm Locally Modified          240 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 type-compression/         Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/type-compression
 taggedUnionCompress.py    Locally Added               - 
 compression.py            Locally Added               - 
 lim-compression.awb       Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 umfType.py                Locally Removed           240 
 softConnection.py         Locally Removed           240 
 routerStats.py            Locally Removed           240 
 linkType.py               Locally Removed           240 
 common/                   Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/common
 viaAssignment.py          Locally Added               - 
 lim-common.awb            Locally Added               0 
 umfType.py                Locally Added               - 
 code.py                   Locally Added               - 
 linkType.py               Locally Added               - 
 via.py                    Locally Added               - 
 viaType.py                Locally Added               - 
 linkAssignment.py         Locally Added               - 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 compression.py            Locally Removed           240 
 multiFPGAConnect.py       Locally Modified          240 
 danglingConnection.py     Locally Removed           240 
 analyze-network/          Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/analyze-network
 analyze-network.awb       Locally Added               0 
 analyzeNetwork.py         Locally Added               - 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 viaAssignment.py          Locally Removed           240 
 code.py                   Locally Removed           240 
 generate-code/            Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/generate-code
 routerStats.py            Locally Added               - 
 generateMultiplexors.py   Locally Added               - 
 generate-code.awb         Locally Added               0 
 generateCode.py           Locally Added               - 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 multi-fpga-connect.awb    Locally Modified          240 
 analyzeNetwork.py         Locally Removed           240 
 via.py                    Locally Removed           240 
 taggedUnionCompress.py    Locally Removed           240 
 viaType.py                Locally Removed           240 
 generateMultiplexors.py   Locally Removed           240 
 generateCode.py           Locally Removed           240 
 linkAssignment.py         Locally Removed           240 


Reorganized main compiler body passes into seperate awb directories.
This should improve code readability.

----------
keflemin    Date: Thu Apr  3 15:08:54 EDT 2014  CSN: CSN-multifpga-242
                  Thu Apr  3 19:08:54 UTC 2014


Directory config/pm/leap/tests/mem_perf
 mem_perf_multifpga_exe.apm Locally Modified          241 
 mem_perf_multifpga_single_mem_acp.apm Locally Modified          241 
 mem_perf_multifpga_acp.apm Locally Modified          241 
 mem_perf_multifpga_alt_acp.apm Locally Modified          241 
 mem_perf_multifpga_ml605.apm Locally Modified          241 
 mem_perf_multifpga_vc707.apm Locally Modified          241 

Directory config/pm/leap/demos/hello
 hello_hybrid_dual_exe.apm Locally Modified          241 
 hello_hybrid_dual_acp.apm Locally Modified          241 
 hello_hybrid_dual_vc707.apm Locally Modified          241 

Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_ml605.apm Locally Modified          241 
 test_multifpga_throughput_vexe.apm Locally Modified          241 
 test_multifpga_perf_xupv5.apm Locally Modified          241 
 test_multifpga_loop.apm   Locally Modified          241 
 test_multifpga_chains_dual_hub_exe.apm Locally Modified          241 
 test_multifpga_throughput_exe.apm Locally Modified          241 
 test_multifpga_chains_xupv5.apm Locally Modified          241 
 test_multifpga_compress_acp.apm Locally Modified          241 
 traffic_light_acp_synth_multifpga.apm Locally Modified          241 
 test_multifpga_perf_ml605.apm Locally Modified          241 
 test_multifpga_alternative_exe.apm Locally Modified          241 
 test_multifpga_perf_acp_single.apm Locally Modified          241 
 test_multifpga.apm        Locally Modified          241 

Directory config/pm/leap/demos/multifpga/li
 li_test_dual_sim_vc707_hub.apm Locally Modified          241 
 li_test_dual_sim_vc707.apm Locally Modified          241 
 hasim_test_sim.apm        Locally Modified          241 
 hasim_test_dual_sim_hub.apm Locally Modified          241 
 li_test_sim.apm           Locally Modified          241 
 li_test_dual_sim_hub.apm  Locally Modified          241 
 rrr_test_li_vc707.apm     Locally Modified          241 
 li_test_dual_sim.apm      Locally Modified          241 
 test_multifpga_throughput_dual_sim_vc707_hub.apm Locally Modified          241 
 traffic_light_acp_synth_multifpga.apm Locally Modified          241 
 hasim_test_vc707.apm      Locally Modified          241 
 rrr_test_li.apm           Locally Modified          241 
 traffic_light_li.apm      Locally Modified          241 
 test_multifpga_throughput_hwsw_exe.apm Locally Modified          241 
 li_test_vc707.apm         Locally Modified          241 
 test_multifpga_throughput_dual_sim_hub.apm Locally Modified          241 
 li_test_dual_vc707.apm    Locally Modified          241 
 hasim_test_dual_sim_vc707_hub.apm Locally Modified          241 

Directory config/pm/leap/demos/multifpga
 test_multifpga_exe.apm    Locally Modified          241 
 test_multifpga_scratch.apm Locally Modified          241 
 test_multifpga_chains_ml605.apm Locally Modified          241 
 test_multifpga_spiral_exe.apm Locally Modified          241 
 test_multifpga_throughput_acp.apm Locally Modified          241 
 test_multifpga_loop_acp.apm Locally Modified          241 
 test_multifpga_throughput_dual_hub_ml605.apm Locally Modified          241 
 test_multifpga_throughput_vc707.apm Locally Modified          241 
 test_multifpga_chains_quad_hub_ml605.apm Locally Modified          241 
 test_multifpga_rrr_exe.apm Locally Modified          241 
 test_multifpga_chains_exe.apm Locally Modified          241 
 test_multifpga_throughput_tri_hub_ml605.apm Locally Modified          241 
 test_multifpga_scratch_acp.apm Locally Modified          241 
 test_multifpga_chains_xupv5_sma.apm Locally Modified          241 
 test_multifpga_chains_quad_hub_exe.apm Locally Modified          241 
 test_multifpga_perf_acp.apm Locally Modified          241 
 test_multifpga_throughput_xupv5.apm Locally Modified          241 
 test_multifpga_throughput_aurora_exe.apm Locally Modified          241 
 test_multifpga_chains_xupv5_sata.apm Locally Modified          241 
 test_multifpga_rrr_acp.apm Locally Modified          241 
 test_multifpga_chains_acp.apm Locally Modified          241 
 test_multifpga_chains_dual_hub_ml605.apm Locally Modified          241 
 test_multifpga_compress.apm Locally Modified          241 

Directory config/pm/airblue/library_tests
 softphy_SOVA_acp.apm      Locally Modified          241 

Directory config/pm/h264
 softphy_SOVA_acp.apm      Locally Modified          241 
 h264_multifpga_decoder_split_synth.apm Locally Modified          241 
 h264_multifpga_decoder_split_synth_exe.apm Locally Modified          241 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_mesh_sharedLLC_MESI_exe_0064_multifpga.apm Locally Modified          241 
 alpha_inorder_multifpga_vc707.apm Locally Modified          241 
 alpha_inorder_multifpga_time_func_exe.apm Locally Modified          241 
 alpha_inorder_multifpga_time_func_acp_sram.apm Locally Modified          241 
 alpha_inorder_multifpga_time_func_dist_cache_exe.apm Locally Modified          241 
 alpha_inorder_multifpga_time_func_xupv5.apm Locally Modified          241 
 alpha_inorder_multifpga_exe.apm Locally Modified          241 
 alpha_inorder_multifpga_time_func_16_acp_sram.apm Locally Modified          241 
 alpha_inorder_mesh_sharedLLC_MESI_acp_0064_multifpga.apm Locally Modified          241 
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0064_multifpga.apm Locally Modified          241 
 alpha_inorder_multifpga_aurora_exe.apm Locally Modified          241 
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0256_multifpga.apm Locally Modified          241 
 alpha_inorder_multifpga_time_func_acp.apm Locally Modified          241 
 alpha_inorder_multifpga_time_func_acp_sram_2.apm Locally Modified          241 
 alpha_inorder_multifpga_acp.apm Locally Modified          241 
 alpha_inorder_multifpga_ml605.apm Locally Modified          241 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/common
 umfType.py                Locally Modified          241 


1) fixed bug in umf type assignment. If we chose a size 0 assignment
(for some reason), this caused a math exception when calculating
types.

2) Fixed broken apms.



----------
keflemin    Date: Sat Apr  5 17:36:07 EDT 2014  CSN: CSN-multifpga-243
                  Sat Apr  5 21:36:07 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/parsers/environment
 physical_via.py           Locally Modified          242 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/generate-code
 generateMultiplexors.py   Locally Modified          242 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 activity.py               Locally Modified          242 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/common
 viaAssignment.py          Locally Modified          242 
 via.py                    Locally Modified          242 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 multiFPGAConnect.py       Locally Modified          242 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/analyze-network
 analyze-network.awb       Locally Modified          242 
 analyzeNetwork.py         Locally Modified          242 


1) Fixed bug in analyzeNetwork that was causing multi-via routers to
fail.

2) Improved/Added string representations of various data structures.

3) Revived activity tagging. 


----------
keflemin    Date: Tue Apr  8 19:16:21 EDT 2014  CSN: CSN-multifpga-244
                  Tue Apr  8 23:16:21 UTC 2014


Directory config/pm/leap/demos/multifpga/li
 li_test_sim.apm           Locally Modified          243 

Directory config/pm/leap/submodels/fpgaenv/hwsw
 multifpgaenv-hybrid-exe-cpu0.apm Locally Modified          243 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_mesh_sharedLLC_MESI_exe_0064_multifpga.apm Locally Modified          243 

Directory config/pm/multifpga/fpga_submodels
 fpga1-aurora.apm          Locally Modified          243 

Directory modules/leap/virtual-platform/virtual-devices/devices/multifpga_router_service/flowcontrol
 flowcontrol-egress.bsv    Locally Modified          243 

Directory modules/leap/build-support/build-pipelines/stages/parsers/environment
 physical_via.py           Locally Modified          243 
 platform.py               Locally Modified          243 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/generate-code
 generateCode.py           Locally Modified          243 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 activity.py               Locally Modified          243 
 multiFPGAConnect.py       Locally Modified          243 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/analyze-network
 analyzeNetwork.py         Locally Modified          243 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 generate_logfile.py       Locally Modified          243 



1) Upgraded new compiler organization to support hardware-software LI
channels.  Software compilation now follows the same path as hardware
compilation.

2) Incumbent in 1) was doing a true first pass for CPP.  This now
occurs.



----------
keflemin    Date: Wed Apr  9 13:24:14 EDT 2014  CSN: CSN-multifpga-245
                  Wed Apr  9 17:24:14 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/generate-code
 generateCode.py           Locally Modified          244 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/common
 via.py                    Locally Modified          244 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 multiFPGAConnect.py       Locally Modified          244 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/analyze-network
 analyzeNetwork.py         Locally Modified          244 


1) Ferreted out a bug in analyze network that was causing builds with
asymmetric router allocations to fail.  Complex HAsim builds are now
operation with router optimizations turned on. 

2) Added more commments. 

----------
keflemin    Date: Wed Apr  9 14:45:34 EDT 2014  CSN: CSN-multifpga-246
                  Wed Apr  9 18:45:34 UTC 2014


Directory experiments/multifpga/nightly
 nightly.models            Locally Modified          245 
 nightly.benchmarks        Locally Modified          245 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 multiFPGAConnect.py       Locally Modified          245 


1) More comments
2) Extended nightly regressions to include HAsim multifpga targets.

----------
keflemin    Date: Mon Apr 14 15:17:41 EDT 2014  CSN: CSN-multifpga-247
                  Mon Apr 14 19:17:41 UTC 2014


Directory experiments/multifpga/nightly
 nightly.models            Locally Modified          246 
 nightly.benchmarks        Locally Modified          246 

Directory config/pm/leap/tests/mem_perf
 mem_perf_multifpga_exe.apm Locally Modified          246 
 mem_perf_multifpga_single_mem_acp.apm Locally Modified          246 
 mem_perf_multifpga_acp.apm Locally Modified          246 
 mem_perf_multifpga_alt_acp.apm Locally Modified          246 
 mem_perf_multifpga_ml605.apm Locally Modified          246 
 mem_perf_multifpga_vc707.apm Locally Modified          246 

Directory config/pm/leap/demos/hello
 hello_hybrid_dual_exe.apm Locally Modified          246 
 hello_hybrid_dual_acp.apm Locally Modified          246 
 hello_hybrid_dual_vc707.apm Locally Modified          246 

Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_ml605.apm Locally Modified          246 
 test_multifpga_throughput_vexe.apm Locally Modified          246 
 test_multifpga_perf_xupv5.apm Locally Modified          246 
 test_multifpga_loop.apm   Locally Modified          246 
 test_multifpga_chains_dual_hub_exe.apm Locally Modified          246 
 test_multifpga_throughput_exe.apm Locally Modified          246 
 test_multifpga_chains_xupv5.apm Locally Modified          246 
 test_multifpga_compress_acp.apm Locally Modified          246 
 traffic_light_acp_synth_multifpga.apm Locally Modified          246 
 test_multifpga_perf_ml605.apm Locally Modified          246 
 test_multifpga_alternative_exe.apm Locally Modified          246 
 test_multifpga_perf_acp_single.apm Locally Modified          246 
 test_multifpga.apm        Locally Modified          246 

Directory config/pm/leap/demos/multifpga/li
 li_test_dual_sim_vc707_hub.apm Locally Modified          246 
 li_test_dual_sim_vc707.apm Locally Modified          246 
 hasim_test_sim.apm        Locally Modified          246 
 li_test_sim.apm           Locally Modified          246 
 hasim_test_dual_sim_hub.apm Locally Modified          246 
 rrr_test_li_vc707.apm     Locally Modified          246 
 li_test_dual_sim_hub.apm  Locally Modified          246 
 li_test_dual_sim.apm      Locally Modified          246 
 test_multifpga_throughput_dual_sim_vc707_hub.apm Locally Modified          246 
 traffic_light_acp_synth_multifpga.apm Locally Modified          246 
 hasim_test_vc707.apm      Locally Modified          246 
 rrr_test_li.apm           Locally Modified          246 
 li_test_vc707.apm         Locally Modified          246 
 test_multifpga_throughput_hwsw_exe.apm Locally Modified          246 
 traffic_light_li.apm      Locally Modified          246 
 test_multifpga_throughput_dual_sim_hub.apm Locally Modified          246 
 li_test_dual_vc707.apm    Locally Modified          246 
 hasim_test_dual_sim_vc707_hub.apm Locally Modified          246 

Directory config/pm/leap/demos/multifpga
 test_multifpga_exe.apm    Locally Modified          246 
 test_multifpga_scratch.apm Locally Modified          246 
 test_multifpga_chains_ml605.apm Locally Modified          246 
 test_multifpga_spiral_exe.apm Locally Modified          246 
 test_multifpga_throughput_acp.apm Locally Modified          246 
 test_multifpga_loop_acp.apm Locally Modified          246 
 test_multifpga_throughput_dual_hub_ml605.apm Locally Modified          246 
 test_multifpga_throughput_vc707.apm Locally Modified          246 
 test_multifpga_chains_quad_hub_ml605.apm Locally Modified          246 
 test_multifpga_rrr_exe.apm Locally Modified          246 
 test_multifpga_chains_exe.apm Locally Modified          246 
 test_multifpga_throughput_tri_hub_ml605.apm Locally Modified          246 
 test_multifpga_scratch_acp.apm Locally Modified          246 
 test_multifpga_chains_xupv5_sma.apm Locally Modified          246 
 test_multifpga_chains_quad_hub_exe.apm Locally Modified          246 
 test_multifpga_perf_acp.apm Locally Modified          246 
 test_multifpga_throughput_xupv5.apm Locally Modified          246 
 test_multifpga_throughput_aurora_exe.apm Locally Modified          246 
 test_multifpga_chains_xupv5_sata.apm Locally Modified          246 
 test_multifpga_rrr_acp.apm Locally Modified          246 
 test_multifpga_chains_acp.apm Locally Modified          246 
 test_multifpga_chains_dual_hub_ml605.apm Locally Modified          246 
 test_multifpga_compress.apm Locally Modified          246 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga0-aurora.apm Locally Modified          246 
 multifpgaenv-hybrid-exe-airblue-fpgaN-aurora.apm Locally Modified          246 

Directory config/pm/airblue/library_tests
 softphy_SOVA_acp.apm      Locally Modified          246 

Directory config/pm/h264
 softphy_SOVA_acp.apm      Locally Modified          246 
 h264_multifpga_decoder_split_synth.apm Locally Modified          246 
 h264_multifpga_decoder_split_synth_exe.apm Locally Modified          246 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_mesh_sharedLLC_MESI_exe_0064_multifpga.apm Locally Modified          246 
 alpha_inorder_multifpga_vc707.apm Locally Modified          246 
 alpha_inorder_multifpga_time_func_exe.apm Locally Modified          246 
 alpha_inorder_multifpga_time_func_acp_sram.apm Locally Modified          246 
 alpha_inorder_multifpga_time_func_dist_cache_exe.apm Locally Modified          246 
 alpha_inorder_multifpga_time_func_xupv5.apm Locally Modified          246 
 alpha_inorder_multifpga_exe.apm Locally Modified          246 
 alpha_inorder_multifpga_time_func_16_acp_sram.apm Locally Modified          246 
 alpha_inorder_mesh_sharedLLC_MESI_acp_0064_multifpga.apm Locally Modified          246 
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0064_multifpga.apm Locally Modified          246 
 alpha_inorder_multifpga_aurora_exe.apm Locally Modified          246 
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0256_multifpga.apm Locally Modified          246 
 alpha_inorder_multifpga_time_func_acp.apm Locally Modified          246 
 alpha_inorder_multifpga_time_func_acp_sram_2.apm Locally Modified          246 
 alpha_inorder_multifpga_acp.apm Locally Modified          246 
 alpha_inorder_multifpga_ml605.apm Locally Modified          246 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 multi-fpga-connect.awb    Locally Modified          246 
 multiFPGAConnect.py       Locally Modified          246 
 map/                      Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/map
 placeModules.py           Locally Added               0 
 place-modules-multifpga.awb Locally Added               0 

Directory modules/bluespec/common/fpgaenv/physical-platform/physical-devices/unix-communication
 unix-communication-device.awb Locally Modified          246 
 unix-communication-device.bsv Locally Modified          246 


1) Factored module placement routines out of main LIM compilation
flow.  This paves the way for adding solver-based placement algorithms
using pyglpk (a new dependency). 

2) Refactored crc test code to periodically flip single (randomly
chosen) bit.  Added test case to nightly.

----------
keflemin    Date: Thu Apr 17 17:18:09 EDT 2014  CSN: CSN-multifpga-248
                  Thu Apr 17 21:18:09 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/parsers/map
 fpgamap.py                Locally Modified          247 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 activity.py               Locally Modified          247 
 multiFPGAConnect.py       Locally Modified          247 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/map
 placeModules.py           Locally Modified          247 


Added communication-minimization algorithm for automatic placement of
LI Modules onto arbitrary LI graph. The algorithm takes the form of a
linear program, which is fed into glpk. 


----------
keflemin    Date: Mon Apr 21 15:02:58 EDT 2014  CSN: CSN-multifpga-249
                  Mon Apr 21 19:02:58 UTC 2014


Directory config/pm/leap/tests/mem_perf
 mem_perf_multifpga_exe.apm Locally Modified          248 
 mem_perf_multifpga_single_mem_acp.apm Locally Modified          248 
 mem_perf_multifpga_acp.apm Locally Modified          248 
 mem_perf_multifpga_alt_acp.apm Locally Modified          248 
 mem_perf_multifpga_ml605.apm Locally Modified          248 
 mem_perf_multifpga_vc707.apm Locally Modified          248 

Directory config/pm/leap/demos/hello
 hello_hybrid_dual_exe.apm Locally Modified          248 
 hello_hybrid_dual_acp.apm Locally Modified          248 
 hello_hybrid_dual_vc707.apm Locally Modified          248 

Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_ml605.apm Locally Modified          248 
 test_multifpga_throughput_vexe.apm Locally Modified          248 
 test_multifpga_perf_xupv5.apm Locally Modified          248 
 test_multifpga_loop.apm   Locally Modified          248 
 test_multifpga_chains_dual_hub_exe.apm Locally Modified          248 
 test_multifpga_throughput_exe.apm Locally Modified          248 
 test_multifpga_chains_xupv5.apm Locally Modified          248 
 test_multifpga_compress_acp.apm Locally Modified          248 
 traffic_light_acp_synth_multifpga.apm Locally Modified          248 
 test_multifpga_perf_ml605.apm Locally Modified          248 
 test_multifpga_alternative_exe.apm Locally Modified          248 
 test_multifpga_perf_acp_single.apm Locally Modified          248 
 test_multifpga.apm        Locally Modified          248 

Directory config/pm/leap/demos/multifpga/li
 li_test_dual_sim_vc707_hub.apm Locally Modified          248 
 li_test_dual_sim_vc707.apm Locally Modified          248 
 hasim_test_sim.apm        Locally Modified          248 
 hasim_test_dual_sim_hub.apm Locally Modified          248 
 li_test_sim.apm           Locally Modified          248 
 li_test_dual_sim_hub.apm  Locally Modified          248 
 rrr_test_li_vc707.apm     Locally Modified          248 
 li_test_dual_sim.apm      Locally Modified          248 
 test_multifpga_throughput_dual_sim_vc707_hub.apm Locally Modified          248 
 traffic_light_acp_synth_multifpga.apm Locally Modified          248 
 hasim_test_vc707.apm      Locally Modified          248 
 rrr_test_li.apm           Locally Modified          248 
 traffic_light_li.apm      Locally Modified          248 
 test_multifpga_throughput_hwsw_exe.apm Locally Modified          248 
 li_test_vc707.apm         Locally Modified          248 
 test_multifpga_throughput_dual_sim_hub.apm Locally Modified          248 
 li_test_dual_vc707.apm    Locally Modified          248 
 hasim_test_dual_sim_vc707_hub.apm Locally Modified          248 

Directory config/pm/leap/demos/multifpga
 test_multifpga_exe.apm    Locally Modified          248 
 test_multifpga_scratch.apm Locally Modified          248 
 test_multifpga_chains_ml605.apm Locally Modified          248 
 test_multifpga_spiral_exe.apm Locally Modified          248 
 test_multifpga_loop_acp.apm Locally Modified          248 
 test_multifpga_throughput_acp.apm Locally Modified          248 
 test_multifpga_throughput_vc707.apm Locally Modified          248 
 test_multifpga_throughput_dual_hub_ml605.apm Locally Modified          248 
 test_multifpga_chains_quad_hub_ml605.apm Locally Modified          248 
 test_multifpga_chains_exe.apm Locally Modified          248 
 test_multifpga_rrr_exe.apm Locally Modified          248 
 test_multifpga_throughput_tri_hub_ml605.apm Locally Modified          248 
 test_multifpga_scratch_acp.apm Locally Modified          248 
 test_multifpga_chains_xupv5_sma.apm Locally Modified          248 
 test_multifpga_chains_quad_hub_exe.apm Locally Modified          248 
 test_multifpga_perf_acp.apm Locally Modified          248 
 test_multifpga_throughput_xupv5.apm Locally Modified          248 
 test_multifpga_throughput_aurora_exe.apm Locally Modified          248 
 test_multifpga_chains_xupv5_sata.apm Locally Modified          248 
 test_multifpga_rrr_acp.apm Locally Modified          248 
 test_multifpga_chains_acp.apm Locally Modified          248 
 test_multifpga_chains_dual_hub_ml605.apm Locally Modified          248 
 test_multifpga_compress.apm Locally Modified          248 

Directory config/pm/airblue/library_tests
 softphy_SOVA_acp.apm      Locally Modified          248 

Directory config/pm/h264
 softphy_SOVA_acp.apm      Locally Modified          248 
 h264_multifpga_decoder_split_synth.apm Locally Modified          248 
 h264_multifpga_decoder_split_synth_exe.apm Locally Modified          248 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_mesh_sharedLLC_MESI_exe_0064_multifpga.apm Locally Modified          248 
 alpha_inorder_multifpga_vc707.apm Locally Modified          248 
 alpha_inorder_multifpga_time_func_exe.apm Locally Modified          248 
 alpha_inorder_multifpga_time_func_acp_sram.apm Locally Modified          248 
 alpha_inorder_multifpga_time_func_xupv5.apm Locally Modified          248 
 alpha_inorder_multifpga_time_func_dist_cache_exe.apm Locally Modified          248 
 alpha_inorder_multifpga_exe.apm Locally Modified          248 
 alpha_inorder_multifpga_time_func_16_acp_sram.apm Locally Modified          248 
 alpha_inorder_mesh_sharedLLC_MESI_acp_0064_multifpga.apm Locally Modified          248 
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0064_multifpga.apm Locally Modified          248 
 alpha_inorder_multifpga_aurora_exe.apm Locally Modified          248 
 alpha_inorder_multifpga_time_func_acp.apm Locally Modified          248 
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0256_multifpga.apm Locally Modified          248 
 alpha_inorder_multifpga_time_func_acp_sram_2.apm Locally Modified          248 
 alpha_inorder_multifpga_acp.apm Locally Modified          248 
 alpha_inorder_multifpga_ml605.apm Locally Modified          248 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 multi-fpga-connect.awb    Locally Modified          248 
 multiFPGAConnect.py       Locally Modified          248 
 construct-backend-builds/ Locally Added               0 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/construct-backend-builds
 construct-backend-builds.awb Locally Added               0 
 constructBackendBuilds.py Locally Added               0 


Added scaffolding for constructing backend build flows as a by-product
of LIM compilation.  This enables LIM backend flows to largely operate
on object codes (as opposed to needing to recompile original source.)


----------
keflemin    Date: Tue May 13 08:18:31 EDT 2014  CSN: CSN-multifpga-250
                  Tue May 13 12:18:31 UTC 2014


Directory config/pm/leap/tests/aurora_driver
 fpgaenv-aurora-debug.apm  Locally Modified          249 

Directory config/pm/leap/demos/multifpga
 test_throughput_exe.apm   Locally Added               0 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-airblue-fpgaN.apm Locally Modified          249 
 multifpgaenv-hybrid-exe-airblue-fpga0.apm Locally Modified          249 
 fpgaenv-hybrid-ml605-pcie-aurora.apm Locally Modified          249 
 multifpgaenv-hybrid-exe-airblue-fpga1.apm Locally Modified          249 

Directory config/pm/leap/submodels/fpgaenv/hwsw
 multifpgaenv-hybrid-pcie-cpu0.apm Locally Modified          249 
 multifpgaenv-hybrid-exe-cpu0.apm Locally Modified          249 
 multifpgaenv-hwsw-exe-fpga0-aurora.apm Locally Modified          249 
 multifpgaenv-hwsw-exe-fpga0.apm Locally Modified          249 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-vexe-fpgaN.apm Locally Modified          249 
 fpgaenv-hybrid-vc707-pcie-aurora.apm Locally Modified          249 
 multifpgaenv-hybrid-vexe-fpga0.apm Locally Modified          249 
 multifpgaenv-hybrid-exe-fpga0-aurora.apm Locally Modified          249 
 multifpgaenv-hybrid-exe-fpga0-quad.apm Locally Modified          249 
 multifpgaenv-hybrid-dual-pcie-cpu0.apm Locally Modified          249 
 multifpgaenv-hybrid-exe-fpga0.apm Locally Modified          249 
 multifpgaenv-hybrid-exe-fpga1.apm Locally Modified          249 
 multifpgaenv-hybrid-exe-fpga0-dist-cache.apm Locally Modified          249 

Directory config/pm/leap/submodels/fpgaenv/inter-fpga-test
 inter-fpga-test-hybrid-exe-fpga1.apm Locally Modified          249 
 inter-fpga-test-hybrid-exe-fpga0.apm Locally Modified          249 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga1-dist-cache.apm Locally Modified          249 
 multifpgaenv-hybrid-exe-airblue-fpgaN-aurora.apm Locally Modified          249 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_exe.apm Locally Modified          249 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-vc707-fpga0.apm Locally Modified          249 
 multifpgaenv-hybrid-vc707-fpga1.apm Locally Modified          249 
 multifpgaenv-hybrid-xupv5-fpga1-sata.apm Locally Modified          249 
 multifpgaenv-hybrid-xupv5-fpga0.apm Locally Modified          249 
 multifpgaenv-hybrid-xupv5-fpga1.apm Locally Modified          249 
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          249 

Directory config/pm/multifpga/fpga_submodels/hwsw
 multifpgaenv-hwsw-vc707-fpga0.apm Locally Modified          249 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          249 
 multifpgaenv-hybrid-xupv5-fpga0-sata.apm Locally Modified          249 

Directory config/pm/multifpga/inter_fpga_test/submodels
 fpgaenv-hybrid-xup-v5-pcie-sma.apm Locally Modified          249 
 fpgaenv-hybrid-xup-v5-pcie-sata.apm Locally Modified          249 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          249 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 multiFPGAConnect.py       Locally Modified          249 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/construct-backend-builds
 constructBackendBuilds.py Locally Modified          249 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/map
 placeModules.py           Locally Modified          249 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 generate_logfile.py       Locally Modified          249 

Directory modules/leap/build-support/build-pipelines/stages/null_software
 null_software.awb         Locally Modified          249 

Directory modules/leap/build-support/build-pipelines/pipelines/multifpga
 multiFPGAPipeline.py      Locally Modified          249 

Directory modules/leap/build-support/project
 platform-multifpga.awb    Locally Modified          249 
 project-multifpga.awb     Locally Modified          249 

Directory modules/leap/build-support/pipelines/multifpga_platform_verilog
 VerilogSimulationPipelineMultiFPGA.py Locally Modified          249 

Directory modules/leap/build-support/pipelines/multifpga_platform_sim
 SimulationPipelineMultiFPGA.py Locally Modified          249 

Directory modules/leap/build-support/pipelines/multifpga_platform
 FPGAPlatformPipeline.py   Locally Modified          249 


Major reorganization of LIM compilation flow. LIM compiler now passes
objects obtained from the first pass compilation through to the second
pass.  The second pass does not directly observe user code.

The major exception to object code passing (and the headache in
implementing it) is that front and backend must share context.
Previously, context needed to be shared, but only the backend builds,
and only some of the context.  Strings, for example were correctly
generated.  Since we now compile user code only once, this user
context must be propagated to the second pass. Particularly angering
was that rrr generates IDs based on the ordering of its command line
(as opposed to something more reproducible like lexical ordering.)


----------
keflemin    Date: Tue May 13 17:22:15 EDT 2014  CSN: CSN-multifpga-251
                  Tue May 13 21:22:15 UTC 2014


Directory config/pm/leap/demos/multifpga/li
 hasim_test_sim.apm        Locally Modified          250 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          250 


C++ targets do not use the new object code build, so they still need
code to be copied through.

----------
keflemin    Date: Wed May 14 16:04:40 EDT 2014  CSN: CSN-multifpga-252
                  Wed May 14 20:04:40 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/generate-code
 generateCode.py           Locally Modified          251 


computePlatform has been removed as a member of LI_CHAIN_INFO. Remove
it here also.

----------
keflemin    Date: Wed May 14 16:33:48 EDT 2014  CSN: CSN-multifpga-253
                  Wed May 14 20:33:48 UTC 2014


Directory config/pm/leap/demos/multifpga/li
 hasim_test_vc707.apm      Locally Modified          252 

Directory config/pm/leap/submodels/fpgaenv/hwsw
 multifpgaenv-hybrid-pcie-cpu0.apm Locally Modified          252 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-dual-pcie-cpu0.apm Locally Modified          252 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_multifpga_vc707.apm Locally Modified          252 
 alpha_inorder_multifpga_exe.apm Locally Modified          252 

Directory config/pm/multifpga/fpga_submodels
 acp1-sram.apm             Locally Modified          252 

Directory modules/leap/build-support/build-pipelines/stages/parsers/environment
 environment.py            Locally Modified          252 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect
 activity.py               Locally Modified          252 
 multiFPGAConnect.py       Locally Modified          252 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/map
 placeModules.py           Locally Modified          252 
 place-modules-multifpga.awb Locally Modified          252 

Directory modules/bluespec/common/fpgaenv/physical-platform/pcie/dualPCIE
 dual-pcie-physical-platform.h Locally Modified          252 

Directory modules/multifpga/alpha_inorder
 sim-mapping.resources     Locally Added               0 
 sim-mapping.map           Locally Modified          252 
 sim_mapping.awb           Locally Modified          252 
 sim-mapping.stats         Locally Added               0 


Partial support for automatic mapping of LI modules onto FPGAs. ILP
placer now optionally uses a resource report to frame constraints for
module placement.  The new placement is incorporated into the backend
build flow automatically.

Eventually, the .resources file will be subsumed by an area estimation
structure from the frontend.  It will be interesting to condsider how
an unbounded problem like mapping to simulator can be counched in ILP.



----------
keflemin    Date: Thu May 15 21:44:29 EDT 2014  CSN: CSN-multifpga-254
                  Fri May 16 01:44:29 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          253 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 generate_logfile.py       Locally Modified          253 

Directory modules/leap/build-support/project
 platform-multifpga.awb    Locally Modified          253 


Removed map/environment file propagation to subordinate builds.  The
new LIM flow has subsumed this information.

----------
keflemin    Date: Wed May 28 10:22:45 EDT 2014  CSN: CSN-multifpga-255
                  Wed May 28 14:22:45 UTC 2014


Directory config/pm/leap/submodels/platform-services
 multifpga-platform-services-master.apm Locally Modified          254 
 multifpga-platform-services-master-li.apm Locally Modified          254 

Directory config/pm/leap/submodels/fpgaenv/hwsw
 multifpgaenv-hybrid-exe-cpu0.apm Locally Modified          254 
 multifpgaenv-hwsw-exe-fpga0-aurora.apm Locally Modified          254 

Directory config/pm/leap/submodels/fpgaenv
 multifpgaenv-hybrid-exe-fpga0-aurora.apm Locally Modified          254 
 multifpgaenv-hybrid-exe-airblue-fpgaN-aurora.apm Locally Modified          254 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-vc707-fpga0.apm Locally Modified          254 
 multifpgaenv-hybrid-vc707-fpga1.apm Locally Modified          254 
 multifpgaenv-hybrid-ml605-fpga0.apm Locally Modified          254 

Directory config/pm/multifpga/fpga_submodels/hwsw
 fpga0-hwsw.apm            Locally Modified          254 

Directory config/pm/multifpga/fpga_submodels
 multifpgaenv-hybrid-ml605-fpga1.apm Locally Modified          254 
 vc707_0.apm               Locally Modified          254 
 vc707_1.apm               Locally Modified          254 

Directory modules/leap/virtual-platform/physical-channel/pcie/bluenoc
 pcie-bluenoc-physical-channel-software.awb Locally Modified          254 

Directory modules/leap/virtual-platform
 virtual-platform-li.bsv   Locally Modified          254 

Directory modules/leap/virtual-platform/low-level-platform-interface
 llpi-li.bsv               Locally Modified          254 

Directory modules/leap/virtual-platform/virtual-devices/platform-services
 platform-services-master.awb Locally Modified          254 
 platform-services-slave.bsv Locally Modified          254 
 platform-services-master.bsv Locally Modified          254 

Directory modules/leap/build-support/build-pipelines/stages/parsers/environment
 environment.py            Locally Modified          254 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_bitfile
 multiFPGAGenerateBitfile.py Locally Modified          254 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/map
 placeModules.py           Locally Modified          254 

Directory modules/leap/build-support/build-pipelines/stages/multifpga_generate_logfile
 generate_logfile.py       Locally Modified          254 

Directory modules/leap/build-support/project
 platform-multifpga.awb    Locally Modified          254 
 project-multifpga.awb     Locally Modified          254 

Directory modules/leap/build-support/pipelines/multifpga_platform_sim
 SimulationPipelineMultiFPGA.py Locally Modified          254 

Directory modules/leap-platforms/fpga-environments/vc707
 vc707-dual.env            Locally Modified          254 

Directory modules/leap-platforms/fpga-environments/sim
 sim-dual-aurora.env       Locally Modified          254 
 sim-dual.env              Locally Modified          254 
 sim-hwsw.env              Locally Modified          254 

Directory modules/multifpga/alpha_inorder
 sim-mapping-hwsw.map      Locally Modified          254 
 sim-mapping.map           Locally Modified          254 

Directory modules/multifpga/throughputTest/connected_application
 connected-application-throughput.cpp Locally Modified          254 

Directory modules/multifpga/throughputTest/singleRepeater
 mapping.map               Locally Modified          254 


Fixed a few bugs in multiple FPGA builds that resulted from last
week's platform build reorganization.

Mostly, a few apms needed new files, and the the mapping/environment
files needed to be switched to use lower case declarations. 

A few physical channel instances needed to change also.  Physical
channels are fairly close to being deprecated.  Most of them are now
just thin wrappers on the physical driver layer, existing solely to
maintain backwards compatibility.

----------
keflemin    Date: Wed May 28 14:59:09 EDT 2014  CSN: CSN-multifpga-256
                  Wed May 28 18:59:09 UTC 2014


Directory config/pm/leap/tests/mem_perf
 mem_perf_multifpga_exe.apm Locally Modified          255 
 mem_perf_multifpga_single_mem_acp.apm Locally Modified          255 
 mem_perf_multifpga_acp.apm Locally Modified          255 
 mem_perf_multifpga_alt_acp.apm Locally Modified          255 
 mem_perf_multifpga_ml605.apm Locally Modified          255 
 mem_perf_multifpga_vc707.apm Locally Modified          255 

Directory config/pm/leap/demos/hello
 hello_hybrid_dual_exe.apm Locally Modified          255 
 hello_hybrid_dual_acp.apm Locally Modified          255 
 hello_hybrid_dual_vc707.apm Locally Modified          255 

Directory config/pm/leap/demos/multifpga
 test_multifpga_throughput_ml605.apm Locally Modified          255 
 test_multifpga_throughput_vexe.apm Locally Modified          255 
 test_multifpga_perf_xupv5.apm Locally Modified          255 
 test_multifpga_loop.apm   Locally Modified          255 
 test_multifpga_chains_dual_hub_exe.apm Locally Modified          255 
 test_multifpga_throughput_exe.apm Locally Modified          255 
 test_multifpga_chains_xupv5.apm Locally Modified          255 
 test_multifpga_compress_acp.apm Locally Modified          255 
 traffic_light_acp_synth_multifpga.apm Locally Modified          255 
 test_multifpga_perf_ml605.apm Locally Modified          255 
 test_multifpga_alternative_exe.apm Locally Modified          255 
 test_multifpga_perf_acp_single.apm Locally Modified          255 
 test_multifpga.apm        Locally Modified          255 

Directory config/pm/leap/demos/multifpga/li
 li_test_dual_sim_vc707_hub.apm Locally Modified          255 
 li_test_dual_sim_vc707.apm Locally Modified          255 
 hasim_test_sim.apm        Locally Modified          255 
 li_test_sim.apm           Locally Modified          255 
 hasim_test_dual_sim_hub.apm Locally Modified          255 
 rrr_test_li_vc707.apm     Locally Modified          255 
 li_test_dual_sim_hub.apm  Locally Modified          255 
 li_test_dual_sim.apm      Locally Modified          255 
 test_multifpga_throughput_dual_sim_vc707_hub.apm Locally Modified          255 
 traffic_light_acp_synth_multifpga.apm Locally Modified          255 
 hasim_test_vc707.apm      Locally Modified          255 
 rrr_test_li.apm           Locally Modified          255 
 li_test_vc707.apm         Locally Modified          255 
 test_multifpga_throughput_hwsw_exe.apm Locally Modified          255 
 traffic_light_li.apm      Locally Modified          255 
 test_multifpga_throughput_dual_sim_hub.apm Locally Modified          255 
 li_test_dual_vc707.apm    Locally Modified          255 
 hasim_test_dual_sim_vc707_hub.apm Locally Modified          255 

Directory config/pm/leap/demos/multifpga
 test_multifpga_exe.apm    Locally Modified          255 
 test_multifpga_scratch.apm Locally Modified          255 
 test_multifpga_chains_ml605.apm Locally Modified          255 
 test_multifpga_spiral_exe.apm Locally Modified          255 
 test_multifpga_loop_acp.apm Locally Modified          255 
 test_multifpga_throughput_acp.apm Locally Modified          255 
 test_multifpga_throughput_vc707.apm Locally Modified          255 
 test_multifpga_throughput_dual_hub_ml605.apm Locally Modified          255 
 test_multifpga_chains_quad_hub_ml605.apm Locally Modified          255 
 test_multifpga_chains_exe.apm Locally Modified          255 
 test_multifpga_rrr_exe.apm Locally Modified          255 
 test_multifpga_throughput_tri_hub_ml605.apm Locally Modified          255 
 test_multifpga_scratch_acp.apm Locally Modified          255 
 test_multifpga_chains_xupv5_sma.apm Locally Modified          255 
 test_multifpga_chains_quad_hub_exe.apm Locally Modified          255 
 test_multifpga_perf_acp.apm Locally Modified          255 
 test_multifpga_throughput_xupv5.apm Locally Modified          255 
 test_multifpga_throughput_aurora_exe.apm Locally Modified          255 
 test_multifpga_chains_xupv5_sata.apm Locally Modified          255 
 test_multifpga_rrr_acp.apm Locally Modified          255 
 test_multifpga_chains_acp.apm Locally Modified          255 
 test_multifpga_chains_dual_hub_ml605.apm Locally Modified          255 
 test_multifpga_compress.apm Locally Modified          255 

Directory config/pm/leap/submodels/pipelines
 build-pipeline-lim.apm    Locally Added               0 

Directory config/pm/airblue/library_tests
 softphy_SOVA_acp.apm      Locally Modified          255 

Directory config/pm/h264
 softphy_SOVA_acp.apm      Locally Modified          255 
 h264_multifpga_decoder_split_synth.apm Locally Modified          255 
 h264_multifpga_decoder_split_synth_exe.apm Locally Modified          255 

Directory config/pm/hasim-alpha/multifpga
 alpha_inorder_mesh_sharedLLC_MESI_exe_0064_multifpga.apm Locally Modified          255 
 alpha_inorder_multifpga_vc707.apm Locally Modified          255 
 alpha_inorder_multifpga_time_func_exe.apm Locally Modified          255 
 alpha_inorder_multifpga_time_func_acp_sram.apm Locally Modified          255 
 alpha_inorder_multifpga_time_func_dist_cache_exe.apm Locally Modified          255 
 alpha_inorder_multifpga_time_func_xupv5.apm Locally Modified          255 
 alpha_inorder_multifpga_exe.apm Locally Modified          255 
 alpha_inorder_multifpga_time_func_16_acp_sram.apm Locally Modified          255 
 alpha_inorder_mesh_sharedLLC_MESI_acp_0064_multifpga.apm Locally Modified          255 
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0064_multifpga.apm Locally Modified          255 
 alpha_inorder_multifpga_aurora_exe.apm Locally Modified          255 
 alpha_inorder_mesh_sharedLLC_MESI_vc707_0256_multifpga.apm Locally Modified          255 
 alpha_inorder_multifpga_time_func_acp.apm Locally Modified          255 
 alpha_inorder_multifpga_time_func_acp_sram_2.apm Locally Modified          255 
 alpha_inorder_multifpga_acp.apm Locally Modified          255 
 alpha_inorder_multifpga_ml605.apm Locally Modified          255 

Directory modules/leap/build-support/build-pipelines/stages
 lim_connect/              Locally Added               - 

Directory modules/leap/build-support/build-pipelines/stages/lim_connect
 lim-connect.awb           Locally Added               - 
 LIMConnect.py             Locally Added               - 
 multi-fpga-connect.awb    Locally Removed           255 
 multiFPGAConnect.py       Locally Removed           255 

Directory modules/leap/build-support/build-pipelines/stages/lim_connect/map
 lim-place-modules.awb     Locally Added               - 
 place-modules-multifpga.awb Locally Removed           255 

Directory modules/leap/build-support/build-pipelines/stages
 generate_lim_graph/       Locally Added               - 

Directory modules/leap/build-support/build-pipelines/stages/generate_lim_graph
 generate-lim-graph.awb    Locally Added               - 
 generateLIMGraph.py       Locally Added               - 

Directory modules/leap/build-support/build-pipelines/stages
 generate_lim_executable/  Locally Added               - 

Directory modules/leap/build-support/build-pipelines/stages/generate_lim_executable
 generate-lim-executable.awb Locally Added               - 
 multifpga-generate-bitfile.awb Locally Removed           255 
 generateLIMExecutable.py  Locally Added               - 
 multiFPGAGenerateBitfile.py Locally Removed           255 

Directory modules/leap/build-support/build-pipelines/pipelines/multifpga
 multifpga-build-pipeline.awb Locally Modified          255 
 multiFPGAPipeline.py      Locally Removed           255 
 LIMPipeline.py            Locally Added               - 


1) Added submodel for LIM compiler build pipeline

2) Reorganized and renamed portions of the build pipeline to reflect
generality of LIM compiler.

----------
keflemin    Date: Mon Jun  2 10:53:39 EDT 2014  CSN: CSN-multifpga-257
                  Mon Jun  2 14:53:39 UTC 2014


Directory modules/leap/build-support/build-pipelines/stages/multifpga_connect/map
 placeModules.py           Locally Modified          256 

Directory modules/leap/build-support/pipelines/multifpga_platform
 FPGAPlatformPipeline.py   Locally Modified          256 

Directory modules/multifpga/alpha_inorder
 sim_mapping.awb           Locally Modified          256 


Automated resource extraction from first-pass lim builds.

The first pass LIM build will now dump .resources files per LI module.
These files will be picked up during LIM compilation and used in
module placement.

----------
keflemin    Date: Wed Jun  4 13:50:22 EDT 2014  CSN: CSN-multifpga-258
                  Wed Jun  4 17:50:22 UTC 2014


Directory modules/leap/virtual-platform
 virtual-platform-li.bsv   Locally Modified          257 


Mirrored platform services rotation in LIM code.