Desired function
Solve instruction selection, register allocation, and scheduling in one integrated NP-hard model, with tunable optimization budgets. github
Futamura role
Provides the low-level back-end used by the compiler (c) to map residual programs or interpreter specializations to machine code.
Inputs
- Low-level IR from partial evaluator or front-end.
- Target machine model (instructions, register classes, pipeline resources, ABI).
- Optional profile data and throughput predictions
- edge frequencies, block hotness, branch statistics
- uiCA/Facile semanticscholar
- Optimization weights (runtime vs. size vs. compile time vs. power).
Processing
- Build unified constraint model:
- Instruction selection alternatives, register constraints, scheduling constraints, ABI constraints.
- Seed with heuristic solution (pattern matching + linear scan + list scheduling).
- Run combinatorial search (ILP/CP-SAT/branch-and-bound), using implied constraints and dominance rules as in Unison presolver. past.date-conference
- Evaluate candidates via the tunable optimization objective engine (2.4).
Outputs
- Machine code per function/trace.
- Mapping IR → instructions/registers/schedule.
- Metadata: live ranges, spills, estimated cost.
Key references
- Unison, implied constraints for the presolver. diva-portal
Desired function
Solve instruction selection, register allocation, and scheduling in one integrated NP-hard model, with tunable optimization budgets. github
Futamura role
Provides the low-level back-end used by the compiler (c) to map residual programs or interpreter specializations to machine code.
Inputs
Processing
Outputs
Key references