diff --git a/.github/workflows/ci-interpreter.yml b/.github/workflows/ci-interpreter.yml index f7690320ce..d57bc20345 100644 --- a/.github/workflows/ci-interpreter.yml +++ b/.github/workflows/ci-interpreter.yml @@ -22,6 +22,8 @@ jobs: uses: ocaml/setup-ocaml@v3 with: ocaml-compiler: 5.04.x + - name: Setup OCaml tools + run: opam install --yes stdint.0.7.2 - name: Build interpreter run: cd interpreter && opam exec make jsdeps wasm # Neither V8 nor SpiderMonkey can currently handle all 3.0 tests, so we disable checking JS translation for now. diff --git a/.github/workflows/ci-spec.yml b/.github/workflows/ci-spec.yml index 53a50ef56c..6a1b77ca37 100644 --- a/.github/workflows/ci-spec.yml +++ b/.github/workflows/ci-spec.yml @@ -34,7 +34,7 @@ jobs: with: ocaml-compiler: 5.04.x - name: Setup Dune - run: opam install --yes dune menhir mdx zarith && opam exec dune --version + run: opam install --yes dune menhir mdx zarith stdint.0.7.2 && opam exec dune --version - name: Setup Node.js uses: actions/setup-node@v4 with: diff --git a/.github/workflows/ci-spectec.yml b/.github/workflows/ci-spectec.yml index e01f2bf2d8..dc0a9530bc 100644 --- a/.github/workflows/ci-spectec.yml +++ b/.github/workflows/ci-spectec.yml @@ -23,7 +23,7 @@ jobs: with: ocaml-compiler: 5.04.x - name: Setup Dune - run: opam install --yes dune menhir mdx zarith + run: opam install --yes dune menhir mdx zarith stdint.0.7.2 - name: Setup Latex run: sudo apt-get update -y && sudo apt-get install -y latexmk texlive-latex-recommended texlive-latex-extra texlive-fonts-recommended - name: Setup Sphinx diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index ec222f6414..572042a65a 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -256,6 +256,13 @@ whereas the actual opcode is encoded by a variable-length :ref:`unsigned integer $${grammar: Binstr/num-cvt-sat} +.. _binary-num-wide: + +wide-arithmetic instructions have a 1-byte prefix and the actual opcode is +encoded by a variable-length :ref:`unsigned integer `. + +$${grammar: Binstr/num-wide} + .. index:: vector instruction pair: binary format; instruction diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 373edf4576..06cff1c012 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -941,6 +941,20 @@ $${rule-prose: Step_pure/cvtop} $${rule: {Step_pure/cvtop-*}} +.. _exec-wideop: + +$${rule-prose: Step_pure/wideop} + +$${rule: {Step_pure/wideop}} + + +.. _exec-extwideop: + +$${rule-prose: Step_pure/extwideop} + +$${rule: {Step_pure/extwideop}} + + .. index:: vector instruction pair: execution; instruction single: abstract syntax; instruction diff --git a/document/core/exec/numerics.rst b/document/core/exec/numerics.rst index 2af212963c..623a4f9317 100644 --- a/document/core/exec/numerics.rst +++ b/document/core/exec/numerics.rst @@ -934,6 +934,37 @@ The integer result of predicates -- i.e., :ref:`tests ` and :ref: \iq15mulrsats_N(i_1, i_2) &=& \signed_N^{-1}(\sats_N(\ishrs_N(i_1 \cdot i_2 + 2^{14}, 15))) \end{array} +.. _op-iconcat: + +:math:`\iconcat_{M,N}(i_1, i_2)` +................................. + +* Let :math:`h` be the result of :math:`\ishl_N(\extend^u_{M,N}(i_2), M)` + +* Return the result of :math:`\ior_N(\extend^u_{M,N}(i_1), h)` + +.. math:: + \begin{array}{lll@{\qquad}l} + \iconcat_{M,N}(i_1, i_2) &=& \ior_N(\extend^u_{M,N}(i_1), \ishl_N(\extend^u_{M,N}(i_2), M)) + \end{array} + + +.. _op-isplit: + +:math:`\isplit_{M,N}(i)` +................................. + +* Let :math:`l` be the result of :math:`\wrap_{M,N}(i)` + +* Let :math:`h` be the result of :math:`\wrap_{M,N}(\ishru_M(i, N))` + +* Return :math:`l, h` + +.. math:: + \begin{array}{lll@{\qquad}l} + \isplit_{M,N}(i) &=& \wrap_{M,N}(i), \wrap_{M,N}(\ishru_M(i, N)) + \end{array} + .. index:: floating-point, IEEE 754 .. _float-ops: diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 19840c61c5..86b5028b09 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -330,6 +330,8 @@ The instructions ${:ANY.CONVERT_EXTERN} and ${:EXTERN.CONVERT_ANY} allow lossles .. _syntax-relop: .. _syntax-cvtop: .. _syntax-instr-numeric: +.. _syntax-wideop: +.. _syntax-extwideop: Numeric Instructions ~~~~~~~~~~~~~~~~~~~~ @@ -337,7 +339,7 @@ Numeric Instructions Numeric instructions provide basic operations over numeric :ref:`values ` of specific :ref:`type `. These operations closely match respective operations available in hardware. -$${syntax: {sz sx} num_ instr/num unop_ binop_ testop_ relop_ cvtop__} +$${syntax: {sz sx} num_ instr/num unop_ binop_ testop_ relop_ cvtop__ wideop_ extwideop_} Numeric instructions are divided by :ref:`number type `. For each type, several subcategories can be distinguished: diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 36338aa3b2..63b9b3fbf7 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -297,6 +297,12 @@ $${grammar: { Tplaininstr_/num-cvt-reinterpret }} +.. _text-wideop: + +$${grammar: { + Tplaininstr_/num-wide +}} + .. index:: vector instruction pair: text format; instruction diff --git a/document/core/util/macros.def b/document/core/util/macros.def index cd9472676e..60aab3d33b 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -616,6 +616,10 @@ .. |DEMOTE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{demote}} .. |REINTERPRET| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{reinterpret}} +.. |ADD128| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{add128}} +.. |SUB128| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{sub128}} +.. |MULWIDE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{mul\_wide}} + .. |VCONST| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{const}} .. |VSHUFFLE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{shuffle}} .. |VSWIZZLE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{swizzle}} @@ -694,6 +698,8 @@ .. |testop| mathdef:: \xref{syntax/instructions}{syntax-testop}{\X{testop}} .. |relop| mathdef:: \xref{syntax/instructions}{syntax-relop}{\X{relop}} .. |cvtop| mathdef:: \xref{syntax/instructions}{syntax-cvtop}{\X{cvtop}} +.. |wideop| mathdef:: \xref{syntax/instructions}{syntax-wideop}{\X{wideop}} +.. |extwideop| mathdef:: \xref{syntax/instructions}{syntax-extwideop}{\X{extwideop}} .. |unopF| mathdef:: \xref{exec/instructions}{exec-instr-numeric}{\X{unop}} .. |binopF| mathdef:: \xref{exec/instructions}{exec-instr-numeric}{\X{binop}} @@ -1637,6 +1643,8 @@ .. |iavgru| mathdef:: \xref{exec/numerics}{op-iavgr}{\F{iavgr\_u}} .. |iq15mulrsat| mathdef:: \xref{exec/numerics}{op-iq15mulrsat}{\F{iq15mulrsat}} .. |iq15mulrsats| mathdef:: \xref{exec/numerics}{op-iq15mulrsat}{\F{iq15mulrsat\_s}} +.. |isplit| mathdef:: \xref{exec/numerics}{op-isplit}{\F{isplit}} +.. |iconcat| mathdef:: \xref{exec/numerics}{op-iconcat}{\F{iconcat}} .. |fadd| mathdef:: \xref{exec/numerics}{op-fadd}{\F{fadd}} .. |fsub| mathdef:: \xref{exec/numerics}{op-fsub}{\F{fsub}} diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index 52eff5b381..2fbfc0db1d 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -1111,6 +1111,26 @@ $${rule-prose: Instr_ok/cvtop} $${rule: Instr_ok/cvtop} +.. _valid-wideop: + +:math:`t_1\K{.}\wideop` +.......................................... + +$${rule-prose: Instr_ok/wideop} + +$${rule: Instr_ok/wideop} + + +.. _valid-extwideop: + +:math:`t_1\K{.}\extwideop` +.......................................... + +$${rule-prose: Instr_ok/extwideop} + +$${rule: Instr_ok/extwideop} + + .. index:: vector instruction pair: validation; instruction single: abstract syntax; instruction diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index f817ff2606..46368be586 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -677,6 +677,10 @@ let rec instr s = | 0x0fl -> let x = at idx s in table_grow x | 0x10l -> let x = at idx s in table_size x | 0x11l -> let x = at idx s in table_fill x + | 0x13l -> i64_add128 + | 0x14l -> i64_sub128 + | 0x15l -> i64_mul_wide_s + | 0x16l -> i64_mul_wide_u | n -> illegal2 s pos b n ) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 884592772c..58d956e724 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -902,6 +902,17 @@ struct | VecReplace (V128 (F32x4 V128Op.(Replace i))) -> vecop 0x20l; u8 i | VecReplace (V128 (F64x2 V128Op.(Replace i))) -> vecop 0x22l; u8 i + | Wide (I64 I64Op.Add128) -> op 0xfc; u32 0x13l + | Wide (I64 I64Op.Sub128) -> op 0xfc; u32 0x14l + | Wide (I32 _) -> . + | Wide (F32 _) -> . + | Wide (F64 _) -> . + | Extwide (I64 (I64Op.MulWide S)) -> op 0xfc; u32 0x15l + | Extwide (I64 (I64Op.MulWide U)) -> op 0xfc; u32 0x16l + | Extwide (I32 _) -> . + | Extwide (F32 _) -> . + | Extwide (F64 _) -> . + and catch c = match c.it with | Catch (x1, x2) -> byte 0x00; idx x1; idx x2 diff --git a/interpreter/dune b/interpreter/dune index fc62062483..fb3bbbc66b 100644 --- a/interpreter/dune +++ b/interpreter/dune @@ -3,6 +3,7 @@ (library (public_name wasm) (modules :standard \ main wasm wast smallint) + (libraries stdint) ) (executable diff --git a/interpreter/dune-project b/interpreter/dune-project index a1fde54bda..a6f8237931 100644 --- a/interpreter/dune-project +++ b/interpreter/dune-project @@ -16,5 +16,6 @@ (depends (ocaml (>= 4.14)) (menhir (>= 20220210)) + (stdint (>= 0.7.2)) ) ) diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index ab78027fed..8af03731d1 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -1024,6 +1024,14 @@ let rec step (c : config) : config = (try Vec (Eval_vec.eval_vreplaceop replaceop v r) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | Wide op, Num rhs_hi :: Num rhs_lo :: Num lhs_hi :: Num lhs_lo :: vs' -> + let (lo, hi) = Eval_num.eval_wideop op lhs_lo lhs_hi rhs_lo rhs_hi + in Num hi :: Num lo :: vs', [] + + | Extwide op, Num rhs :: Num lhs :: vs' -> + let (lo, hi) = Eval_num.eval_extwideop op lhs rhs + in Num hi :: Num lo :: vs', [] + | _ -> let s1 = string_of_values (List.rev vs) in let s2 = string_of_resulttype (List.map type_of_value (List.rev vs)) in diff --git a/interpreter/exec/eval_num.ml b/interpreter/exec/eval_num.ml index a0e99bdd65..4cba1a97be 100644 --- a/interpreter/exec/eval_num.ml +++ b/interpreter/exec/eval_num.ml @@ -56,8 +56,35 @@ struct in fun v1 v2 -> f (of_num 1 v1) (of_num 2 v2) end -module I32Op = IntOp (I32) (I32Num) -module I64Op = IntOp (I64) (I64Num) +module I32Op = struct + include IntOp (I32) (I32Num) + + let wideop (op: Ast.I32Op.wideop) = match op with _ -> . + let extwideop (op: Ast.I32Op.extwideop) = match op with _ -> . +end +module I64Op = struct + include IntOp (I64) (I64Num) + + open Ast.IntOp + open I64Num + + let wideop op = + let f = match op with + | Ast.I64Op.Add128 -> I64.add128 + | Ast.I64Op.Sub128 -> I64.sub128 + in fun v1 v2 v3 v4 -> + let (a, b) = f (of_num 1 v1) (of_num 2 v2) (of_num 3 v3) (of_num 4 v4) + in (to_num a, to_num b) + + let extwideop op = + let f = match op with + | Ast.I64Op.MulWide S -> I64.mul_wide_s + | Ast.I64Op.MulWide U -> I64.mul_wide_u + in fun v1 v2 -> + let (a, b) = f (of_num 1 v1) (of_num 2 v2) + in (to_num a, to_num b) +end + (* Float operators *) @@ -100,6 +127,9 @@ struct | Gt -> FXX.gt | Ge -> FXX.ge in fun v1 v2 -> f (of_num 1 v1) (of_num 2 v2) + + let wideop (op: Ast.FloatOp.wideop) = match op with _ -> . + let extwideop (op: Ast.FloatOp.extwideop) = match op with _ -> . end module F32Op = FloatOp (F32) (F32Num) @@ -194,3 +224,5 @@ let eval_binop = op I32Op.binop I64Op.binop F32Op.binop F64Op.binop let eval_testop = op I32Op.testop I64Op.testop F32Op.testop F64Op.testop let eval_relop = op I32Op.relop I64Op.relop F32Op.relop F64Op.relop let eval_cvtop = op I32CvtOp.cvtop I64CvtOp.cvtop F32CvtOp.cvtop F64CvtOp.cvtop +let eval_wideop = op I32Op.wideop I64Op.wideop F32Op.wideop F64Op.wideop +let eval_extwideop = op I32Op.extwideop I64Op.extwideop F32Op.extwideop F64Op.extwideop diff --git a/interpreter/exec/eval_num.mli b/interpreter/exec/eval_num.mli index e5c53f11e1..66800b42b9 100644 --- a/interpreter/exec/eval_num.mli +++ b/interpreter/exec/eval_num.mli @@ -5,3 +5,5 @@ val eval_binop : Ast.binop -> num -> num -> num val eval_testop : Ast.testop -> num -> bool val eval_relop : Ast.relop -> num -> num -> bool val eval_cvtop : Ast.cvtop -> num -> num +val eval_wideop : Ast.wideop -> num -> num -> num -> num -> num * num +val eval_extwideop : Ast.extwideop -> num -> num -> num * num diff --git a/interpreter/exec/i64.ml b/interpreter/exec/i64.ml index f4b0cdcbf8..965e7605ac 100644 --- a/interpreter/exec/i64.ml +++ b/interpreter/exec/i64.ml @@ -8,3 +8,25 @@ include Ixx.Make let to_int64 = Fun.id let to_hex_string = Printf.sprintf "%Lx" end) + +open Stdint + +let to_i128 lo hi = + let lo = Int128.of_uint64 (Uint64.of_int64 lo) in + let hi = Int128.of_uint64 (Uint64.of_int64 hi) in + Int128.logor lo (Int128.shift_left hi 64) + +let split_i128 v = + let lo = Int64.of_int128 v in + let hi = Int64.of_int128 (Int128.shift_right v 64) in + (lo, hi) + +let add128 a b c d = split_i128 (Int128.add (to_i128 a b) (to_i128 c d)) +let sub128 a b c d = split_i128 (Int128.sub (to_i128 a b) (to_i128 c d)) + +let mul_wide_s a b = split_i128 (Int128.mul (Int128.of_int64 a) (Int128.of_int64 b)) +let mul_wide_u a b = + let a = Uint64.of_int64 a in + let b = Uint64.of_int64 b in + let c = Uint128.mul (Uint128.of_uint64 a) (Uint128.of_uint64 b) in + split_i128 (Int128.of_uint128 c) diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 6686c41dce..adbb4b8c73 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -52,10 +52,20 @@ struct type cvtop = ConvertI32 of sx | ConvertI64 of sx | PromoteF32 | DemoteF64 | ReinterpretInt + type wideop = | + type extwideop = | end -module I32Op = IntOp -module I64Op = IntOp +module I32Op = struct + include IntOp + type wideop = | + type extwideop = | +end +module I64Op = struct + include IntOp + type wideop = Add128 | Sub128 + type extwideop = MulWide of sx +end module F32Op = FloatOp module F64Op = FloatOp @@ -114,6 +124,8 @@ type unop = (I32Op.unop, I64Op.unop, F32Op.unop, F64Op.unop) Value.op type binop = (I32Op.binop, I64Op.binop, F32Op.binop, F64Op.binop) Value.op type relop = (I32Op.relop, I64Op.relop, F32Op.relop, F64Op.relop) Value.op type cvtop = (I32Op.cvtop, I64Op.cvtop, F32Op.cvtop, F64Op.cvtop) Value.op +type wideop = (I32Op.wideop, I64Op.wideop, F32Op.wideop, F64Op.wideop) Value.op +type extwideop = (I32Op.extwideop, I64Op.extwideop, F32Op.extwideop, F64Op.extwideop) Value.op type vtestop = (V128Op.testop) Value.vecop type vrelop = (V128Op.relop) Value.vecop @@ -245,6 +257,8 @@ and instr' = | Compare of relop (* numeric comparison *) | Unary of unop (* unary numeric operator *) | Binary of binop (* binary numeric operator *) + | Wide of wideop (* binop producing wide result *) + | Extwide of extwideop (* binop producing wide result, extending args *) | Convert of cvtop (* conversion *) | VecConst of vec (* constant *) | VecTest of vtestop (* vector test *) diff --git a/interpreter/syntax/free.ml b/interpreter/syntax/free.ml index a5c9f9b3ce..b5db232eaa 100644 --- a/interpreter/syntax/free.ml +++ b/interpreter/syntax/free.ml @@ -182,6 +182,7 @@ let rec instr (e : instr) = | ArrayInitElem (x, y) -> types (idx x) ++ elems (idx y) | ExternConvert _ -> empty | Const _ | Test _ | Compare _ | Unary _ | Binary _ | Convert _ -> empty + | Wide _ | Extwide _ -> empty | VecConst _ | VecTest _ | VecUnary _ | VecBinary _ | VecTernary _ | VecCompare _ | VecConvert _ | VecShift _ | VecBitmask _ diff --git a/interpreter/syntax/mnemonics.ml b/interpreter/syntax/mnemonics.ml index aa21519586..01c0a67ade 100644 --- a/interpreter/syntax/mnemonics.ml +++ b/interpreter/syntax/mnemonics.ml @@ -585,3 +585,8 @@ let f64x2_relaxed_min = VecBinary (V128 (F64x2 V128Op.RelaxedMin)) let f64x2_relaxed_max = VecBinary (V128 (F64x2 V128Op.RelaxedMax)) let i16x8_relaxed_dot_i8x16_i7x16_s = VecBinary (V128 (I16x8 V128Op.RelaxedDot)) let i32x4_relaxed_dot_i8x16_i7x16_add_s = VecTernary (V128 (I32x4 V128Op.RelaxedDotAddS)) + +let i64_add128 = Wide (I64 I64Op.Add128) +let i64_sub128 = Wide (I64 I64Op.Sub128) +let i64_mul_wide_s = Extwide (I64 (I64Op.MulWide S)) +let i64_mul_wide_u = Extwide (I64 (I64Op.MulWide U)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 54d5c71fdc..cb497e0480 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -193,6 +193,26 @@ struct | ReinterpretFloat -> "reinterpret_f" ^ xx end +module I32Op = struct + include IntOp + + open Ast.I32Op + + let wideop xx = function (_ : wideop) -> . + let extwideop xx = function (_ : extwideop) -> . +end + +module I64Op = struct + include IntOp + + let wideop xx = function + | Ast.I64Op.Add128 -> "add128" + | Ast.I64Op.Sub128 -> "sub128" + let extwideop xx = function + | Ast.I64Op.MulWide S -> "mul_wide_s" + | Ast.I64Op.MulWide U -> "mul_wide_u" +end + module FloatOp = struct open Ast.FloatOp @@ -231,6 +251,9 @@ struct | PromoteF32 -> "promote_f32" | DemoteF64 -> "demote_f64" | ReinterpretInt -> "reinterpret_i" ^ xx + + let wideop xx = function (_ : wideop) -> . + let extwideop xx = function (_ : extwideop) -> . end module V128Op = @@ -401,6 +424,15 @@ let oper (iop, fop) op = | F64 o -> fop "64" o ) +let i64oper (i32op, i64op, fop) op = + string_of_numtype (type_of_num op) ^ "." ^ + (match op with + | I32 o -> i32op "32" o + | I64 o -> i64op "64" o + | F32 o -> fop "32" o + | F64 o -> fop "64" o + ) + let voper (vop) op = match op with | V128 o -> "v128." ^ vop o @@ -414,6 +446,8 @@ let binop = oper (IntOp.binop, FloatOp.binop) let testop = oper (IntOp.testop, FloatOp.testop) let relop = oper (IntOp.relop, FloatOp.relop) let cvtop = oper (IntOp.cvtop, FloatOp.cvtop) +let wideop = i64oper (I32Op.wideop, I64Op.wideop, FloatOp.wideop) +let extwideop = i64oper (I32Op.extwideop, I64Op.extwideop, FloatOp.extwideop) let vunop = shoper (V128Op.iunop, V128Op.iunop, V128Op.funop) let vbinop = shoper (V128Op.ibinop, V128Op.ibinop, V128Op.fbinop) @@ -591,6 +625,8 @@ let rec instr e = | VecSplat op -> vsplatop op, [] | VecExtract op -> vextractop op, [] | VecReplace op -> vreplaceop op, [] + | Wide op -> wideop op, [] + | Extwide op -> extwideop op, [] in Node (head, inner) and catch c = diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 653c93a5b3..62a2783caf 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -742,6 +742,11 @@ rule token = parse | "f32x4.replace_lane" -> VEC_REPLACE f32x4_replace_lane | "f64x2.replace_lane" -> VEC_REPLACE f64x2_replace_lane + | "i64.add128" -> BINARY i64_add128 + | "i64.sub128" -> BINARY i64_sub128 + | "i64.mul_wide_s" -> BINARY i64_mul_wide_s + | "i64.mul_wide_u" -> BINARY i64_mul_wide_u + | "i8x16.relaxed_swizzle" -> VEC_BINARY i8x16_relaxed_swizzle | "i32x4.relaxed_trunc_f32x4_u" -> VEC_UNARY i32x4_relaxed_trunc_f32x4_u | "i32x4.relaxed_trunc_f32x4_s" -> VEC_UNARY i32x4_relaxed_trunc_f32x4_s diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 819a97fbfe..bf7a73eff9 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -954,6 +954,15 @@ let rec check_instr (c : context) (e : instr) (s : infer_resulttype) : infer_ins "invalid lane index"; [t1; t2] --> [t1], [] + | Wide op -> + let t = NumT (type_num op) in + [t; t; t; t] --> [t; t], [] + + | Extwide op -> + let t = NumT (type_num op) in + [t; t] --> [t; t], [] + + and check_instrs (c : context) (s : infer_resulttype) (es : instr list) : infer_resulttype * idx list = match es with diff --git a/interpreter/wasm.opam b/interpreter/wasm.opam index 9a5057611e..7ebbe9e456 100644 --- a/interpreter/wasm.opam +++ b/interpreter/wasm.opam @@ -12,6 +12,7 @@ depends: [ "dune" {>= "2.9"} "ocaml" {>= "4.12"} "menhir" {>= "20220210"} + "stdint" {>= "0.7.2"} "odoc" {with-doc} ] build: [make "-C" "interpreter"] diff --git a/proposals/wide-arithmetic/Overview.md b/proposals/wide-arithmetic/Overview.md new file mode 100644 index 0000000000..13664ce5ef --- /dev/null +++ b/proposals/wide-arithmetic/Overview.md @@ -0,0 +1,786 @@ +# Wide Arithmetic + +## Motivation + +There are a number of use cases for arithmetic on larger-than-64-bit numbers in +source languages today: + +* Arbitrary precision math - many languages have a bignum-style library which is + an arbitrary precision integer. For example libgmp in C, numbers Python, + `BigInt` in JS, etc. Big integers have a range of specific applications as + well which can include being integral portions of cryptographic algorithms. + +* Fixed but wider-than-64 precision math - cryptographic algorithms often use + 128-bit or 256-bit integers for example and often need to + add/subtract/multiply/divide these operands. + +* Checking for overflow - some programs may want to check for overflow when + performing arithmetic operations, such as seeing if a 64-bit addition + overflowed. Using 128-bit arithmetic can be done to detect these sorts of + situations. + +* Niche bit tricks - some PRNGs use 128-bit integer state for efficient storage + and calculation of the next state. Using 128-bit integers has also been done + for hash table indexing as well. + +Today, however, these use cases of 128-bit integers are significantly slower in +WebAssembly then they are on native platforms. The performance gap can range +from 2-7x slower than native at this time. + +The goal of this proposal is to close this performance gap between native and +WebAssembly by adding new instructions which enable more efficient lowerings of +128-bit arithmetic operations. + +### WebAssembly today with Wide arithmetic + +[This is an example](https://godbolt.org/z/fMdjqvEaq) of what LLVM emits today +for 128-bit operations in source languages. Notably: + +* `i64_add128` - expands to three `add` instructions plus comparisons. +* `i64_sub128` - same as `i64.add`, but with `sub` instructions. +* `i64_mul128` - this notably uses the `__multi3` libcall which is significantly + slower than performing the operation inline. + +For the same code [this is what native platforms +emit](https://godbolt.org/z/65d45ff5K). Notably: + +* x86\_64 - addition/subtraction use `adc` and `sbb` to tightly couple the two + additions/subtractions together and avoid moving the flags register into a + general purpose register. Multiplication uses the native `mul` instruction + which produces a 128-bit result which is much more efficient than the + implementation of `__multi3`. +* aarch64 - addition/subtraction also use `adc` and `sbc` like x86\_64. + Multiplication uses `umulh` to generate the upper bits of a multiplication and + can efficiently use `madd` as well. This is a much more compact sequence than + `__multi3`. +* riscv64 - this architecture notably does not have overflow flags and the + generated code looks quite similar to the WebAssembly. Multiplication, + however, has access to `mulhu` which WebAssembly does not easily provide. + +For a comparison [this is the generated output of +Wasmtime](https://godbolt.org/z/46dcajxWa) for add/sub given the WebAssembly +that LLVM emits today (edited to produce a multivalue result instead of storing +it into memory). Notably: + +* x86\_64 - addition/subtraction is not pattern matching to generate `adc` or + `sbc` meaning that a compare-and-set is required. +* aarch64 - same consequences as x86\_64. +* riscv64 - the generated code mostly matches native output modulo frame pointer + setup/teardown. On riscv64 it's expected that `i64.{add,sub}128` won't + provide much of a performance benefit over today. Multiplication however will + still be faster. + +Overall the main cause for slowdowns are: + +* On x86\_64 and aarch64 WebAssembly doesn't provide access to overflow flags + done by `add` and `adds` and thus it's difficult for compilers to + pattern-match and generate `adc` and `sbc`. +* On all platforms the `__multi3` libcall is significantly slower than native + instructions because the libcall itself can't use the native instructions and + the libcall's results are required to travel through memory (according to its + ABI). + +This proposal's native instructions for 128-bit operations should solve all of +these issues. + +## Proposal + +This proposal currently adds four new instructions to WebAssembly: + +* `i64.add128` +* `i64.sub128` +* `i64.mul_wide_s` +* `i64.mul_wide_u` + +These instructions `i64.add128` and `i64.sub128` have the type +`[i64 i64 i64 i64] -> [i64 i64]` where the values are: + +* i64 argument 0 - the low 64 bits of the left-hand-side argument +* i64 argument 1 - the high 64 bits of the left-hand-side argument +* i64 argument 2 - the low 64 bits of the right-hand-side argument +* i64 argument 3 - the high 64 bits of the right-hand-side argument +* i64 result 0 - the low 64 bits of the result +* i64 result 1 - the high 64 bits of the result + +Each 128-bit operand and result is split into a low/high pair of `i64` values. +The semantics of add/sub are the same as their 64-bit equivalents except +that they work at the level of 128-bits instead of 64-bits. + +The `i64.mul_wide_{s,u}` instructions perform a multiplication of two 64-bit +operands and return the 128-bit result as two `i64` values. These instructions +have the type `[i64 i64] -> [i64 i64]` where the operands are: + +* i64 argument 0 - the left-hand-side argument for multiplication +* i64 argument 1 - the right-hand-side argument for multiplication +* i64 result 0 - the low 64 bits of the result +* i64 result 1 - the high 64 bits of the result + +## Example + +An example of implementing +[`u64::overflowing_add`](https://doc.rust-lang.org/std/primitive.u64.html#method.overflowing_add) +in Rust in WebAssembly might look like: + +```wasm +(module + (func $"u64::overflowing_add" + (param i64 i64) (result i64 i64) + (i64.add128 + (local.get 0) (i64.const 0) ;; lo/hi of lhs + (local.get 1) (i64.const 0) ;; lo/hi of rhs + ) + ) +) +``` + +Here the two input values are zero-extended with constant 0 upper bits. The +overflow flag, the second result, is guaranteed to be either 0 or 1 depending +on whether overflow occurred. + +## Spec Changes + +### Structure + +The definition for [numeric +instructions](https://webassembly.github.io/spec/core/syntax/instructions.html#numeric-instructions) +will be extended with: + +``` +instr ::= ... + | i64.{binop128} + | i64.mul_wide_s + | i64.mul_wide_u + +binop128 ::= add128 | sub128 +``` + +### Validation + +Validation of [numeric +instructions](https://webassembly.github.io/spec/core/valid/instructions.html#numeric-instructions) +will be updated to contain: + +``` +i64.{binop128} + +* The instruction is valid with type [i64 i64 i64 i64] -> [i64 i64] + + + ---------------------------------------------------- + C ⊢ i64.{binop128} : [i64 i64 i64 i64] -> [i64 i64] + +i64.mul_wide_{s,u} + +* The instruction is valid with type [i64 i64] -> [i64 i64] + + + ---------------------------------------------------- + C ⊢ i64.mul_wide_{s,u} : [i64 i64] -> [i64 i64] + +``` + +### Execution + +Execution of [numeric +instructions](https://webassembly.github.io/spec/core/exec/instructions.html#numeric-instructions) +will be updated with: + +``` +i64.{binop128} + +* Assert: due to validation, four values of type i64 are on the top of the stack. +* Pop the value `i64.const c4` from the stack. +* Pop the value `i64.const c3` from the stack. +* Pop the value `i64.const c2` from the stack. +* Pop the value `i64.const c1` from the stack. +* Create 128-bit value `v1` by concatenating `c1` and `c2` where `c1` is the low + 64-bits and `c2` is the upper 64-bits. +* Create 128-bit value `v2` by concatenating `c3` and `c4` where `c3` is the low + 64-bits and `c4` is the upper 64-bits. +* Let `r` be the result of computing `{binop128}(v1, v2)` +* Let `r1` be the low 64-bits of `r` +* Let `r2` be the high 64-bits of `r` +* Push the value `i64.const r1` to the stack +* Push the value `i64.const r2` to the stack + + + (i64.const c1) (i64.const c2) (i64.const c3) (i64.const c4) i64.{binop128} + ↪ (i64.const r1) (i64.const r2) + (if r1:r2 = {binop128}(c1:c2, c3:c4)) + +i64.mul_wide_s + +* Assert: due to validation, two values of type i64 are on the top of the stack. +* Pop the value `i64.const c2` from the stack. +* Pop the value `i64.const c1` from the stack. +* Let `v1` be `c1` sign-extended to 128-bits. +* Let `v2` be `c2` sign-extended to 128-bits. +* Let `r` be the result of computing `mul(v1, v2)` +* Let `r1` be the low 64-bits of `r` +* Let `r2` be the high 64-bits of `r` +* Push the value `i64.const r1` to the stack +* Push the value `i64.const r2` to the stack + + + (i64.const c1) (i64.const c2) i64.mul_wide_s + ↪ (i64.const r1) (i64.const r2) + (if r1:r2 = mul(sextend(c1), sextend(c2))) + +i64.mul_wide_u + +* Assert: due to validation, two values of type i64 are on the top of the stack. +* Pop the value `i64.const c2` from the stack. +* Pop the value `i64.const c1` from the stack. +* Let `v1` be `c1` zero-extended to 128-bits. +* Let `v2` be `c2` zero-extended to 128-bits. +* Let `r` be the result of computing `mul(v1, v2)` +* Let `r1` be the low 64-bits of `r` +* Let `r2` be the high 64-bits of `r` +* Push the value `i64.const r1` to the stack +* Push the value `i64.const r2` to the stack + + + (i64.const c1) (i64.const c2) i64.mul_wide_u + ↪ (i64.const r1) (i64.const r2) + (if r1:r2 = mul(zextend(c1), zextend(c2))) +``` + +### Binary Format + +The binary format for [numeric +instructions](https://webassembly.github.io/spec/core/binary/instructions.html#numeric-instructions) +will be extended with: + +``` +instr ::= ... + | 0xFC 19:u32 ⇒ i64.add128 + | 0xFC 20:u32 ⇒ i64.sub128 + | 0xFC 21:u32 ⇒ i64.mul_wide_s + | 0xFC 22:u32 ⇒ i64.mul_wide_u +``` + +> **Note**: opcodes 0-7 are `*.trunc_sat_*` instructions, 8-17 are bulk-memory +> and reference-types `{table,memory}.{copy,fill,init}`, `{elem,data}.drop`, and +> `table.grow`. Opcode 18 is proposed to be `memory.discard`. + +### Text Format + +The text format for [numeric +instructions](https://webassembly.github.io/spec/core/text/instructions.html#numeric-instructions) +will be extended with: + +``` +plaininstr_l ::= ... + | 'i64.add128' ⇒ i64.add128 + | 'i64.sub128' ⇒ i64.sub128 + | 'i64.mul_wide_s' ⇒ i64.mul_wide_s + | 'i64.mul_wide_u' ⇒ i64.mul_wide_u +``` + +## Implementation Status + +Tests: + +* [x] [Core spec tests](https://github.com/WebAssembly/wide-arithmetic/pull/22) + +Engines: + +* [x] [Wasmtime](https://github.com/bytecodealliance/wasmtime/pull/9403) +* [x] [Reference interpreter](https://github.com/WebAssembly/wide-arithmetic/pull/22) +* [x] [Wasmi](https://github.com/wasmi-labs/wasmi/pull/1383) +* [x] [Chasm](https://github.com/CharlieTap/chasm/pull/110) +* [x] [JavaScriptCore](https://commits.webkit.org/311366@main) +* [x] [SpiderMonkey](https://bugzilla.mozilla.org/show_bug.cgi?id=1949081) +* [x] [Wasmer](https://github.com/wasmerio/wasmer/pull/6243) + +Toolchains: + +* [x] [LLVM / Clang](https://github.com/llvm/llvm-project/pull/111598) +* [x] [Rust](https://github.com/rust-lang/rust/pull/132077) + +Binary Decoders: + +* [x] [`wasmparser` in `wasm-tools`](https://github.com/bytecodealliance/wasm-tools/pull/1853) +* [x] [Reference interpreter](https://github.com/WebAssembly/wide-arithmetic/pull/22) + +Validation: + +* [x] [`wasmparser` in `wasm-tools`](https://github.com/bytecodealliance/wasm-tools/pull/1853) +* [x] [Reference interpreter](https://github.com/WebAssembly/wide-arithmetic/pull/22) +* [x] [`wat_service` in wasm-language-tools](https://github.com/g-plane/wasm-language-tools/commit/9950e494d369da95595bfc10be8fc12be4302aff) + +Binary encoders: + +* [x] [`wasm-encoder` in `wasm-tools`](https://github.com/bytecodealliance/wasm-tools/pull/1853) + +Text parsers: + +* [x] [`wast` in `wasm-tools`](https://github.com/bytecodealliance/wasm-tools/pull/1853) +* [x] [Reference interpreter](https://github.com/WebAssembly/wide-arithmetic/pull/22) + +Fuzzing and test-case generation: + +* [x] [`wasm-smith` in `wasm-tools`](https://github.com/bytecodealliance/wasm-tools/pull/1853) + +Formal specification: + +* [x] [PR to update](https://github.com/WebAssembly/wide-arithmetic/pull/25) +* [x] [Online rendering](https://webassembly.github.io/wide-arithmetic/core/) + +## Alternatives + +### Alternative: Overflow Flags as a value + +> **Note**: this alternative is the subject of [#6] and this section is intended +> to summarize investigations and results of that issue. See [#6] for more +> in-depth discussion too. + +[#6]: https://github.com/WebAssembly/wide-arithmetic/issues/6 + +No current native platform has a single instruction for 128-bit addition or +subtraction. On x86\_64 and aarch64 for example these operations are implemented +with a sequence of two instructions. This gives rise to an alternative to this +proposal which is to support these instructions individually rather than the +combined 128-bit operation. + +Many native platforms have an "overflow flag" in their processor state which +instructions can read and write to. In WebAssembly these instructions for +addition might look like this for example: + +* `i64.add_overflow_{u,s} : [i64 i64] -> [i64 $t]` +* `i64.add_with_carry_{u,s} : [i64 i64 $t] -> [i64 $t]` + +Both instructions would produce a 64-bit result plus an overflow flag, here +labeled as `$t`. The exact choice of type here has consequences on the +implementation, and some possibilities are discussed below. Semantically though +the `$t` results are "truthy" if the operation overflowed, and the input to +`add_with_carry_u` means "add one more" if the value is "truthy". + +An example of using these instructions to implement 128-bit addition would be: + +```wasm +(module + (func $add128 (param i64 i64 i64 i64) (result i64 i64) + (local $oflow $t) + (i64.add_overflow_u (local.get 0) (local.get 2)) + local.set $oflow + (i64.add_with_carry_u (local.get 1) (local.get 3) (local.get $oflow)) + drop + ) +) +``` + +This is quite close to [what x86\_64 would produce][godbolt-add-i128] for an +equivalent native function for example: + +[godbolt-add-i128]: https://godbolt.org/z/1x54aneoW + +``` +0000000000000000 : + 0: 48 89 f8 mov %rdi,%rax + 3: 48 01 d0 add %rdx,%rax ;; i64.add_overflow_u + 6: 48 11 ce adc %rcx,%rsi ;; i64.add_with_carry_u + 9: 48 89 f2 mov %rsi,%rdx + c: c3 ret +``` + +#### Overflow flag: `$t = i32` + +An implementation has been prototyped where `$t` here is `i32`. Overflow-flag +producing operations always generate 0 or 1 and "truthy" is defined as +zero-or-nonzero. Using this prototype an initial benchmark of "calculate the +10\_000th fibonacci number" with a bignum library showed that with these two +alternate instructions (instead of `i64.add128`) that **the generated code was +slower than WebAssembly was before this proposal**. + +To understand why it's slower than before this is an example of the above +128-bit addition function outlined above, with annotated assembly: + +``` +0000000000000000 : + push %rbp + mov %rsp,%rbp + mov %rdx,%rax + add %r8,%rax ;; i64.add_overflow_u: perform the addition + rex setb %dl ;; i64.add_overflow_u: move overflow flags to register + movzbl %dl,%r10d ;; i64.add_overflow_u: zero-extend 8-bit flags to 32-bits + add $0xffffffff,%r10d ;; i64.add_with_carry_u: move overflow register back into eflags + adc %r9,%rcx ;; i64.add_with_carry_u: perform the addition-with-carry + rex setb %dl ;; i64.add_with_carry_u: move flags to register + mov %rbp,%rsp + pop %rbp + ret +``` + +This is quite far from the optimal x86\_64 code above and reveals some drawbacks +of the "overflow flag as a value" model: + +* **On native architectures the overflow flag is not a value**, it's a single + bit in a single fixed register. It's not subject to register allocation and on + platforms like x86\_64 it can be clobbered by many instructions. +* Native architectures generally don't like moving bits in and out of the flags + register (e.g. `setb` extracting above and `add $-1, ...` putting it back in). +* Compilers like Cranelift in Wasmtime do not have preexisting support for + optimizing use of the flags register due to its unique nature. + +Improving the code generation of these instructions in Cranelift/Wasmtime would +require optimizations such as: + +* Detecting during lowering that `i64.add_with_carry_u` is directly after + `i64.add_overflow_u`, the carry flag is an input, and the carry flag isn't + used again. When all of these starts align it's possible to leave the overflow + flag in the EFLAGS register. Currently this is not feasible in + Cranelift/Wasmtime and it's predicted that similar significant investments + would be required to optimize other compilers as well. + +* Fuse WebAssembly-level instructions into a single complier "IR node". For + example the above example could be fused into an internal "add128" instruction + specific to just a compiler itself. This is predicted to be less work than the + above bullet but still a non-trivial investment. This sort of analysis is also + much easier/harder depending on the exact type of `$t`, for example when `$t = + i32` in this case here compiler would have to do additional analyses to prove + that the range of the input value is `[0, 1]`. + +Overall it's expected that there will be significant work necessary to, somehow, +fuse the two native instructions together to optimize handling of the overflow +flag. + +#### Overflow flag: `$t = i1` + +Another possibility of `$t` in the above instructions is to introduce a brand +new type to WebAssembly, `i1` (or `flags` or similar). That more accurately +models what native architectures have in this regard. **The problem with this +alternative, though, is that it fundamentally has the same problem** as the +previous alternative where WebAssembly would be modeling the overflow flag as a +*value* whereas in native architectures it's a piece of *state* on the processor +that instructions can use. + +For example in the above native instructions that Cranelift/Wasmtime generated +if the type were known to be `i1` then the `movzbl %dl,%r10d` instruction would +not be necessary and the `add $0xffffffff,%r10d` could be shrunk to +`add $0xff,%r10b`. Otherwise though there's still the same problems of moving +out of the flags register for lowering and moving back in, which is a +significant slowdown compared to the optimal lowering. In essence somehow fusing +together these WebAssembly instructions into a native instruction pair is +required. + +It's worth mentioning though that if a compiler were to fuse WebAssembly +instructions together into a single IR node, before lowering to native +instructions, it will be easier with an `i1` type than with another type. Using +`i1` statically shows that the value is in the range `[0, 1]` which can make +some fusing optimizations easier. + +This alternative additionally has significant downsides in terms of adding a +brand new type to WebAssembly's type system which is not a small operation to +take on. For example all engines need to be updated to understand a new value +type, an ABI needs to be designed, various other instructions would be needed to +convert to/from an `i1`, etc. This is expected to be a large amount of work +relative to the gain here. + +The conclusion at this time is that while `i1` might help fusing instructions +together optimization passes for compilers the cost of adding it to all of +WebAssembly isn't worth it at this time. In other words the extra analysis a +compiler would have to do to prove an `i32`, for example, is in the range +`[0, 1]` is expected to be much simpler relative to adding a new value type. + +#### Overflow flag: `$t = []` + +A third possibility of `$t` is to define it as "nothing". These instructions, +for example, could be: + +* `i64.add_overflow_{u,s} : [i64 i64] -> [i64]` +* `i64.add_with_carry_{u,s} : [i64 i64] -> [i64]` + +This would require the definition of new state in the wasm abstract machine +where a single bit would live (an overflow flag). These instructions would +implicitly operate on this state and would relieve the compiler from having to +figure out how to schedule instructions by moving the burden to the producer. +For example LLVM already supports native platforms with implicit overflow flag +state so this would be another instance of that. + +Purely from the perspective of a WebAssembly compiler, however, this approach +still has its drawbacks. On x86\_64, for example, many instruction clobber flags +which means the compiler would have to meticulously save and restore the flags +around instructions because there is no guarantee that `i64.add_with_carry_u` +is adjacent to `i64.add_overflow_u`. Platforms like aarch64 might be easier +where instructions opt-in to modifying flags, but platforms like riscv64 which +don't have a flags register at all would still be equally inconvenienced as +before. + +It's worth noting that this alternative would additionally require new +instructions to move in and out of this state. For example if there are two +overflow flags live at the same time a WebAssembly compiler would need to modify +and update this flag appropriately. This addition would also mean that +`i64.add_with_carry_*` would be one of the first instructions that would operate +on implicit state rather than explicit operands. + +#### Overflow flags: Summary + +Modeling a native platform's overflow flag as a value, for example `i32`, is not +an accurate reflection of how native architectures work. Efficiently bridging +this gap in expressivity is unlike any other compilation problem that +WebAssembly compilers deal with today by requiring separate WebAssembly +instructions are across each other are fused together somehow to internally +adjacent native instructions along the compilation pipeline. For `i32` as a +representation it means that compilers additionally need to perform range +analysis of values to determine such a fusing of valid, and while `i1` helps the +situation it has orthogonal drawbacks of adding a new value type to WebAssembly. + +Attempting to model an overflow flag as implicit machine state in WebAssembly +itself is significantly hindered due to native platform differences in how this +state is managed. Implicit state alone still requires a significant increase +in the complexity of existing compilers to bridge these differences. Reducing +this complexity cost would require further changes to be made to this +alternative. + +This proposal's instructions, `i64.{add,sub}128`, [have been +benchmarked][overflow-flags-numbers] to show that `fib_10000` on x86\_64 goes +from 120% slower-than-native before this proposal to 9% after. On +aarch64 the numbers are 72% originally slower-than-native and 2% +faster-than-native afterwards. The implementation of `i64.add128` required very +little optimization work, and that which was implemented was similar to all other +optimization work already implemented in Cranelift for WebAssembly. + +Overall `i64.add128` is expected to be a small addition to WebAssembly which is +not significantly difficult for runtimes to implement. It's additionally +expected, in the case of wide arithmetic, to reap the lion's share of the +performance benefits and close the gap with native platforms. This contrasts +`*.add_with_carry_*` which, while more general, carries significant complexity +to close the performance gap with native. Finally it's predicted that a +maximally useful `*.add_with_carry_*`-style instruction would want to use `i1` +instead of `i32` for the overflow flag. This is always possible to add in a +future proposal to WebAssembly and using 128-bit addition does not close off the +possibility of adding these instructions in the future. + +[overflow-flags-numbers]: https://github.com/WebAssembly/wide-arithmetic/issues/2#issuecomment-2307646174 + +### Alternative: `i64.add_wide3` + +> **Note**: this is an extraction of the discussion in [#6]. + +A common use case of wide-arithmetic is summing up "BigInt" numbers. This is +where numbers are typically represented as a list of 64-bit integers and adding +two of them together is basically exactly the `i64.add_with_carry_u` instruction +above. In pseudocode the meat of a bigint addition loop is: + +```rust +let mut carry: i1 = 0; +let a: &mut [u64] = ...; +let b: &[u64] = ...; +for (a, b) in a.iter_mut().zip(b) { + (*a, carry) = i64_add_with_carry_u(*a, *b, carry); +} +// ... process `carry` remainder next ... +``` + +This means that a bigint addition loop can be exactly modeled with a single +WebAssembly instruction. On x64 this might be lowered as: + +``` +mov %c, 0 ;; register %c holds the carry between loop iterations +start: + mov %a, %c ;; free up %c as early as possible to help the pipeline + xor %c, %c ;; prepare for `setb` + add %a, (%addr_of_a) + adc %a, (%addr_of_b) + setb %c + mov (%addr_of_a), %a + + ;; ...bookkeeping to figure out if we're at the end of the loop... + jne start +``` + +In lieu of adding an `i1` type to WebAssembly, discussed above, it would also be +possible to model this instruction as: + +``` +i64.add_wide3_u : [i64 i64 i64] -> [i64 i64] +``` + +The semantics of this instruction would be to sum all three operands, producing +the low/high bits of the result. The high bits are guaranteed to be in the range +of [0, 2] for the full range of inputs, but if one of the inputs can be proven +to be in the range of [0, 1] then the output high bits are also in the range [0, +1] which maps very closely to the `i64.add_with_carry_u` instruction. +Furthermore this extension of the values could lead to: + +``` +i64.add_wide_u : [i64 i64] -> [i64 i64] +``` + +Which is the same idea, but the carry flag is modeled as `i64` here. This +approach can suit bigint addition well and was prototyped in V8 and showed good +performance. When additionally coupled with a simple range analysis to prove +an input to `64.add_wide3_u` was in the range [0, 1] this resulted in a small +speedup as well, getting even closer to native. + +These instructions, however, can be modeled with `i64.add128` as well: + +``` +i64.add_wide_u(a, b) ≡ i64.add128(a, 0, b, 0) +i64.add_wide3_u(a, b, c) ≡ i64.add128(i64.add128(a, 0, b, 0), c, 0) +``` + +Encoding the extra `i64.const 0` operands to `i64.add128` is less +space-efficient than using `i64.add_wide*` but semantically these constructs map +to the same semantics. This means that if `i64.add128` is used as a primitive +it's expected that a simple compiler analysis can be used to transform +`i64.add128` to these nodes (this is how the original V8 prototype worked). + +Coupled with the fact that these instructions are a generalization of the truly +desired semantics, which is to take/produce `i1` instead of `i64`, it's +currently concluded to defer this alternative. With an `i1` type these +instructions are exactly the `i64.add_{overflow,with_carry}_u` alternatives from +above: + +``` +i64.add_wide_u(a, b) ≡ i64.add_overflow(a, b) +i64.add_wide3_u(a, b, c) ≡ i64.add_with_carry_u(a, b, c) +``` + +So in effect, due to all-`i64` not being the ideal type signature and the +complexities of adding `i1` as a new value type, these instructions are not +chosen at this time. Instead they're modeled as `i64.add128` and engines are +left to optimize internally if necessary. + +### Alternative: 128-bit multiplication + +> **Note**: this was historically discussed in some more depth at [#11]. + +[#11]: https://github.com/WebAssembly/wide-arithmetic/issues/11 + +Instead of `i64.mul_wide_{s,u}` it would be possible to instead add `i64.mul128` +which exposes a full 128-bit-by-128-bit multiplication. This is a "cleaner" +alternative where it aligns well with `i64.add128` and `i64.sub128` in style. +This instruction, however, does not exist on any native platform and most native +platforms instead have some form of `i64.mul_wide_{s,u}`. For example on x64 the +`mul` instruction produces a double-wide result. On AArch64 and RISC-V there is +one instruction to produce the low 64-bits of a 64-by-64 multiplication and two +instructions to produce the high bits depending on the sign of the operands. +This means that `i64.mul_wide_{s,u}` map cleanly to what existing architectures +provide. + +Additionally some specific downsides of `i64.mul128` is that it requires further +optimizations to reach the same level of performance as `i64.mul_wide_{s,u}`. +For example if both operations are zero-extended or sign-extended from 64-bits +it's the same as `i64.mul_wide_{s,u}`. Code generators such as LLVM additionally +need to take care to optimize 128-bit multiplication in source languages where +the upper 64-bits are discarded to just producing the low 64-bits. This required +special handling in a prototype implementation of `i64.mul128` for example. +Finally there are algorithms where only the high bits of the 64-by-64 +multiplication are required and that is difficult to pattern match out of a +128-by-128 bit multiplication. + +Overall the case for `i64.mul128` is not as compelling as `i64.mul_wide_{s,u}`. +In benchmarks so far the widening multiplication has performed better or the +same as `i64.mul128` and has been much easier to implement in prototypes of LLVM +and Wasmtime. + +### Alternative: Why not add an `i128` type to WebAssembly? + +Frontends compiling to WebAssembly are currently required to lower +source-language-level `i128` types into two 64-bit halves. This is done by LLVM, +for example, when lowering its internal `i128` type to WebAssembly. Adding +`i128` to WebAssembly would make this translation lower and remove the need for +`i64.add128` for example by instead being `i128.add`. + +This alternative though is a major change to WebAssembly and can be a very large +increase in complexity for engines. Given the relatively niche use cases for +128-bit integers this is seen as an imbalance in responsibilities where a +relatively rarely used feature of 128-bit integers would require a significant +amount of investment in engines to support. + +Native ISAs also typically do not have a 128-bit integer type. This means that +most operations need to be emulated with 64-bit values anyway such as +bit-operations or loads/stores. Loads/stores of 128-bit values in WebAssembly +can raise questions of tearing in threaded settings in addition to +partially-out-of-bounds loads/stores as well. + +This leads to the conclusion to not add `i128` to WebAssembly and instead use +the other types already present in WebAssembly. + +### Alternative: Why not use `v128` as an operand type? + +WebAssembly already has a 128-bit value type of `v128` from the simd proposal. +Compilers typically keep this value in vector registers, however, such as +`%xmmN`. An operation like `i64.add128` would then have to move `%xmmN` into +general purpose registers, perform the operation, and then move it back to the +`%xmmN` register. This is hypothesized to pessimize performance. + +Alternatively compilers could keep track of whether the value is in and `%xmmN` +vector register or in a general purpose register, but this is seen as a +significant increase in complexity for code translators. + +Overall it seemed best to use `i64` operands instead of `v128` as it more +closely maps what native platforms do by operating on values in general-purpose +registers. + +### Alternative: Why not add `i64.div128_{u,s}`? + +> **Note**: this section is also being discussed in [#15]. + +[#15]: https://github.com/WebAssembly/wide-arithmetic/issues/15 + +Native ISAs generally do not have support for 128-bit division. The x86-64 ISA +has the ability to divide a 128-bit value by a 64-bit value producing a 64-bit +result, but this doesn't map to the desired semantics of `i64.div128_{u,s}` to +be equivalent to `i64.div_{u,s}` for example. + +LLVM additionally for native platforms [unconditionally lowers 128-bit +division](https://godbolt.org/z/4xbGvbxja) to a host libcall of the `__udivti3` +function. It's expected that a host-provided implementation of `__udivti3` is +unlikely to be significantly faster than `__udivti3`-compiled-to-WebAssembly. + +### Alternative: Why not add `i64.{lt,gt,ge,gu}128_{s,u}`? + +> **Note**: this alternative is further discussed in [#4] + +A question posed in [#4] and at previous meetings has been why not add +comparison operations for 128-bit values? A benchmark of sorting an array of +128-bit integers has shown that engines today have a 60%+ slowdown relative to +native, meaning that there is a good theoretical chunk of room for improvement +here. A prototype implementation in LLVM and Wasmtime however showed that while +performance did improve it did not markedly improve. For example Wasmtime +improved its performance by about 20% on x86\_64 (relative to native). + +Further investigation revealed that while these instructions could be added +they're also relatively easy for engines today to pattern-match and optimized. +For example in [bytecodealliance/wasmtime#9176] rules were added to Cranelift to +recognize 128-bit comparisons and emit those. This means that Wasmtime, for +example, is already able to optimize these patterns without new instructions. + +Overall the meager performance gains and possibility of optimizing preexisting +patterns has led to this proposal not including comparison-related instructions +at this time. + +[#4]: https://github.com/WebAssembly/wide-arithmetic/issues/4 +[bytecodealliance/wasmtime#9176]: https://github.com/bytecodealliance/wasmtime/pull/9176 + +### Alternative: Why not add shift or rotate instructions? + +> **Note**: this alternative is further discussed in [#5] + +With the goal of supporting 128-bit or wider-than-64 operations, a reasonable +question might also be why not include rotation/shift instructions? For example +for 64-bit integers WebAssembly has `i64.{rotl,rotr,shl,shr_s,shr_u}`, and would +something be appropriate to add for equivalent operations on larger integer +sizes? + +Investigation in [#5] has shown that x86\_64 has instructions [`shld`] and +[`shrd`] which LLVM uses for 128-bit shifts on native platforms. A benchmark +showcasing 128-bit shifts has been difficult to find, but a benchmark for +bignum shifts shows that these instructions are not used. Instead the benchmark +on native makes use of SIMD instructions. When the same benchmarks is compiled +to WebAssembly it additionally uses SIMD instructions. The performance gap on +x86\_64 is quite large with WebAssembly being 100% slower than native in +Wasmtime. On AArch64 the performance gap is 35% or so. + +Given these numbers it's currently conjectured that instructions for this +proposal may not be necessary for shifts and rotates. While there's a gap in +performance between wasm and native which is significant the best location to +improve for bignums may be with new SIMD instructions rather than new special +instructions related to 128-bit integers. + +[`shld`]: https://www.felixcloutier.com/x86/shld +[`shrd`]: https://www.felixcloutier.com/x86/shrd +[#5]: https://github.com/WebAssembly/wide-arithmetic/issues/5 diff --git a/specification/wasm-latest/1.3-syntax.instructions.spectec b/specification/wasm-latest/1.3-syntax.instructions.spectec index 8571df71d6..ff51d44697 100644 --- a/specification/wasm-latest/1.3-syntax.instructions.spectec +++ b/specification/wasm-latest/1.3-syntax.instructions.spectec @@ -38,6 +38,14 @@ syntax binop_(Inn) = | AND | OR | XOR | SHL | SHR sx hint(show SHR#_#%) | ROTL | ROTR syntax binop_(Fnn) = | ADD | SUB | MUL | DIV | MIN hint(macro "FMIN") | MAX hint(macro "FMAX") | COPYSIGN +syntax wideop_(numtype) +syntax wideop_(Inn) = + | ADD128 -- if $sizenn(Inn) = 64 + | SUB128 -- if $sizenn(Inn) = 64 + +syntax extwideop_(numtype) +syntax extwideop_(Inn) = + | MUL_WIDE sx hint(show MUL_WIDE#_#%) -- if $sizenn(Inn) = 64 syntax testop_(numtype) syntax testop_(Inn) = EQZ @@ -356,6 +364,8 @@ syntax instr/num hint(desc "numeric instruction") = ... | TESTOP numtype testop_(numtype) hint(show %.##%) | RELOP numtype relop_(numtype) hint(show %.##%) | CVTOP numtype_1 numtype_2 cvtop__(numtype_2, numtype_1) hint(show %1.##%3#_#%2) + | WIDEOP numtype wideop_(numtype) hint(show %.##%) + | EXTWIDEOP numtype extwideop_(numtype) hint(show %.##%) | ... syntax instr/vec hint(desc "vector instruction") = ... diff --git a/specification/wasm-latest/2.3-validation.instructions.spectec b/specification/wasm-latest/2.3-validation.instructions.spectec index 62ec9c61db..7963e083f7 100644 --- a/specification/wasm-latest/2.3-validation.instructions.spectec +++ b/specification/wasm-latest/2.3-validation.instructions.spectec @@ -535,6 +535,12 @@ rule Instr_ok/relop: rule Instr_ok/cvtop: C |- CVTOP nt_1 nt_2 cvtop : nt_2 -> nt_1 +rule Instr_ok/wideop: + C |- WIDEOP nt wideop_nt : nt nt nt nt -> nt nt + +rule Instr_ok/extwideop: + C |- EXTWIDEOP nt extwideop_nt : nt nt -> nt nt + ;; Vector instructions diff --git a/specification/wasm-latest/3.1-numerics.scalar.spectec b/specification/wasm-latest/3.1-numerics.scalar.spectec index 7ac9dad593..719864cabc 100644 --- a/specification/wasm-latest/3.1-numerics.scalar.spectec +++ b/specification/wasm-latest/3.1-numerics.scalar.spectec @@ -440,3 +440,49 @@ def $cvtop__(Inn_1, Fnn_2, REINTERPRET, i_1) = $reinterpret__(Inn_1, Fnn_2, i_1) -- if $size(Inn_1) = $size(Fnn_2) ;; TODO(3, rossberg): make implicit def $cvtop__(Fnn_1, Inn_2, REINTERPRET, f_1) = $reinterpret__(Fnn_1, Inn_2, f_1) -- if $size(Fnn_1) = $size(Inn_2) ;; TODO(3, rossberg): make implicit + +;; wide-arithmetic helpers and implementation + +def $iconcat_(numtype, N, num_(numtype), num_(numtype)) : iN(N) +def $iconcat_(Inn, N, i_1, i_2) = + $ior_( + N, + $iextend_(N, $sizenn(Inn), U, i_1), + $ishl_(N, $iextend_(N, $sizenn(Inn), U, i_2), $sizenn(Inn)), + ) + +def $isplit_(numtype, N, iN(N)) : (num_(numtype), num_(numtype)) +def $isplit_(Inn, N, i_1) = ( + $wrap__(N, $sizenn(Inn), i_1), + $wrap__(N, $sizenn(Inn), $ishr_(N, U, i_1, $sizenn(Inn))), +) + +def $wideop_(numtype, N, wideop_(numtype), iN(N), iN(N)) : iN(N) +def $wideop_(Inn, N, ADD128, i_1, i_2) = $iadd_(N, i_1, i_2) +def $wideop_(Inn, N, SUB128, i_1, i_2) = $isub_(N, i_1, i_2) + +def $wideop__(numtype, wideop_(numtype), num_(numtype), num_(numtype), num_(numtype), num_(numtype)) : (num_(numtype), num_(numtype)) +def $wideop__(Inn, wideop, i_1, i_2, i_3, i_4) = + $isplit_( + Inn, + 128, + $wideop_( + Inn, + 128, + wideop, + $iconcat_(Inn, 128, i_1, i_2), + $iconcat_(Inn, 128, i_3, i_4), + ) + ) + +def $extwideop__(numtype, extwideop_(numtype), num_(numtype), num_(numtype)) : (num_(numtype), num_(numtype)) +def $extwideop__(Inn, MUL_WIDE sx, i_1, i_2) = + $isplit_( + Inn, + 128, + $imul_( + 128, + $iextend_(128, $sizenn(Inn), sx, i_1), + $iextend_(128, $sizenn(Inn), sx, i_2), + ) + ) diff --git a/specification/wasm-latest/4.3-execution.instructions.spectec b/specification/wasm-latest/4.3-execution.instructions.spectec index 65e3de4aeb..95724925e6 100644 --- a/specification/wasm-latest/4.3-execution.instructions.spectec +++ b/specification/wasm-latest/4.3-execution.instructions.spectec @@ -988,6 +988,15 @@ rule Step_pure/cvtop-trap: -- if $cvtop__(nt_1, nt_2, cvtop, c_1) = eps +rule Step_pure/wideop: + (CONST nt c_1) (CONST nt c_2) (CONST nt c_3) (CONST nt c_4) (WIDEOP nt wideop_nt) ~> (CONST nt c_5) (CONST nt c_6) + -- if (c_5, c_6) <- $wideop__(nt, wideop_nt, c_1, c_2, c_3, c_4) + +rule Step_pure/extwideop: + (CONST nt c_1) (CONST nt c_2) (EXTWIDEOP nt extwideop_nt) ~> (CONST nt c_5) (CONST nt c_6) + -- if (c_5, c_6) <- $extwideop__(nt, extwideop_nt, c_1, c_2) + + ;; Vector instructions rule Step_pure/vvunop: diff --git a/specification/wasm-latest/5.3-binary.instructions.spectec b/specification/wasm-latest/5.3-binary.instructions.spectec index a08d138777..37b5c63080 100644 --- a/specification/wasm-latest/5.3-binary.instructions.spectec +++ b/specification/wasm-latest/5.3-binary.instructions.spectec @@ -386,6 +386,13 @@ grammar Binstr/num-cvt-sat : instr = ... | 0xFC 7:Bu32 => CVTOP I64 F64 TRUNC_SAT U | ... +grammar Binstr/num-wide : instr = ... + | 0xFC 13:Bu32 => WIDEOP I64 ADD128 + | 0xFC 14:Bu32 => WIDEOP I64 SUB128 + | 0xFC 15:Bu32 => EXTWIDEOP I64 MUL_WIDE S + | 0xFC 16:Bu32 => EXTWIDEOP I64 MUL_WIDE U + | ... + ;; Vector instructions diff --git a/specification/wasm-latest/6.3-text.instructions.spectec b/specification/wasm-latest/6.3-text.instructions.spectec index 645eb8325f..7869e0a816 100644 --- a/specification/wasm-latest/6.3-text.instructions.spectec +++ b/specification/wasm-latest/6.3-text.instructions.spectec @@ -551,6 +551,13 @@ grammar Tplaininstr_(I)/num-cvt-reinterpret : instr = ... | "f64.reinterpret_i64" => CVTOP F64 I64 REINTERPRET | ... +grammar Tplaininstr_(I)/num-wide : instr = ... + | "i64.add128" => WIDEOP I64 ADD128 + | "i64.sub128" => WIDEOP I64 SUB128 + | "i64.mul_wide_s" => EXTWIDEOP I64 MUL_WIDE S + | "i64.mul_wide_u" => EXTWIDEOP I64 MUL_WIDE U + | ... + ;; Vector instructions diff --git a/spectec/doc/example/output/NanoWasm.html b/spectec/doc/example/output/NanoWasm.html index f7edd685ea..63786e0d49 100644 --- a/spectec/doc/example/output/NanoWasm.html +++ b/spectec/doc/example/output/NanoWasm.html @@ -7,7 +7,7 @@ NanoWasm — NanoWasm documentation - + @@ -378,7 +378,7 @@

Binary FormatSphinx 8.2.3 + Powered by Sphinx 8.1.3 & Alabaster 1.0.0 | diff --git a/spectec/src/backend-interpreter/construct.ml b/spectec/src/backend-interpreter/construct.ml index b8ef93fc5b..ac35a96acb 100644 --- a/spectec/src/backend-interpreter/construct.ml +++ b/spectec/src/backend-interpreter/construct.ml @@ -249,6 +249,10 @@ let al_to_op f1 f2 = function | [ CaseV ("F64", []); op ] -> F64 (f2 op) | l -> error_values "op" l +let al_to_i64op f = function + | [ CaseV ("I64", []); op ] -> I64 (f op) + | l -> error_values "op" l + let al_to_int_unop: value -> IntOp.unop = function | CaseV ("CLZ", []) -> IntOp.Clz | CaseV ("CTZ", []) -> IntOp.Ctz @@ -343,6 +347,19 @@ let al_to_cvtop: value list -> cvtop = function | CaseV ("F64", []) :: _ as op -> F64 (al_to_float_cvtop op) | l -> error_values "cvtop" l +let al_to_i64_wideop = function + | CaseV ("ADD128", []) -> I64Op.Add128 + | CaseV ("SUB128", []) -> I64Op.Sub128 + | v -> error_value "i64_wideop" v + +let al_to_wideop = al_to_i64op al_to_i64_wideop + +let al_to_i64_extwideop = function + | CaseV ("MUL_WIDE", [op]) -> I64Op.MulWide (al_to_sx op) + | v -> error_value "i64_extwideop" v + +let al_to_extwideop = al_to_i64op al_to_i64_extwideop + (* Vector operator *) let al_to_vop f1 f2 = function @@ -847,6 +864,8 @@ and al_to_instr': value -> Ast.instr' = function ArrayInitElem (al_to_idx idx1, al_to_idx idx2) | CaseV ("ANY.CONVERT_EXTERN", []) -> ExternConvert Internalize | CaseV ("EXTERN.CONVERT_ANY", []) -> ExternConvert Externalize + | CaseV ("WIDEOP", op) -> Wide (al_to_wideop op) + | CaseV ("EXTWIDEOP", op) -> Extwide (al_to_extwideop op) | v -> error_value "instruction" v let al_to_const: value -> const = al_to_list al_to_instr |> al_to_phrase @@ -1373,6 +1392,27 @@ let al_of_cvtop = function let to_, op', sx = al_of_float_cvtop "64" op in [ nullary "F64"; nullary to_; caseV (op', sx) ] +let al_of_i64_wideop = function + | I64Op.Add128 -> CaseV ("ADD128", []) + | I64Op.Sub128 -> CaseV ("SUB128", []) + +let al_of_wideop (op: wideop) = + match op with + | I32 _ -> . + | I64 op -> [ nullary "I64"; al_of_i64_wideop op ] + | F32 _ -> . + | F64 _ -> . + +let al_of_i64_extwideop = function + | I64Op.MulWide sx -> CaseV ("MUL_WIDE", [ al_of_sx sx ]) + +let al_of_extwideop (op: extwideop) = + match op with + | I32 _ -> . + | I64 op -> [ nullary "I64"; al_of_i64_extwideop op ] + | F32 _ -> . + | F64 _ -> . + (* Vector operator *) let al_of_half = function @@ -1878,6 +1918,8 @@ let rec al_of_instr instr = CaseV ("ARRAY.INIT_ELEM", [ al_of_idx idx1; al_of_idx idx2 ]) | ExternConvert Internalize -> nullary "ANY.CONVERT_EXTERN" | ExternConvert Externalize -> nullary "EXTERN.CONVERT_ANY" + | Wide op -> CaseV ("WIDEOP", al_of_wideop op) + | Extwide op -> CaseV ("EXTWIDEOP", al_of_extwideop op) (* | _ -> CaseV ("TODO: Unconstructed Wasm instruction (al_of_instr)", []) *) let al_of_const const = al_of_list al_of_instr const.it diff --git a/spectec/src/backend-interpreter/dune-ref-interp b/spectec/src/backend-interpreter/dune-ref-interp index 8ec3c6e35f..ff85541491 100644 --- a/spectec/src/backend-interpreter/dune-ref-interp +++ b/spectec/src/backend-interpreter/dune-ref-interp @@ -3,7 +3,7 @@ (library (name reference_interpreter) (modules :standard \ main) - (libraries menhirLib) + (libraries menhirLib stdint) ) ; For parsing diff --git a/spectec/test-frontend/TEST.md b/spectec/test-frontend/TEST.md index cc698924c0..2abe7761fd 100644 --- a/spectec/test-frontend/TEST.md +++ b/spectec/test-frontend/TEST.md @@ -2106,6 +2106,18 @@ syntax binop_(numtype : numtype) | COPYSIGN +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec +syntax wideop_{Inn : Inn}((Inn : Inn <: numtype)) = + | ADD128 + -- if ($sizenn((Inn : Inn <: numtype)) = 64) + | SUB128 + -- if ($sizenn((Inn : Inn <: numtype)) = 64) + +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec +syntax extwideop_{Inn : Inn}((Inn : Inn <: numtype)) = + | MUL_WIDE(sx) + -- if ($sizenn((Inn : Inn <: numtype)) = 64) + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec syntax testop_{Inn : Inn}((Inn : Inn <: numtype)) = | EQZ @@ -2616,6 +2628,8 @@ syntax instr = | TESTOP(numtype : numtype, testop_(numtype)) | RELOP(numtype : numtype, relop_(numtype)) | CVTOP(numtype_1 : numtype, numtype_2 : numtype, cvtop__(numtype_2, numtype_1)) + | WIDEOP(numtype : numtype, wideop_(numtype)) + | EXTWIDEOP(numtype : numtype, extwideop_(numtype)) | VCONST(vectype : vectype, vec_(vectype)) | VVUNOP(vectype : vectype, vvunop : vvunop) | VVBINOP(vectype : vectype, vvbinop : vvbinop) @@ -2696,233 +2710,233 @@ def $free_catch(catch : catch) : free ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec rec { -;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:585.1-585.44 +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:595.1-595.44 def $shift_labelidxs(labelidx*) : labelidx* - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:586.1-586.32 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:596.1-596.32 def $shift_labelidxs([]) = [] - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:587.1-587.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:597.1-597.66 def $shift_labelidxs{`labelidx'*` : labelidx*}([`%`_labelidx(0,)] ++ labelidx'*{labelidx' <- `labelidx'*`}) = $shift_labelidxs(labelidx'*{labelidx' <- `labelidx'*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:588.1-588.91 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:598.1-598.91 def $shift_labelidxs{labelidx : labelidx, `labelidx'*` : labelidx*}([labelidx] ++ labelidx'*{labelidx' <- `labelidx'*`}) = [`%`_labelidx((((labelidx!`%`_labelidx.0 : nat <:> int) - (1 : nat <:> int)) : int <:> nat),)] ++ $shift_labelidxs(labelidx'*{labelidx' <- `labelidx'*`}) } ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec rec { -;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:421.1-421.30 +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:431.1-431.30 def $free_instr(instr : instr) : free - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:436.1-436.26 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:446.1-446.26 def $free_instr(NOP_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:437.1-437.34 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:447.1-447.34 def $free_instr(UNREACHABLE_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:438.1-438.27 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:448.1-448.27 def $free_instr(DROP_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:439.1-439.86 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:449.1-449.86 def $free_instr{`valtype*?` : valtype*?}(SELECT_instr(valtype*{valtype <- `valtype*`}?{`valtype*` <- `valtype*?`})) = $free_opt($free_list($free_valtype(valtype)*{valtype <- `valtype*`})?{`valtype*` <- `valtype*?`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:441.1-441.92 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:451.1-451.92 def $free_instr{blocktype : blocktype, `instr*` : instr*}(BLOCK_instr(blocktype, instr*{instr <- `instr*`})) = $free_blocktype(blocktype) +++ $free_block(instr*{instr <- `instr*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:442.1-442.91 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:452.1-452.91 def $free_instr{blocktype : blocktype, `instr*` : instr*}(LOOP_instr(blocktype, instr*{instr <- `instr*`})) = $free_blocktype(blocktype) +++ $free_block(instr*{instr <- `instr*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:443.1-444.79 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:453.1-454.79 def $free_instr{blocktype : blocktype, `instr_1*` : instr*, `instr_2*` : instr*}(`IF%%ELSE%`_instr(blocktype, instr_1*{instr_1 <- `instr_1*`}, instr_2*{instr_2 <- `instr_2*`})) = $free_blocktype(blocktype) +++ $free_block(instr_1*{instr_1 <- `instr_1*`}) +++ $free_block(instr_2*{instr_2 <- `instr_2*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:446.1-446.56 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:456.1-456.56 def $free_instr{labelidx : labelidx}(BR_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:447.1-447.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:457.1-457.59 def $free_instr{labelidx : labelidx}(BR_IF_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:448.1-449.69 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:458.1-459.69 def $free_instr{`labelidx*` : labelidx*, labelidx' : labelidx}(BR_TABLE_instr(labelidx*{labelidx <- `labelidx*`}, labelidx')) = $free_list($free_labelidx(labelidx)*{labelidx <- `labelidx*`}) +++ $free_labelidx(labelidx') - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:450.1-450.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:460.1-460.64 def $free_instr{labelidx : labelidx}(BR_ON_NULL_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:451.1-451.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:461.1-461.68 def $free_instr{labelidx : labelidx}(BR_ON_NON_NULL_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:452.1-453.83 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:462.1-463.83 def $free_instr{labelidx : labelidx, reftype_1 : reftype, reftype_2 : reftype}(BR_ON_CAST_instr(labelidx, reftype_1, reftype_2)) = $free_labelidx(labelidx) +++ $free_reftype(reftype_1) +++ $free_reftype(reftype_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:454.1-455.83 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:464.1-465.83 def $free_instr{labelidx : labelidx, reftype_1 : reftype, reftype_2 : reftype}(BR_ON_CAST_FAIL_instr(labelidx, reftype_1, reftype_2)) = $free_labelidx(labelidx) +++ $free_reftype(reftype_1) +++ $free_reftype(reftype_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:457.1-457.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:467.1-467.55 def $free_instr{funcidx : funcidx}(CALL_instr(funcidx)) = $free_funcidx(funcidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:458.1-458.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:468.1-468.59 def $free_instr{typeuse : typeuse}(CALL_REF_instr(typeuse)) = $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:459.1-460.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:469.1-470.53 def $free_instr{tableidx : tableidx, typeuse : typeuse}(CALL_INDIRECT_instr(tableidx, typeuse)) = $free_tableidx(tableidx) +++ $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:461.1-461.29 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:471.1-471.29 def $free_instr(RETURN_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:462.1-462.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:472.1-472.62 def $free_instr{funcidx : funcidx}(RETURN_CALL_instr(funcidx)) = $free_funcidx(funcidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:463.1-463.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:473.1-473.66 def $free_instr{typeuse : typeuse}(RETURN_CALL_REF_instr(typeuse)) = $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:464.1-465.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:474.1-475.53 def $free_instr{tableidx : tableidx, typeuse : typeuse}(RETURN_CALL_INDIRECT_instr(tableidx, typeuse)) = $free_tableidx(tableidx) +++ $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:467.1-467.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:477.1-477.53 def $free_instr{tagidx : tagidx}(THROW_instr(tagidx)) = $free_tagidx(tagidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:468.1-468.32 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:478.1-478.32 def $free_instr(THROW_REF_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:469.1-470.99 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:479.1-480.99 def $free_instr{blocktype : blocktype, `catch*` : catch*, `instr*` : instr*}(TRY_TABLE_instr(blocktype, `%`_list(catch*{catch <- `catch*`},), instr*{instr <- `instr*`})) = $free_blocktype(blocktype) +++ $free_list($free_catch(catch)*{catch <- `catch*`}) +++ $free_list($free_instr(instr)*{instr <- `instr*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:472.1-472.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:482.1-482.63 def $free_instr{numtype : numtype, numlit : num_(numtype)}(CONST_instr(numtype, numlit)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:473.1-473.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:483.1-483.60 def $free_instr{numtype : numtype, unop : unop_(numtype)}(UNOP_instr(numtype, unop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:474.1-474.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:484.1-484.62 def $free_instr{numtype : numtype, binop : binop_(numtype)}(BINOP_instr(numtype, binop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:475.1-475.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:485.1-485.64 def $free_instr{numtype : numtype, testop : testop_(numtype)}(TESTOP_instr(numtype, testop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:476.1-476.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:486.1-486.62 def $free_instr{numtype : numtype, relop : relop_(numtype)}(RELOP_instr(numtype, relop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:477.1-478.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:487.1-488.55 def $free_instr{numtype_1 : numtype, numtype_2 : numtype, cvtop : cvtop__(numtype_2, numtype_1)}(CVTOP_instr(numtype_1, numtype_2, cvtop)) = $free_numtype(numtype_1) +++ $free_numtype(numtype_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:480.1-480.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:490.1-490.64 def $free_instr{vectype : vectype, veclit : vec_(vectype)}(VCONST_instr(vectype, veclit)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:481.1-481.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:491.1-491.64 def $free_instr{vectype : vectype, vvunop : vvunop}(VVUNOP_instr(vectype, vvunop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:482.1-482.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:492.1-492.66 def $free_instr{vectype : vectype, vvbinop : vvbinop}(VVBINOP_instr(vectype, vvbinop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:483.1-483.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:493.1-493.68 def $free_instr{vectype : vectype, vvternop : vvternop}(VVTERNOP_instr(vectype, vvternop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:484.1-484.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:494.1-494.68 def $free_instr{vectype : vectype, vvtestop : vvtestop}(VVTESTOP_instr(vectype, vvtestop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:485.1-485.56 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:495.1-495.56 def $free_instr{shape : shape, vunop : vunop_(shape)}(VUNOP_instr(shape, vunop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:486.1-486.58 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:496.1-496.58 def $free_instr{shape : shape, vbinop : vbinop_(shape)}(VBINOP_instr(shape, vbinop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:487.1-487.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:497.1-497.60 def $free_instr{shape : shape, vternop : vternop_(shape)}(VTERNOP_instr(shape, vternop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:488.1-488.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:498.1-498.60 def $free_instr{shape : shape, vtestop : vtestop_(shape)}(VTESTOP_instr(shape, vtestop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:489.1-489.58 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:499.1-499.58 def $free_instr{shape : shape, vrelop : vrelop_(shape)}(VRELOP_instr(shape, vrelop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:490.1-490.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:500.1-500.64 def $free_instr{ishape : ishape, vshiftop : vshiftop_(ishape)}(VSHIFTOP_instr(ishape, vshiftop)) = $free_shape(ishape!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:491.1-491.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:501.1-501.55 def $free_instr{ishape : ishape}(VBITMASK_instr(ishape)) = $free_shape(ishape!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:492.1-492.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:502.1-502.66 def $free_instr{bshape : bshape, vswizzlop : vswizzlop_(bshape)}(VSWIZZLOP_instr(bshape, vswizzlop)) = $free_shape(bshape!`%`_bshape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:493.1-493.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:503.1-503.64 def $free_instr{bshape : bshape, `laneidx*` : laneidx*}(VSHUFFLE_instr(bshape, laneidx*{laneidx <- `laneidx*`})) = $free_shape(bshape!`%`_bshape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:494.1-495.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:504.1-505.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, vextunop : vextunop__(ishape_2, ishape_1)}(VEXTUNOP_instr(ishape_1, ishape_2, vextunop)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:496.1-497.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:506.1-507.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, vextbinop : vextbinop__(ishape_2, ishape_1)}(VEXTBINOP_instr(ishape_1, ishape_2, vextbinop)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:498.1-499.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:508.1-509.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, vextternop : vextternop__(ishape_2, ishape_1)}(VEXTTERNOP_instr(ishape_1, ishape_2, vextternop)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:500.1-501.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:510.1-511.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, sx : sx}(VNARROW_instr(ishape_1, ishape_2, sx)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:502.1-503.47 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:512.1-513.47 def $free_instr{shape_1 : shape, shape_2 : shape, vcvtop : vcvtop__(shape_2, shape_1)}(VCVTOP_instr(shape_1, shape_2, vcvtop)) = $free_shape(shape_1) +++ $free_shape(shape_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:504.1-504.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:514.1-514.51 def $free_instr{shape : shape}(VSPLAT_instr(shape)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:505.1-505.70 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:515.1-515.70 def $free_instr{shape : shape, `sx?` : sx?, laneidx : laneidx}(VEXTRACT_LANE_instr(shape, sx?{sx <- `sx?`}, laneidx)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:506.1-506.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:516.1-516.66 def $free_instr{shape : shape, laneidx : laneidx}(VREPLACE_LANE_instr(shape, laneidx)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:508.1-508.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:518.1-518.62 def $free_instr{heaptype : heaptype}(`REF.NULL`_instr(heaptype)) = $free_heaptype(heaptype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:509.1-509.34 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:519.1-519.34 def $free_instr(`REF.IS_NULL`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:510.1-510.38 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:520.1-520.38 def $free_instr(`REF.AS_NON_NULL`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:511.1-511.29 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:521.1-521.29 def $free_instr(`REF.EQ`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:512.1-512.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:522.1-522.59 def $free_instr{reftype : reftype}(`REF.TEST`_instr(reftype)) = $free_reftype(reftype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:513.1-513.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:523.1-523.59 def $free_instr{reftype : reftype}(`REF.CAST`_instr(reftype)) = $free_reftype(reftype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:514.1-514.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:524.1-524.59 def $free_instr{funcidx : funcidx}(`REF.FUNC`_instr(funcidx)) = $free_funcidx(funcidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:515.1-515.30 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:525.1-525.30 def $free_instr(`REF.I31`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:517.1-517.33 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:527.1-527.33 def $free_instr{sx : sx}(`I31.GET`_instr(sx)) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:519.1-519.61 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:529.1-529.61 def $free_instr{typeidx : typeidx}(`STRUCT.NEW`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:520.1-520.69 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:530.1-530.69 def $free_instr{typeidx : typeidx}(`STRUCT.NEW_DEFAULT`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:521.1-521.69 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:531.1-531.69 def $free_instr{`sx?` : sx?, typeidx : typeidx, u32 : u32}(`STRUCT.GET`_instr(sx?{sx <- `sx?`}, typeidx, u32)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:522.1-522.65 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:532.1-532.65 def $free_instr{typeidx : typeidx, u32 : u32}(`STRUCT.SET`_instr(typeidx, u32)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:524.1-524.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:534.1-534.60 def $free_instr{typeidx : typeidx}(`ARRAY.NEW`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:525.1-525.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:535.1-535.68 def $free_instr{typeidx : typeidx}(`ARRAY.NEW_DEFAULT`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:526.1-526.70 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:536.1-536.70 def $free_instr{typeidx : typeidx, u32 : u32}(`ARRAY.NEW_FIXED`_instr(typeidx, u32)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:527.1-528.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:537.1-538.51 def $free_instr{typeidx : typeidx, dataidx : dataidx}(`ARRAY.NEW_DATA`_instr(typeidx, dataidx)) = $free_typeidx(typeidx) +++ $free_dataidx(dataidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:529.1-530.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:539.1-540.51 def $free_instr{typeidx : typeidx, elemidx : elemidx}(`ARRAY.NEW_ELEM`_instr(typeidx, elemidx)) = $free_typeidx(typeidx) +++ $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:531.1-531.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:541.1-541.64 def $free_instr{`sx?` : sx?, typeidx : typeidx}(`ARRAY.GET`_instr(sx?{sx <- `sx?`}, typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:532.1-532.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:542.1-542.60 def $free_instr{typeidx : typeidx}(`ARRAY.SET`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:533.1-533.32 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:543.1-543.32 def $free_instr(`ARRAY.LEN`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:534.1-534.61 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:544.1-544.61 def $free_instr{typeidx : typeidx}(`ARRAY.FILL`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:535.1-536.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:545.1-546.55 def $free_instr{typeidx_1 : typeidx, typeidx_2 : typeidx}(`ARRAY.COPY`_instr(typeidx_1, typeidx_2)) = $free_typeidx(typeidx_1) +++ $free_typeidx(typeidx_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:537.1-538.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:547.1-548.51 def $free_instr{typeidx : typeidx, dataidx : dataidx}(`ARRAY.INIT_DATA`_instr(typeidx, dataidx)) = $free_typeidx(typeidx) +++ $free_dataidx(dataidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:539.1-540.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:549.1-550.51 def $free_instr{typeidx : typeidx, elemidx : elemidx}(`ARRAY.INIT_ELEM`_instr(typeidx, elemidx)) = $free_typeidx(typeidx) +++ $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:542.1-542.41 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:552.1-552.41 def $free_instr(`EXTERN.CONVERT_ANY`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:543.1-543.41 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:553.1-553.41 def $free_instr(`ANY.CONVERT_EXTERN`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:545.1-545.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:555.1-555.63 def $free_instr{localidx : localidx}(`LOCAL.GET`_instr(localidx)) = $free_localidx(localidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:546.1-546.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:556.1-556.63 def $free_instr{localidx : localidx}(`LOCAL.SET`_instr(localidx)) = $free_localidx(localidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:547.1-547.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:557.1-557.63 def $free_instr{localidx : localidx}(`LOCAL.TEE`_instr(localidx)) = $free_localidx(localidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:549.1-549.67 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:559.1-559.67 def $free_instr{globalidx : globalidx}(`GLOBAL.GET`_instr(globalidx)) = $free_globalidx(globalidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:550.1-550.67 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:560.1-560.67 def $free_instr{globalidx : globalidx}(`GLOBAL.SET`_instr(globalidx)) = $free_globalidx(globalidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:552.1-552.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:562.1-562.63 def $free_instr{tableidx : tableidx}(`TABLE.GET`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:553.1-553.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:563.1-563.63 def $free_instr{tableidx : tableidx}(`TABLE.SET`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:554.1-554.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:564.1-564.64 def $free_instr{tableidx : tableidx}(`TABLE.SIZE`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:555.1-555.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:565.1-565.64 def $free_instr{tableidx : tableidx}(`TABLE.GROW`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:556.1-556.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:566.1-566.64 def $free_instr{tableidx : tableidx}(`TABLE.FILL`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:557.1-558.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:567.1-568.59 def $free_instr{tableidx_1 : tableidx, tableidx_2 : tableidx}(`TABLE.COPY`_instr(tableidx_1, tableidx_2)) = $free_tableidx(tableidx_1) +++ $free_tableidx(tableidx_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:559.1-560.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:569.1-570.53 def $free_instr{tableidx : tableidx, elemidx : elemidx}(`TABLE.INIT`_instr(tableidx, elemidx)) = $free_tableidx(tableidx) +++ $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:561.1-561.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:571.1-571.60 def $free_instr{elemidx : elemidx}(`ELEM.DROP`_instr(elemidx)) = $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:563.1-564.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:573.1-574.49 def $free_instr{numtype : numtype, `loadop?` : loadop_(numtype)?, memidx : memidx, memarg : memarg}(LOAD_instr(numtype, loadop?{loadop <- `loadop?`}, memidx, memarg)) = $free_numtype(numtype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:565.1-566.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:575.1-576.49 def $free_instr{numtype : numtype, `storeop?` : storeop_(numtype)?, memidx : memidx, memarg : memarg}(STORE_instr(numtype, storeop?{storeop <- `storeop?`}, memidx, memarg)) = $free_numtype(numtype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:567.1-568.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:577.1-578.49 def $free_instr{vectype : vectype, `vloadop?` : vloadop_(vectype)?, memidx : memidx, memarg : memarg}(VLOAD_instr(vectype, vloadop?{vloadop <- `vloadop?`}, memidx, memarg)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:569.1-570.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:579.1-580.49 def $free_instr{vectype : vectype, sz : sz, memidx : memidx, memarg : memarg, laneidx : laneidx}(VLOAD_LANE_instr(vectype, sz, memidx, memarg, laneidx)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:571.1-572.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:581.1-582.49 def $free_instr{vectype : vectype, memidx : memidx, memarg : memarg}(VSTORE_instr(vectype, memidx, memarg)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:573.1-574.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:583.1-584.49 def $free_instr{vectype : vectype, sz : sz, memidx : memidx, memarg : memarg, laneidx : laneidx}(VSTORE_LANE_instr(vectype, sz, memidx, memarg, laneidx)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:575.1-575.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:585.1-585.59 def $free_instr{memidx : memidx}(`MEMORY.SIZE`_instr(memidx)) = $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:576.1-576.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:586.1-586.59 def $free_instr{memidx : memidx}(`MEMORY.GROW`_instr(memidx)) = $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:577.1-577.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:587.1-587.59 def $free_instr{memidx : memidx}(`MEMORY.FILL`_instr(memidx)) = $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:578.1-579.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:588.1-589.51 def $free_instr{memidx_1 : memidx, memidx_2 : memidx}(`MEMORY.COPY`_instr(memidx_1, memidx_2)) = $free_memidx(memidx_1) +++ $free_memidx(memidx_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:580.1-581.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:590.1-591.49 def $free_instr{memidx : memidx, dataidx : dataidx}(`MEMORY.INIT`_instr(memidx, dataidx)) = $free_memidx(memidx) +++ $free_dataidx(dataidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:582.1-582.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:592.1-592.60 def $free_instr{dataidx : dataidx}(`DATA.DROP`_instr(dataidx)) = $free_dataidx(dataidx) -;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:422.1-422.31 +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:432.1-432.31 def $free_block(instr*) : free - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:590.1-591.47 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:600.1-601.47 def $free_block{`instr*` : instr*, free : free}(instr*{instr <- `instr*`}) = free[LABELS_free = $shift_labelidxs(free.LABELS_free)] -- if (free = $free_list($free_instr(instr)*{instr <- `instr*`})) } @@ -4366,123 +4380,131 @@ relation Instr_ok: `%|-%:%`(context, instr, instrtype) rule cvtop{C : context, nt_1 : numtype, nt_2 : numtype, cvtop : cvtop__(nt_2, nt_1)}: `%|-%:%`(C, CVTOP_instr(nt_1, nt_2, cvtop), `%->_%%`_instrtype(`%`_resulttype([(nt_2 : numtype <: valtype)],), [], `%`_resulttype([(nt_1 : numtype <: valtype)],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:541.1-542.35 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:538.1-539.50 + rule wideop{C : context, nt : numtype, wideop_nt : wideop_(nt)}: + `%|-%:%`(C, WIDEOP_instr(nt, wideop_nt), `%->_%%`_instrtype(`%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype) (nt : numtype <: valtype) (nt : numtype <: valtype)],), [], `%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype)],))) + + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:541.1-542.50 + rule extwideop{C : context, nt : numtype, extwideop_nt : extwideop_(nt)}: + `%|-%:%`(C, EXTWIDEOP_instr(nt, extwideop_nt), `%->_%%`_instrtype(`%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype)],), [], `%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype)],))) + + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:547.1-548.35 rule vconst{C : context, c : vec_(V128_Vnn)}: `%|-%:%`(C, VCONST_instr(V128_vectype, c), `%->_%%`_instrtype(`%`_resulttype([],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:544.1-545.41 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:550.1-551.41 rule vvunop{C : context, vvunop : vvunop}: `%|-%:%`(C, VVUNOP_instr(V128_vectype, vvunop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:547.1-548.48 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:553.1-554.48 rule vvbinop{C : context, vvbinop : vvbinop}: `%|-%:%`(C, VVBINOP_instr(V128_vectype, vvbinop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:550.1-551.55 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:556.1-557.55 rule vvternop{C : context, vvternop : vvternop}: `%|-%:%`(C, VVTERNOP_instr(V128_vectype, vvternop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:553.1-554.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:559.1-560.44 rule vvtestop{C : context, vvtestop : vvtestop}: `%|-%:%`(C, VVTESTOP_instr(V128_vectype, vvtestop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([I32_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:556.1-557.37 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:562.1-563.37 rule vunop{C : context, sh : shape, vunop : vunop_(sh)}: `%|-%:%`(C, VUNOP_instr(sh, vunop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:559.1-560.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:565.1-566.44 rule vbinop{C : context, sh : shape, vbinop : vbinop_(sh)}: `%|-%:%`(C, VBINOP_instr(sh, vbinop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:562.1-563.51 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:568.1-569.51 rule vternop{C : context, sh : shape, vternop : vternop_(sh)}: `%|-%:%`(C, VTERNOP_instr(sh, vternop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:565.1-566.40 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:571.1-572.40 rule vtestop{C : context, sh : shape, vtestop : vtestop_(sh)}: `%|-%:%`(C, VTESTOP_instr(sh, vtestop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([I32_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:568.1-569.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:574.1-575.44 rule vrelop{C : context, sh : shape, vrelop : vrelop_(sh)}: `%|-%:%`(C, VRELOP_instr(sh, vrelop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:571.1-572.47 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:577.1-578.47 rule vshiftop{C : context, sh : ishape, vshiftop : vshiftop_(sh)}: `%|-%:%`(C, VSHIFTOP_instr(sh, vshiftop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype I32_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:574.1-575.33 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:580.1-581.33 rule vbitmask{C : context, sh : ishape}: `%|-%:%`(C, VBITMASK_instr(sh), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([I32_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:577.1-578.50 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:583.1-584.50 rule vswizzlop{C : context, sh : bshape, vswizzlop : vswizzlop_(sh)}: `%|-%:%`(C, VSWIZZLOP_instr(sh, vswizzlop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:580.1-582.29 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:586.1-588.29 rule vshuffle{C : context, sh : bshape, `i*` : laneidx*}: `%|-%:%`(C, VSHUFFLE_instr(sh, i*{i <- `i*`}), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) -- (if (i!`%`_laneidx.0 < (2 * $dim(sh!`%`_bshape.0)!`%`_dim.0)))*{i <- `i*`} - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:584.1-585.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:590.1-591.44 rule vsplat{C : context, sh : shape}: `%|-%:%`(C, VSPLAT_instr(sh), `%->_%%`_instrtype(`%`_resulttype([($unpackshape(sh) : numtype <: valtype)],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:587.1-589.21 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:593.1-595.21 rule vextract_lane{C : context, sh : shape, `sx?` : sx?, i : laneidx}: `%|-%:%`(C, VEXTRACT_LANE_instr(sh, sx?{sx <- `sx?`}, i), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([($unpackshape(sh) : numtype <: valtype)],))) -- if (i!`%`_laneidx.0 < $dim(sh)!`%`_dim.0) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:591.1-593.21 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:597.1-599.21 rule vreplace_lane{C : context, sh : shape, i : laneidx}: `%|-%:%`(C, VREPLACE_LANE_instr(sh, i), `%->_%%`_instrtype(`%`_resulttype([V128_valtype ($unpackshape(sh) : numtype <: valtype)],), [], `%`_resulttype([V128_valtype],))) -- if (i!`%`_laneidx.0 < $dim(sh)!`%`_dim.0) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:595.1-596.50 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:601.1-602.50 rule vextunop{C : context, sh_1 : ishape, sh_2 : ishape, vextunop : vextunop__(sh_2, sh_1)}: `%|-%:%`(C, VEXTUNOP_instr(sh_1, sh_2, vextunop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:598.1-599.57 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:604.1-605.57 rule vextbinop{C : context, sh_1 : ishape, sh_2 : ishape, vextbinop : vextbinop__(sh_2, sh_1)}: `%|-%:%`(C, VEXTBINOP_instr(sh_1, sh_2, vextbinop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:601.1-602.64 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:607.1-608.64 rule vextternop{C : context, sh_1 : ishape, sh_2 : ishape, vextternop : vextternop__(sh_2, sh_1)}: `%|-%:%`(C, VEXTTERNOP_instr(sh_1, sh_2, vextternop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:604.1-605.48 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:610.1-611.48 rule vnarrow{C : context, sh_1 : ishape, sh_2 : ishape, sx : sx}: `%|-%:%`(C, VNARROW_instr(sh_1, sh_2, sx), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:607.1-608.46 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:613.1-614.46 rule vcvtop{C : context, sh_1 : shape, sh_2 : shape, vcvtop : vcvtop__(sh_2, sh_1)}: `%|-%:%`(C, VCVTOP_instr(sh_1, sh_2, vcvtop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:6.1-6.96 relation Instrs_ok: `%|-%:%`(context, instr*, instrtype) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:613.1-614.24 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:619.1-620.24 rule empty{C : context}: `%|-%:%`(C, [], `%->_%%`_instrtype(`%`_resulttype([],), [], `%`_resulttype([],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:616.1-618.46 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:622.1-624.46 rule instr{C : context, instr : instr, `t_1*` : valtype*, `x*` : idx*, `t_2*` : valtype*}: `%|-%:%`(C, [instr], `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) -- Instr_ok: `%|-%:%`(C, instr, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:621.1-625.82 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:627.1-631.82 rule seq{C : context, `instr_1*` : instr*, `instr_2*` : instr*, `t_1*` : valtype*, `x_1*` : idx*, `x_2*` : idx*, `t_3*` : valtype*, `t_2*` : valtype*, `init*` : init*, `t*` : valtype*}: `%|-%:%`(C, instr_1*{instr_1 <- `instr_1*`} ++ instr_2*{instr_2 <- `instr_2*`}, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x_1*{x_1 <- `x_1*`} ++ x_2*{x_2 <- `x_2*`}, `%`_resulttype(t_3*{t_3 <- `t_3*`},))) -- Instrs_ok: `%|-%:%`(C, instr_1*{instr_1 <- `instr_1*`}, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x_1*{x_1 <- `x_1*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) -- (if (C.LOCALS_context[x_1!`%`_idx.0] = `%%`_localtype(init, t)))*{init <- `init*`, t <- `t*`, x_1 <- `x_1*`} -- Instrs_ok: `%|-%:%`($with_locals(C, x_1*{x_1 <- `x_1*`}, `%%`_localtype(SET_init, t)*{t <- `t*`}), instr_2*{instr_2 <- `instr_2*`}, `%->_%%`_instrtype(`%`_resulttype(t_2*{t_2 <- `t_2*`},), x_2*{x_2 <- `x_2*`}, `%`_resulttype(t_3*{t_3 <- `t_3*`},))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:627.1-631.33 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:633.1-637.33 rule sub{C : context, `instr*` : instr*, it' : instrtype, it : instrtype}: `%|-%:%`(C, instr*{instr <- `instr*`}, it') -- Instrs_ok: `%|-%:%`(C, instr*{instr <- `instr*`}, it) -- Instrtype_sub: `%|-%<:%`(C, it, it') -- Instrtype_ok: `%|-%:OK`(C, it') - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:634.1-637.33 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:640.1-643.33 rule frame{C : context, `instr*` : instr*, `t*` : valtype*, `t_1*` : valtype*, `x*` : idx*, `t_2*` : valtype*}: `%|-%:%`(C, instr*{instr <- `instr*`}, `%->_%%`_instrtype(`%`_resulttype(t*{t <- `t*`} ++ t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t*{t <- `t*`} ++ t_2*{t_2 <- `t_2*`},))) -- Instrs_ok: `%|-%:%`(C, instr*{instr <- `instr*`}, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) @@ -5443,6 +5465,33 @@ def $cvtop__(numtype_1 : numtype, numtype_2 : numtype, cvtop__ : cvtop__(numtype def $cvtop__{Fnn_1 : Fnn, Inn_2 : Inn, f_1 : num_((Fnn_1 : Fnn <: numtype))}((Fnn_1 : Fnn <: numtype), (Inn_2 : Inn <: numtype), REINTERPRET_cvtop__, f_1) = [$reinterpret__((Fnn_1 : Fnn <: numtype), (Inn_2 : Inn <: numtype), f_1)] -- if ($size((Fnn_1 : Fnn <: numtype)) = $size((Inn_2 : Inn <: numtype))) +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $iconcat_(numtype : numtype, N : N, num_ : num_(numtype), num_ : num_(numtype)) : iN(N) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $iconcat_{Inn : Inn, N : N, i_1 : num_((Inn : Inn <: numtype)), i_2 : num_((Inn : Inn <: numtype))}((Inn : Inn <: numtype), N, i_1, i_2) = $ior_(N, $iextend_(N, $sizenn((Inn : Inn <: numtype)), U_sx, `%`_iN(i_1!`%`_num_.0,)), $ishl_(N, $iextend_(N, $sizenn((Inn : Inn <: numtype)), U_sx, `%`_iN(i_2!`%`_num_.0,)), `%`_u32($sizenn((Inn : Inn <: numtype)),))) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $isplit_(numtype : numtype, N : N, iN : iN(N)) : (num_(numtype), num_(numtype)) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $isplit_{Inn : Inn, N : N, i_1 : iN(N)}((Inn : Inn <: numtype), N, i_1) = ($wrap__(N, $sizenn((Inn : Inn <: numtype)), i_1), $wrap__(N, $sizenn((Inn : Inn <: numtype)), $ishr_(N, U_sx, i_1, `%`_u32($sizenn((Inn : Inn <: numtype)),)))) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $wideop_(numtype : numtype, N : N, wideop_ : wideop_(numtype), iN : iN(N), iN : iN(N)) : iN(N) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $wideop_{Inn : Inn, N : N, i_1 : iN(N), i_2 : iN(N)}((Inn : Inn <: numtype), N, ADD128_wideop_, i_1, i_2) = $iadd_(N, i_1, i_2) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $wideop_{Inn : Inn, N : N, i_1 : iN(N), i_2 : iN(N)}((Inn : Inn <: numtype), N, SUB128_wideop_, i_1, i_2) = $isub_(N, i_1, i_2) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $wideop__(numtype : numtype, wideop_ : wideop_(numtype), num_ : num_(numtype), num_ : num_(numtype), num_ : num_(numtype), num_ : num_(numtype)) : (num_(numtype), num_(numtype)) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $wideop__{Inn : Inn, wideop : wideop_((Inn : Inn <: numtype)), i_1 : num_((Inn : Inn <: numtype)), i_2 : num_((Inn : Inn <: numtype)), i_3 : num_((Inn : Inn <: numtype)), i_4 : num_((Inn : Inn <: numtype))}((Inn : Inn <: numtype), wideop, i_1, i_2, i_3, i_4) = $isplit_((Inn : Inn <: numtype), 128, $wideop_((Inn : Inn <: numtype), 128, wideop, $iconcat_((Inn : Inn <: numtype), 128, i_1, i_2), $iconcat_((Inn : Inn <: numtype), 128, i_3, i_4))) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $extwideop__(numtype : numtype, extwideop_ : extwideop_(numtype), num_ : num_(numtype), num_ : num_(numtype)) : (num_(numtype), num_(numtype)) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $extwideop__{Inn : Inn, sx : sx, i_1 : num_((Inn : Inn <: numtype)), i_2 : num_((Inn : Inn <: numtype))}((Inn : Inn <: numtype), MUL_WIDE_extwideop_(sx), i_1, i_2) = $isplit_((Inn : Inn <: numtype), 128, $imul_(128, $iextend_(128, $sizenn((Inn : Inn <: numtype)), sx, `%`_iN(i_1!`%`_num_.0,)), $iextend_(128, $sizenn((Inn : Inn <: numtype)), sx, `%`_iN(i_2!`%`_num_.0,)))) + ;; ../../../../specification/wasm-latest/3.2-numerics.vector.spectec def $lanes_(shape : shape, vec_ : vec_(V128_Vnn)) : lane_($lanetype(shape))* @@ -6758,6 +6807,16 @@ relation Step_pure: `%~>%`(instr*, instr*) `%~>%`([CONST_instr(nt_1, c_1) CVTOP_instr(nt_2, nt_1, cvtop)], [TRAP_instr]) -- if ($cvtop__(nt_1, nt_2, cvtop, c_1) = []) + ;; ../../../../specification/wasm-latest/4.3-execution.instructions.spectec + rule wideop{nt : numtype, c_1 : num_(nt), c_2 : num_(nt), c_3 : num_(nt), c_4 : num_(nt), wideop_nt : wideop_(nt), c_5 : num_(nt), c_6 : num_(nt)}: + `%~>%`([CONST_instr(nt, c_1) CONST_instr(nt, c_2) CONST_instr(nt, c_3) CONST_instr(nt, c_4) WIDEOP_instr(nt, wideop_nt)], [CONST_instr(nt, c_5) CONST_instr(nt, c_6)]) + -- if ((c_5, c_6) <- [$wideop__(nt, wideop_nt, c_1, c_2, c_3, c_4)]) + + ;; ../../../../specification/wasm-latest/4.3-execution.instructions.spectec + rule extwideop{nt : numtype, c_1 : num_(nt), c_2 : num_(nt), extwideop_nt : extwideop_(nt), c_5 : num_(nt), c_6 : num_(nt)}: + `%~>%`([CONST_instr(nt, c_1) CONST_instr(nt, c_2) EXTWIDEOP_instr(nt, extwideop_nt)], [CONST_instr(nt, c_5) CONST_instr(nt, c_6)]) + -- if ((c_5, c_6) <- [$extwideop__(nt, extwideop_nt, c_1, c_2)]) + ;; ../../../../specification/wasm-latest/4.3-execution.instructions.spectec rule vvunop{c_1 : vec_(V128_Vnn), vvunop : vvunop, c : vec_(V128_Vnn)}: `%~>%`([VCONST_instr(V128_vectype, c_1) VVUNOP_instr(V128_vectype, vvunop)], [VCONST_instr(V128_vectype, c)]) @@ -9084,7 +9143,7 @@ grammar Blaneidx : laneidx ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec rec { -;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:793.1-807.71 +;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:800.1-814.71 grammar Binstr : instr ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:8.5-8.24 prod 0x00 => UNREACHABLE_instr @@ -9570,517 +9629,525 @@ grammar Binstr : instr prod {{0xFC} {`%`_u32(6,):Bu32}} => CVTOP_instr(I64_numtype, F64_numtype, TRUNC_SAT_cvtop__(S_sx)) ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:386.5-386.45 prod {{0xFC} {`%`_u32(7,):Bu32}} => CVTOP_instr(I64_numtype, F64_numtype, TRUNC_SAT_cvtop__(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:396.5-396.50 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:390.5-390.38 + prod {{0xFC} {`%`_u32(13,):Bu32}} => WIDEOP_instr(I64_numtype, ADD128_wideop_) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:391.5-391.38 + prod {{0xFC} {`%`_u32(14,):Bu32}} => WIDEOP_instr(I64_numtype, SUB128_wideop_) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:392.5-392.45 + prod {{0xFC} {`%`_u32(15,):Bu32}} => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(S_sx)) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:393.5-393.45 + prod {{0xFC} {`%`_u32(16,):Bu32}} => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(U_sx)) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:403.5-403.50 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(0,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:397.5-397.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:404.5-404.70 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(1,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(8,), `%`_M(8,), S_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:398.5-398.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:405.5-405.70 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(2,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(8,), `%`_M(8,), U_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:399.5-399.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:406.5-406.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(3,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(16,), `%`_M(4,), S_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:400.5-400.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:407.5-407.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(4,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(16,), `%`_M(4,), U_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:401.5-401.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:408.5-408.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(5,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(32,), `%`_M(2,), S_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:402.5-402.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:409.5-409.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(6,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(32,), `%`_M(2,), U_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:403.5-403.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:410.5-410.61 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(7,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(8,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:404.5-404.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:411.5-411.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(8,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(16,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:405.5-405.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:412.5-412.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(9,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(32,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:406.5-406.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:413.5-413.63 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(10,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(64,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:407.5-407.52 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:414.5-414.52 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(11,):Bu32} {(x, ao):Bmemarg}} => VSTORE_instr(V128_vectype, x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:408.5-408.72 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:415.5-415.72 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(84,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(8,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:409.5-409.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:416.5-416.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(85,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(16,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:410.5-410.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:417.5-417.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(86,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(32,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:411.5-411.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:418.5-418.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(87,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(64,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:412.5-412.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:419.5-419.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(88,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(8,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:413.5-413.74 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:420.5-420.74 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(89,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(16,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:414.5-414.74 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:421.5-421.74 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(90,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(32,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:415.5-415.74 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:422.5-422.74 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(91,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(64,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:416.5-416.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:423.5-423.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(92,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(ZERO_vloadop_(`%`_sz(32,),)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:417.5-417.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:424.5-424.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(93,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(ZERO_vloadop_(`%`_sz(64,),)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:421.5-421.72 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:428.5-428.72 prod{`b*` : byte*} {{0xFD} {`%`_u32(12,):Bu32} {b:Bbyte^16{b <- `b*`}}} => VCONST_instr(V128_vectype, $inv_ibytes_(128, b^16{b <- `b*`})) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:425.5-425.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:432.5-432.61 prod{`l*` : labelidx*} {{0xFD} {`%`_u32(13,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx^16{l <- `l*`}}} => VSHUFFLE_instr(`%`_bshape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), `%`_laneidx(l!`%`_labelidx.0,)^16{l <- `l*`}) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:426.5-426.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:433.5-433.49 prod {{0xFD} {`%`_u32(14,):Bu32}} => VSWIZZLOP_instr(`%`_bshape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SWIZZLE_vswizzlop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:427.5-427.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:434.5-434.58 prod {{0xFD} {`%`_u32(256,):Bu32}} => VSWIZZLOP_instr(`%`_bshape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), RELAXED_SWIZZLE_vswizzlop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:431.5-431.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:438.5-438.38 prod {{0xFD} {`%`_u32(15,):Bu32}} => VSPLAT_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:432.5-432.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:439.5-439.38 prod {{0xFD} {`%`_u32(16,):Bu32}} => VSPLAT_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:433.5-433.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:440.5-440.38 prod {{0xFD} {`%`_u32(17,):Bu32}} => VSPLAT_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:434.5-434.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:441.5-441.38 prod {{0xFD} {`%`_u32(18,):Bu32}} => VSPLAT_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:435.5-435.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:442.5-442.38 prod {{0xFD} {`%`_u32(19,):Bu32}} => VSPLAT_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:436.5-436.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:443.5-443.38 prod {{0xFD} {`%`_u32(20,):Bu32}} => VSPLAT_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:440.5-440.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:447.5-447.60 prod{l : labelidx} {{0xFD} {`%`_u32(21,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ?(S_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:441.5-441.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:448.5-448.60 prod{l : labelidx} {{0xFD} {`%`_u32(22,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ?(U_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:442.5-442.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:449.5-449.58 prod{l : labelidx} {{0xFD} {`%`_u32(23,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:443.5-443.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:450.5-450.60 prod{l : labelidx} {{0xFD} {`%`_u32(24,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ?(S_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:444.5-444.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:451.5-451.60 prod{l : labelidx} {{0xFD} {`%`_u32(25,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ?(U_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:445.5-445.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:452.5-452.58 prod{l : labelidx} {{0xFD} {`%`_u32(26,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:446.5-446.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:453.5-453.58 prod{l : labelidx} {{0xFD} {`%`_u32(27,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:447.5-447.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:454.5-454.58 prod{l : labelidx} {{0xFD} {`%`_u32(28,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:448.5-448.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:455.5-455.58 prod{l : labelidx} {{0xFD} {`%`_u32(29,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:449.5-449.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:456.5-456.58 prod{l : labelidx} {{0xFD} {`%`_u32(30,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:450.5-450.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:457.5-457.58 prod{l : labelidx} {{0xFD} {`%`_u32(31,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:451.5-451.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:458.5-458.58 prod{l : labelidx} {{0xFD} {`%`_u32(32,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:452.5-452.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:459.5-459.58 prod{l : labelidx} {{0xFD} {`%`_u32(33,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:453.5-453.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:460.5-460.58 prod{l : labelidx} {{0xFD} {`%`_u32(34,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:457.5-457.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:464.5-464.41 prod {{0xFD} {`%`_u32(35,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:458.5-458.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:465.5-465.41 prod {{0xFD} {`%`_u32(36,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:459.5-459.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:466.5-466.43 prod {{0xFD} {`%`_u32(37,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:460.5-460.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:467.5-467.43 prod {{0xFD} {`%`_u32(38,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:461.5-461.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:468.5-468.43 prod {{0xFD} {`%`_u32(39,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:462.5-462.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:469.5-469.43 prod {{0xFD} {`%`_u32(40,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:463.5-463.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:470.5-470.43 prod {{0xFD} {`%`_u32(41,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:464.5-464.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:471.5-471.43 prod {{0xFD} {`%`_u32(42,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:465.5-465.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:472.5-472.43 prod {{0xFD} {`%`_u32(43,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:466.5-466.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:473.5-473.43 prod {{0xFD} {`%`_u32(44,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:470.5-470.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:477.5-477.41 prod {{0xFD} {`%`_u32(45,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:471.5-471.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:478.5-478.41 prod {{0xFD} {`%`_u32(46,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:472.5-472.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:479.5-479.43 prod {{0xFD} {`%`_u32(47,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:473.5-473.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:480.5-480.43 prod {{0xFD} {`%`_u32(48,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:474.5-474.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:481.5-481.43 prod {{0xFD} {`%`_u32(49,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:475.5-475.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:482.5-482.43 prod {{0xFD} {`%`_u32(50,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:476.5-476.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:483.5-483.43 prod {{0xFD} {`%`_u32(51,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:477.5-477.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:484.5-484.43 prod {{0xFD} {`%`_u32(52,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:478.5-478.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:485.5-485.43 prod {{0xFD} {`%`_u32(53,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:479.5-479.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:486.5-486.43 prod {{0xFD} {`%`_u32(54,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:483.5-483.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:490.5-490.41 prod {{0xFD} {`%`_u32(55,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:484.5-484.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:491.5-491.41 prod {{0xFD} {`%`_u32(56,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:485.5-485.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:492.5-492.43 prod {{0xFD} {`%`_u32(57,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:486.5-486.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:493.5-493.43 prod {{0xFD} {`%`_u32(58,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:487.5-487.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:494.5-494.43 prod {{0xFD} {`%`_u32(59,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:488.5-488.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:495.5-495.43 prod {{0xFD} {`%`_u32(60,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:489.5-489.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:496.5-496.43 prod {{0xFD} {`%`_u32(61,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:490.5-490.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:497.5-497.43 prod {{0xFD} {`%`_u32(62,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:491.5-491.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:498.5-498.43 prod {{0xFD} {`%`_u32(63,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:492.5-492.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:499.5-499.43 prod {{0xFD} {`%`_u32(64,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:496.5-496.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:503.5-503.41 prod {{0xFD} {`%`_u32(65,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:497.5-497.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:504.5-504.41 prod {{0xFD} {`%`_u32(66,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:498.5-498.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:505.5-505.41 prod {{0xFD} {`%`_u32(67,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), LT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:499.5-499.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:506.5-506.41 prod {{0xFD} {`%`_u32(68,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), GT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:500.5-500.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:507.5-507.41 prod {{0xFD} {`%`_u32(69,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), LE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:501.5-501.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:508.5-508.41 prod {{0xFD} {`%`_u32(70,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), GE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:505.5-505.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:512.5-512.41 prod {{0xFD} {`%`_u32(71,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:506.5-506.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:513.5-513.41 prod {{0xFD} {`%`_u32(72,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:507.5-507.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:514.5-514.41 prod {{0xFD} {`%`_u32(73,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), LT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:508.5-508.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:515.5-515.41 prod {{0xFD} {`%`_u32(74,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), GT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:509.5-509.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:516.5-516.41 prod {{0xFD} {`%`_u32(75,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), LE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:510.5-510.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:517.5-517.41 prod {{0xFD} {`%`_u32(76,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), GE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:514.5-514.36 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:521.5-521.36 prod {{0xFD} {`%`_u32(77,):Bu32}} => VVUNOP_instr(V128_vectype, NOT_vvunop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:518.5-518.37 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:525.5-525.37 prod {{0xFD} {`%`_u32(78,):Bu32}} => VVBINOP_instr(V128_vectype, AND_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:519.5-519.40 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:526.5-526.40 prod {{0xFD} {`%`_u32(79,):Bu32}} => VVBINOP_instr(V128_vectype, ANDNOT_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:520.5-520.36 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:527.5-527.36 prod {{0xFD} {`%`_u32(80,):Bu32}} => VVBINOP_instr(V128_vectype, OR_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:521.5-521.37 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:528.5-528.37 prod {{0xFD} {`%`_u32(81,):Bu32}} => VVBINOP_instr(V128_vectype, XOR_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:525.5-525.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:532.5-532.44 prod {{0xFD} {`%`_u32(82,):Bu32}} => VVTERNOP_instr(V128_vectype, BITSELECT_vvternop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:529.5-529.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:536.5-536.43 prod {{0xFD} {`%`_u32(83,):Bu32}} => VVTESTOP_instr(V128_vectype, ANY_TRUE_vvtestop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:533.5-533.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:540.5-540.41 prod {{0xFD} {`%`_u32(96,):Bu32}} => VUNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:534.5-534.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:541.5-541.41 prod {{0xFD} {`%`_u32(97,):Bu32}} => VUNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:535.5-535.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:542.5-542.44 prod {{0xFD} {`%`_u32(98,):Bu32}} => VUNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), POPCNT_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:539.5-539.48 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:546.5-546.48 prod {{0xFD} {`%`_u32(99,):Bu32}} => VTESTOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:543.5-543.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:550.5-550.41 prod {{0xFD} {`%`_u32(100,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:547.5-547.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:554.5-554.53 prod {{0xFD} {`%`_u32(101,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), S_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:548.5-548.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:555.5-555.53 prod {{0xFD} {`%`_u32(102,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), U_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:552.5-552.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:559.5-559.45 prod {{0xFD} {`%`_u32(107,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:553.5-553.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:560.5-560.47 prod {{0xFD} {`%`_u32(108,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:554.5-554.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:561.5-561.47 prod {{0xFD} {`%`_u32(109,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:558.5-558.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:565.5-565.43 prod {{0xFD} {`%`_u32(110,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:559.5-559.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:566.5-566.49 prod {{0xFD} {`%`_u32(111,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ADD_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:560.5-560.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:567.5-567.49 prod {{0xFD} {`%`_u32(112,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ADD_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:561.5-561.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:568.5-568.43 prod {{0xFD} {`%`_u32(113,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:562.5-562.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:569.5-569.49 prod {{0xFD} {`%`_u32(114,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), SUB_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:563.5-563.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:570.5-570.49 prod {{0xFD} {`%`_u32(115,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), SUB_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:564.5-564.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:571.5-571.45 prod {{0xFD} {`%`_u32(118,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MIN_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:565.5-565.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:572.5-572.45 prod {{0xFD} {`%`_u32(119,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MIN_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:566.5-566.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:573.5-573.45 prod {{0xFD} {`%`_u32(120,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MAX_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:567.5-567.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:574.5-574.45 prod {{0xFD} {`%`_u32(121,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MAX_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:568.5-568.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:575.5-575.46 prod {{0xFD} {`%`_u32(123,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), AVGRU_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:572.5-572.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:579.5-579.70 prod {{0xFD} {`%`_u32(124,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTADD_PAIRWISE_vextunop__(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:573.5-573.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:580.5-580.70 prod {{0xFD} {`%`_u32(125,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTADD_PAIRWISE_vextunop__(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:577.5-577.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:584.5-584.42 prod {{0xFD} {`%`_u32(128,):Bu32}} => VUNOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:578.5-578.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:585.5-585.42 prod {{0xFD} {`%`_u32(129,):Bu32}} => VUNOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:582.5-582.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:589.5-589.53 prod {{0xFD} {`%`_u32(130,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), Q15MULR_SATS_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:583.5-583.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:590.5-590.43 prod {{0xFD} {`%`_u32(142,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:584.5-584.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:591.5-591.49 prod {{0xFD} {`%`_u32(143,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ADD_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:585.5-585.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:592.5-592.49 prod {{0xFD} {`%`_u32(144,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ADD_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:586.5-586.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:593.5-593.43 prod {{0xFD} {`%`_u32(145,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:587.5-587.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:594.5-594.49 prod {{0xFD} {`%`_u32(146,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), SUB_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:588.5-588.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:595.5-595.49 prod {{0xFD} {`%`_u32(147,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), SUB_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:589.5-589.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:596.5-596.43 prod {{0xFD} {`%`_u32(149,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:590.5-590.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:597.5-597.45 prod {{0xFD} {`%`_u32(150,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MIN_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:591.5-591.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:598.5-598.45 prod {{0xFD} {`%`_u32(151,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MIN_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:592.5-592.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:599.5-599.45 prod {{0xFD} {`%`_u32(152,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MAX_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:593.5-593.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:600.5-600.45 prod {{0xFD} {`%`_u32(153,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MAX_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:594.5-594.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:601.5-601.46 prod {{0xFD} {`%`_u32(155,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), AVGRU_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:595.5-595.57 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:602.5-602.57 prod {{0xFD} {`%`_u32(273,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), RELAXED_Q15MULRS_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:599.5-599.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:606.5-606.49 prod {{0xFD} {`%`_u32(131,):Bu32}} => VTESTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:603.5-603.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:610.5-610.41 prod {{0xFD} {`%`_u32(132,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:607.5-607.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:614.5-614.53 prod {{0xFD} {`%`_u32(133,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), S_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:608.5-608.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:615.5-615.53 prod {{0xFD} {`%`_u32(134,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), U_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:612.5-612.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:619.5-619.63 prod {{0xFD} {`%`_u32(135,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:613.5-613.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:620.5-620.64 prod {{0xFD} {`%`_u32(136,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:614.5-614.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:621.5-621.63 prod {{0xFD} {`%`_u32(137,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:615.5-615.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:622.5-622.64 prod {{0xFD} {`%`_u32(138,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:619.5-619.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:626.5-626.45 prod {{0xFD} {`%`_u32(139,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:620.5-620.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:627.5-627.47 prod {{0xFD} {`%`_u32(140,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:621.5-621.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:628.5-628.47 prod {{0xFD} {`%`_u32(141,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:625.5-625.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:632.5-632.66 prod {{0xFD} {`%`_u32(156,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:626.5-626.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:633.5-633.67 prod {{0xFD} {`%`_u32(157,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:627.5-627.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:634.5-634.66 prod {{0xFD} {`%`_u32(158,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:628.5-628.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:635.5-635.67 prod {{0xFD} {`%`_u32(159,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:629.5-629.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:636.5-636.67 prod {{0xFD} {`%`_u32(274,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), RELAXED_DOTS_vextbinop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:633.5-633.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:640.5-640.70 prod {{0xFD} {`%`_u32(126,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTADD_PAIRWISE_vextunop__(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:634.5-634.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:641.5-641.70 prod {{0xFD} {`%`_u32(127,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTADD_PAIRWISE_vextunop__(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:638.5-638.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:645.5-645.42 prod {{0xFD} {`%`_u32(160,):Bu32}} => VUNOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:639.5-639.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:646.5-646.42 prod {{0xFD} {`%`_u32(161,):Bu32}} => VUNOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:643.5-643.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:650.5-650.49 prod {{0xFD} {`%`_u32(163,):Bu32}} => VTESTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:647.5-647.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:654.5-654.41 prod {{0xFD} {`%`_u32(164,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:651.5-651.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:658.5-658.63 prod {{0xFD} {`%`_u32(167,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:652.5-652.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:659.5-659.64 prod {{0xFD} {`%`_u32(168,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:653.5-653.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:660.5-660.63 prod {{0xFD} {`%`_u32(169,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:654.5-654.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:661.5-661.64 prod {{0xFD} {`%`_u32(170,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:658.5-658.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:665.5-665.45 prod {{0xFD} {`%`_u32(171,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:659.5-659.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:666.5-666.49 prod {{0xFD} {`%`_u32(172,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:660.5-660.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:667.5-667.49 prod {{0xFD} {`%`_u32(173,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:664.5-664.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:671.5-671.43 prod {{0xFD} {`%`_u32(174,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:665.5-665.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:672.5-672.43 prod {{0xFD} {`%`_u32(177,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:666.5-666.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:673.5-673.43 prod {{0xFD} {`%`_u32(181,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:667.5-667.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:674.5-674.45 prod {{0xFD} {`%`_u32(182,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MIN_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:668.5-668.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:675.5-675.45 prod {{0xFD} {`%`_u32(183,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MIN_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:669.5-669.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:676.5-676.45 prod {{0xFD} {`%`_u32(184,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MAX_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:670.5-670.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:677.5-677.45 prod {{0xFD} {`%`_u32(185,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MAX_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:674.5-674.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:681.5-681.59 prod {{0xFD} {`%`_u32(186,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), DOTS_vextbinop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:675.5-675.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:682.5-682.66 prod {{0xFD} {`%`_u32(188,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:676.5-676.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:683.5-683.67 prod {{0xFD} {`%`_u32(189,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:677.5-677.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:684.5-684.66 prod {{0xFD} {`%`_u32(190,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:678.5-678.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:685.5-685.67 prod {{0xFD} {`%`_u32(191,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:682.5-682.72 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:689.5-689.72 prod {{0xFD} {`%`_u32(275,):Bu32}} => VEXTTERNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), RELAXED_DOT_ADDS_vextternop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:686.5-686.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:693.5-693.42 prod {{0xFD} {`%`_u32(192,):Bu32}} => VUNOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:687.5-687.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:694.5-694.42 prod {{0xFD} {`%`_u32(193,):Bu32}} => VUNOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:691.5-691.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:698.5-698.49 prod {{0xFD} {`%`_u32(195,):Bu32}} => VTESTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:695.5-695.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:702.5-702.41 prod {{0xFD} {`%`_u32(196,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:699.5-699.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:706.5-706.63 prod {{0xFD} {`%`_u32(199,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:700.5-700.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:707.5-707.64 prod {{0xFD} {`%`_u32(200,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:701.5-701.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:708.5-708.63 prod {{0xFD} {`%`_u32(201,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:702.5-702.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:709.5-709.64 prod {{0xFD} {`%`_u32(202,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:706.5-706.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:713.5-713.45 prod {{0xFD} {`%`_u32(203,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:707.5-707.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:714.5-714.49 prod {{0xFD} {`%`_u32(204,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:708.5-708.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:715.5-715.49 prod {{0xFD} {`%`_u32(205,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:712.5-712.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:719.5-719.43 prod {{0xFD} {`%`_u32(206,):Bu32}} => VBINOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:713.5-713.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:720.5-720.43 prod {{0xFD} {`%`_u32(209,):Bu32}} => VBINOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:714.5-714.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:721.5-721.43 prod {{0xFD} {`%`_u32(213,):Bu32}} => VBINOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:718.5-718.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:725.5-725.42 prod {{0xFD} {`%`_u32(214,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:719.5-719.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:726.5-726.42 prod {{0xFD} {`%`_u32(215,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:720.5-720.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:727.5-727.46 prod {{0xFD} {`%`_u32(216,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:721.5-721.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:728.5-728.46 prod {{0xFD} {`%`_u32(217,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:722.5-722.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:729.5-729.46 prod {{0xFD} {`%`_u32(218,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:723.5-723.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:730.5-730.46 prod {{0xFD} {`%`_u32(219,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:727.5-727.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:734.5-734.66 prod {{0xFD} {`%`_u32(220,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:728.5-728.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:735.5-735.67 prod {{0xFD} {`%`_u32(221,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:729.5-729.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:736.5-736.66 prod {{0xFD} {`%`_u32(222,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:730.5-730.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:737.5-737.67 prod {{0xFD} {`%`_u32(223,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:734.5-734.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:741.5-741.43 prod {{0xFD} {`%`_u32(103,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), CEIL_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:735.5-735.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:742.5-742.44 prod {{0xFD} {`%`_u32(104,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), FLOOR_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:736.5-736.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:743.5-743.44 prod {{0xFD} {`%`_u32(105,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), TRUNC_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:737.5-737.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:744.5-744.46 prod {{0xFD} {`%`_u32(106,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), NEAREST_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:738.5-738.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:745.5-745.42 prod {{0xFD} {`%`_u32(224,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:739.5-739.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:746.5-746.42 prod {{0xFD} {`%`_u32(225,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:740.5-740.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:747.5-747.43 prod {{0xFD} {`%`_u32(227,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), SQRT_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:744.5-744.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:751.5-751.43 prod {{0xFD} {`%`_u32(228,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:745.5-745.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:752.5-752.43 prod {{0xFD} {`%`_u32(229,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:746.5-746.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:753.5-753.43 prod {{0xFD} {`%`_u32(230,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:747.5-747.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:754.5-754.43 prod {{0xFD} {`%`_u32(231,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), DIV_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:748.5-748.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:755.5-755.43 prod {{0xFD} {`%`_u32(232,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:749.5-749.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:756.5-756.43 prod {{0xFD} {`%`_u32(233,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:750.5-750.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:757.5-757.44 prod {{0xFD} {`%`_u32(234,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), PMIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:751.5-751.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:758.5-758.44 prod {{0xFD} {`%`_u32(235,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), PMAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:752.5-752.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:759.5-759.51 prod {{0xFD} {`%`_u32(269,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:753.5-753.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:760.5-760.51 prod {{0xFD} {`%`_u32(270,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:757.5-757.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:764.5-764.53 prod {{0xFD} {`%`_u32(261,):Bu32}} => VTERNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_MADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:758.5-758.54 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:765.5-765.54 prod {{0xFD} {`%`_u32(262,):Bu32}} => VTERNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_NMADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:762.5-762.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:769.5-769.43 prod {{0xFD} {`%`_u32(116,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), CEIL_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:763.5-763.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:770.5-770.44 prod {{0xFD} {`%`_u32(117,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), FLOOR_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:764.5-764.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:771.5-771.44 prod {{0xFD} {`%`_u32(122,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), TRUNC_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:765.5-765.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:772.5-772.46 prod {{0xFD} {`%`_u32(148,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), NEAREST_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:766.5-766.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:773.5-773.42 prod {{0xFD} {`%`_u32(236,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:767.5-767.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:774.5-774.42 prod {{0xFD} {`%`_u32(237,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:768.5-768.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:775.5-775.43 prod {{0xFD} {`%`_u32(239,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), SQRT_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:772.5-772.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:779.5-779.43 prod {{0xFD} {`%`_u32(240,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:773.5-773.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:780.5-780.43 prod {{0xFD} {`%`_u32(241,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:774.5-774.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:781.5-781.43 prod {{0xFD} {`%`_u32(242,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:775.5-775.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:782.5-782.43 prod {{0xFD} {`%`_u32(243,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), DIV_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:776.5-776.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:783.5-783.43 prod {{0xFD} {`%`_u32(244,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:777.5-777.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:784.5-784.43 prod {{0xFD} {`%`_u32(245,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:778.5-778.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:785.5-785.44 prod {{0xFD} {`%`_u32(246,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), PMIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:779.5-779.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:786.5-786.44 prod {{0xFD} {`%`_u32(247,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), PMAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:780.5-780.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:787.5-787.51 prod {{0xFD} {`%`_u32(271,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:781.5-781.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:788.5-788.51 prod {{0xFD} {`%`_u32(272,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:785.5-785.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:792.5-792.53 prod {{0xFD} {`%`_u32(263,):Bu32}} => VTERNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_MADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:786.5-786.54 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:793.5-793.54 prod {{0xFD} {`%`_u32(264,):Bu32}} => VTERNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_NMADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:787.5-787.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:794.5-794.59 prod {{0xFD} {`%`_u32(265,):Bu32}} => VTERNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:788.5-788.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:795.5-795.59 prod {{0xFD} {`%`_u32(266,):Bu32}} => VTERNOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:789.5-789.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:796.5-796.59 prod {{0xFD} {`%`_u32(267,):Bu32}} => VTERNOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:790.5-790.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:797.5-797.59 prod {{0xFD} {`%`_u32(268,):Bu32}} => VTERNOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:794.5-794.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:801.5-801.61 prod {{0xFD} {`%`_u32(94,):Bu32}} => VCVTOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), DEMOTE_vcvtop__(ZERO_zero)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:795.5-795.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:802.5-802.61 prod {{0xFD} {`%`_u32(95,):Bu32}} => VCVTOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), PROMOTELOW_vcvtop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:796.5-796.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:803.5-803.62 prod {{0xFD} {`%`_u32(248,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), TRUNC_SAT_vcvtop__(S_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:797.5-797.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:804.5-804.62 prod {{0xFD} {`%`_u32(249,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), TRUNC_SAT_vcvtop__(U_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:798.5-798.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:805.5-805.60 prod {{0xFD} {`%`_u32(250,):Bu32}} => VCVTOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(), S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:799.5-799.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:806.5-806.60 prod {{0xFD} {`%`_u32(251,):Bu32}} => VCVTOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(), U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:800.5-800.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:807.5-807.67 prod {{0xFD} {`%`_u32(252,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), TRUNC_SAT_vcvtop__(S_sx, ?(ZERO_zero))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:801.5-801.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:808.5-808.67 prod {{0xFD} {`%`_u32(253,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), TRUNC_SAT_vcvtop__(U_sx, ?(ZERO_zero))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:802.5-802.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:809.5-809.64 prod {{0xFD} {`%`_u32(254,):Bu32}} => VCVTOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(LOW_half), S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:803.5-803.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:810.5-810.64 prod {{0xFD} {`%`_u32(255,):Bu32}} => VCVTOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(LOW_half), U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:804.5-804.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:811.5-811.66 prod {{0xFD} {`%`_u32(257,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_TRUNC_vcvtop__(S_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:805.5-805.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:812.5-812.66 prod {{0xFD} {`%`_u32(258,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_TRUNC_vcvtop__(U_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:806.5-806.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:813.5-813.71 prod {{0xFD} {`%`_u32(259,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_TRUNC_vcvtop__(S_sx, ?(ZERO_zero))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:807.5-807.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:814.5-814.71 prod {{0xFD} {`%`_u32(260,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_TRUNC_vcvtop__(U_sx, ?(ZERO_zero))) } @@ -11605,6 +11672,14 @@ grammar Tplaininstr_(I : I) : instr ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec prod "f64.reinterpret_i64" => CVTOP_instr(F64_numtype, I64_numtype, REINTERPRET_cvtop__) ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.add128" => WIDEOP_instr(I64_numtype, ADD128_wideop_) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.sub128" => WIDEOP_instr(I64_numtype, SUB128_wideop_) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.mul_wide_s" => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(S_sx)) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.mul_wide_u" => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(U_sx)) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec prod{`c*` : u8*} {{"v128.const"} {"i8x16"} {c*{c <- `c*`}:Ti8^16{}}} => VCONST_instr(V128_vectype, $inv_ibytes_(128, $concat_(syntax byte, $ibytes_(8, c)*{c <- `c*`}))) ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec prod{`c*` : u16*} {{"v128.const"} {"i16x8"} {c*{c <- `c*`}:Ti16^8{}}} => VCONST_instr(V128_vectype, $inv_ibytes_(128, $concat_(syntax byte, $ibytes_(16, c)*{c <- `c*`}))) diff --git a/spectec/test-interpreter/TEST.md b/spectec/test-interpreter/TEST.md index 1540225f42..6b9f1744c2 100644 --- a/spectec/test-interpreter/TEST.md +++ b/spectec/test-interpreter/TEST.md @@ -134,5 +134,8 @@ spectec 0.5 generator - print_i32: 1 - print_i32: 2 - print: () +../test-interpreter/spec-test-3/wide-arithmetic.wast:25.1-28.44 +- Test failed at ../test-interpreter/spec-test-3/wide-arithmetic.wast:25.1-28.44 (Algorithm not found: WIDEOP (interpreting CaseV(WIDEOP, [CaseV(I64, []), CaseV(ADD128, [])]) at )) +Test failed for ../test-interpreter/spec-test-3/wide-arithmetic.wast == Complete. ``` diff --git a/spectec/test-latex/TEST.md b/spectec/test-latex/TEST.md index 2380d7f35c..b91ca0957e 100644 --- a/spectec/test-latex/TEST.md +++ b/spectec/test-latex/TEST.md @@ -3686,6 +3686,19 @@ $$ \end{array} $$ +$$ +\begin{array}[t]{@{}lrrl@{}l@{}} +& {{\mathit{wideop}}}_{{\mathsf{i}}{N}} & ::= & \mathsf{add{\scriptstyle 128}} & \quad \mbox{if}~ N = 64 \\ +& & | & \mathsf{sub{\scriptstyle 128}} & \quad \mbox{if}~ N = 64 \\ +\end{array} +$$ + +$$ +\begin{array}[t]{@{}lrrl@{}l@{}} +& {{\mathit{extwideop}}}_{{\mathsf{i}}{N}} & ::= & {\mathsf{mul\_wide}}{\mathsf{\_}}{{\mathit{sx}}} & \quad \mbox{if}~ N = 64 \\ +\end{array} +$$ + $$ \begin{array}[t]{@{}lrrl@{}l@{}} & {{\mathit{testop}}}_{{\mathsf{i}}{N}} & ::= & \mathsf{eqz} \\ @@ -3983,6 +3996,8 @@ $$ & & | & {\mathit{numtype}} {.} {{\mathit{testop}}}_{{\mathit{numtype}}} \\ & & | & {\mathit{numtype}} {.} {{\mathit{relop}}}_{{\mathit{numtype}}} \\ & & | & {\mathit{numtype}}_1 {.} {{{\mathit{cvtop}}}_{{\mathit{numtype}}_2, {\mathit{numtype}}_1}}{\mathsf{\_}}{{\mathit{numtype}}_2} \\ +& & | & {\mathit{numtype}} {.} {{\mathit{wideop}}}_{{\mathit{numtype}}} \\ +& & | & {\mathit{numtype}} {.} {{\mathit{extwideop}}}_{{\mathit{numtype}}} \\ & & | & {\mathit{vectype}}{.}\mathsf{const}~{{\mathit{vec}}}_{{\mathit{vectype}}} \\ & & | & {\mathit{vectype}} {.} {\mathit{vvunop}} \\ & & | & {\mathit{vectype}} {.} {\mathit{vvbinop}} \\ @@ -7092,6 +7107,26 @@ C \vdash {\mathit{nt}}_1 {.} {{\mathit{cvtop}}}{\mathsf{\_}}{{\mathit{nt}}_2} : \end{array} $$ +$$ +\begin{array}{@{}c@{}}\displaystyle +\frac{ +}{ +C \vdash {\mathit{nt}} {.} {\mathit{wideop}}_{\mathit{nt}} : {\mathit{nt}}~{\mathit{nt}}~{\mathit{nt}}~{\mathit{nt}} \rightarrow {\mathit{nt}}~{\mathit{nt}} +} \, {[\textsc{\scriptsize T{-}instr{-}wideop}]} +\qquad +\end{array} +$$ + +$$ +\begin{array}{@{}c@{}}\displaystyle +\frac{ +}{ +C \vdash {\mathit{nt}} {.} {\mathit{extwideop}}_{\mathit{nt}} : {\mathit{nt}}~{\mathit{nt}} \rightarrow {\mathit{nt}}~{\mathit{nt}} +} \, {[\textsc{\scriptsize T{-}instr{-}extwideop}]} +\qquad +\end{array} +$$ + \vspace{1ex} $$ @@ -8421,6 +8456,54 @@ $$ \vspace{1ex} +$$ +\begin{array}[t]{@{}lcl@{}l@{}} +{{\mathrm{iconcat}}}_{{\mathsf{i}}{N}}(N, i_1, i_2) & = & & \\ + \multicolumn{4}{@{}l@{}}{\quad +\begin{array}[t]{@{}l@{}} +{{\mathrm{ior}}}_{N}({{{{\mathrm{iextend}}}_{N, N}^{\mathsf{u}}}}{(i_1)}, {{\mathrm{ishl}}}_{N}({{{{\mathrm{iextend}}}_{N, N}^{\mathsf{u}}}}{(i_2)}, N)) \\ +\end{array} +} \\ +\end{array} +$$ + +$$ +\begin{array}[t]{@{}lcl@{}l@{}} +{{\mathrm{isplit}}}_{{\mathsf{i}}{N}}(N, i_1) & = & ({{\mathrm{wrap}}}_{N, N}(i_1), {{\mathrm{wrap}}}_{N, N}({{\mathrm{ishr}}}{\mathsf{u}}{{}_{N}(i_1, N)})) \\ +\end{array} +$$ + +$$ +\begin{array}[t]{@{}lcl@{}l@{}} +{{\mathrm{wideop}}}_{{\mathsf{i}}{N}}(N, \mathsf{add{\scriptstyle 128}}, i_1, i_2) & = & {{\mathrm{iadd}}}_{N}(i_1, i_2) \\ +{{\mathrm{wideop}}}_{{\mathsf{i}}{N}}(N, \mathsf{sub{\scriptstyle 128}}, i_1, i_2) & = & {{\mathrm{isub}}}_{N}(i_1, i_2) \\ +\end{array} +$$ + +$$ +\begin{array}[t]{@{}lcl@{}l@{}} +{{\mathrm{wideop}}}_{{\mathsf{i}}{N}, {\mathit{wideop}}}(i_1, i_2, i_3, i_4) & = & & \\ + \multicolumn{4}{@{}l@{}}{\quad +\begin{array}[t]{@{}l@{}} +{{\mathrm{isplit}}}_{{\mathsf{i}}{N}}(128, {{\mathrm{wideop}}}_{{\mathsf{i}}{N}}(128, {\mathit{wideop}}, {{\mathrm{iconcat}}}_{{\mathsf{i}}{N}}(128, i_1, i_2), {{\mathrm{iconcat}}}_{{\mathsf{i}}{N}}(128, i_3, i_4))) \\ +\end{array} +} \\ +\end{array} +$$ + +$$ +\begin{array}[t]{@{}lcl@{}l@{}} +{{\mathrm{extwideop}}}_{{\mathsf{i}}{N}, {\mathsf{mul\_wide}}{\mathsf{\_}}{{\mathit{sx}}}}(i_1, i_2) & = & & \\ + \multicolumn{4}{@{}l@{}}{\quad +\begin{array}[t]{@{}l@{}} +{{\mathrm{isplit}}}_{{\mathsf{i}}{N}}(128, {{\mathrm{imul}}}_{128}({{{{\mathrm{iextend}}}_{128, N}^{{\mathit{sx}}}}}{(i_1)}, {{{{\mathrm{iextend}}}_{128, N}^{{\mathit{sx}}}}}{(i_2)})) \\ +\end{array} +} \\ +\end{array} +$$ + +\vspace{1ex} + $$ \begin{array}[t]{@{}lcl@{}l@{}} {\mathrm{zeroop}}({{{\mathsf{i}}{N}}_1}{\mathsf{x}}{M_1}, {{{\mathsf{i}}{N}}_2}{\mathsf{x}}{M_2}, {\mathsf{extend}}{\mathsf{\_}}{{\mathit{half}}}{\mathsf{\_}}{{\mathit{sx}}}) & = & \epsilon \\ @@ -10871,6 +10954,15 @@ $$ \vspace{1ex} +$$ +\begin{array}[t]{@{}lrcl@{}l@{}} +{[\textsc{\scriptsize E{-}wideop}]} \quad & ({\mathit{nt}}{.}\mathsf{const}~c_1)~({\mathit{nt}}{.}\mathsf{const}~c_2)~({\mathit{nt}}{.}\mathsf{const}~c_3)~({\mathit{nt}}{.}\mathsf{const}~c_4)~({\mathit{nt}} {.} {\mathit{wideop}}_{\mathit{nt}}) & \hookrightarrow & ({\mathit{nt}}{.}\mathsf{const}~c_5)~({\mathit{nt}}{.}\mathsf{const}~c_6) & \quad \mbox{if}~ (c_5, c_6) \in {{\mathrm{wideop}}}_{{\mathit{nt}}, {\mathit{wideop}}_{\mathit{nt}}}(c_1, c_2, c_3, c_4) \\ +{[\textsc{\scriptsize E{-}extwideop}]} \quad & ({\mathit{nt}}{.}\mathsf{const}~c_1)~({\mathit{nt}}{.}\mathsf{const}~c_2)~({\mathit{nt}} {.} {\mathit{extwideop}}_{\mathit{nt}}) & \hookrightarrow & ({\mathit{nt}}{.}\mathsf{const}~c_5)~({\mathit{nt}}{.}\mathsf{const}~c_6) & \quad \mbox{if}~ (c_5, c_6) \in {{\mathrm{extwideop}}}_{{\mathit{nt}}, {\mathit{extwideop}}_{\mathit{nt}}}(c_1, c_2) \\ +\end{array} +$$ + +\vspace{1ex} + $$ \begin{array}[t]{@{}lrcl@{}l@{}} {[\textsc{\scriptsize E{-}vvunop}]} \quad & (\mathsf{v{\scriptstyle 128}}{.}\mathsf{const}~c_1)~(\mathsf{v{\scriptstyle 128}} {.} {\mathit{vvunop}}) & \hookrightarrow & (\mathsf{v{\scriptstyle 128}}{.}\mathsf{const}~c) & \quad \mbox{if}~ c \in {{\mathit{vvunop}}}{{}_{\mathsf{v{\scriptstyle 128}}}(c_1)} \\ @@ -11921,6 +12013,10 @@ $$ & & | & \mathtt{0xFC}~~5{:}{\mathtt{u32}} & \quad\Rightarrow\quad{} & \mathsf{i{\scriptstyle 64}} {.} {{\mathsf{trunc\_sat}}{\mathsf{\_}}{\mathsf{u}}}{\mathsf{\_}}{\mathsf{f{\scriptstyle 32}}} \\ & & | & \mathtt{0xFC}~~6{:}{\mathtt{u32}} & \quad\Rightarrow\quad{} & \mathsf{i{\scriptstyle 64}} {.} {{\mathsf{trunc\_sat}}{\mathsf{\_}}{\mathsf{s}}}{\mathsf{\_}}{\mathsf{f{\scriptstyle 64}}} \\ & & | & \mathtt{0xFC}~~7{:}{\mathtt{u32}} & \quad\Rightarrow\quad{} & \mathsf{i{\scriptstyle 64}} {.} {{\mathsf{trunc\_sat}}{\mathsf{\_}}{\mathsf{u}}}{\mathsf{\_}}{\mathsf{f{\scriptstyle 64}}} \\ +& & | & \mathtt{0xFC}~~13{:}{\mathtt{u32}} & \quad\Rightarrow\quad{} & \mathsf{i{\scriptstyle 64}} {.} \mathsf{add{\scriptstyle 128}} \\ +& & | & \mathtt{0xFC}~~14{:}{\mathtt{u32}} & \quad\Rightarrow\quad{} & \mathsf{i{\scriptstyle 64}} {.} \mathsf{sub{\scriptstyle 128}} \\ +& & | & \mathtt{0xFC}~~15{:}{\mathtt{u32}} & \quad\Rightarrow\quad{} & \mathsf{i{\scriptstyle 64}} {.} {\mathsf{mul\_wide}}{\mathsf{\_}}{\mathsf{s}} \\ +& & | & \mathtt{0xFC}~~16{:}{\mathtt{u32}} & \quad\Rightarrow\quad{} & \mathsf{i{\scriptstyle 64}} {.} {\mathsf{mul\_wide}}{\mathsf{\_}}{\mathsf{u}} \\ \end{array} $$ @@ -13370,6 +13466,10 @@ $$ & & | & \mbox{‘\texttt{i64.reinterpret\_f64}’} & \quad\Rightarrow\quad{} & \mathsf{i{\scriptstyle 64}} {.} {\mathsf{reinterpret}}{\mathsf{\_}}{\mathsf{f{\scriptstyle 64}}} \\ & & | & \mbox{‘\texttt{f32.reinterpret\_i32}’} & \quad\Rightarrow\quad{} & \mathsf{f{\scriptstyle 32}} {.} {\mathsf{reinterpret}}{\mathsf{\_}}{\mathsf{i{\scriptstyle 32}}} \\ & & | & \mbox{‘\texttt{f64.reinterpret\_i64}’} & \quad\Rightarrow\quad{} & \mathsf{f{\scriptstyle 64}} {.} {\mathsf{reinterpret}}{\mathsf{\_}}{\mathsf{i{\scriptstyle 64}}} \\ +& & | & \mbox{‘\texttt{i64.add128}’} & \quad\Rightarrow\quad{} & \mathsf{i{\scriptstyle 64}} {.} \mathsf{add{\scriptstyle 128}} \\ +& & | & \mbox{‘\texttt{i64.sub128}’} & \quad\Rightarrow\quad{} & \mathsf{i{\scriptstyle 64}} {.} \mathsf{sub{\scriptstyle 128}} \\ +& & | & \mbox{‘\texttt{i64.mul\_wide\_s}’} & \quad\Rightarrow\quad{} & \mathsf{i{\scriptstyle 64}} {.} {\mathsf{mul\_wide}}{\mathsf{\_}}{\mathsf{s}} \\ +& & | & \mbox{‘\texttt{i64.mul\_wide\_u}’} & \quad\Rightarrow\quad{} & \mathsf{i{\scriptstyle 64}} {.} {\mathsf{mul\_wide}}{\mathsf{\_}}{\mathsf{u}} \\ \end{array} $$ diff --git a/spectec/test-middlend/TEST.md b/spectec/test-middlend/TEST.md index 758438c24a..d7cecc40a7 100644 --- a/spectec/test-middlend/TEST.md +++ b/spectec/test-middlend/TEST.md @@ -1629,6 +1629,18 @@ syntax binop_(numtype : numtype) | COPYSIGN +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec +syntax wideop_{Inn : Inn}((Inn : Inn <: numtype)) = + | ADD128 + -- if ($sizenn((Inn : Inn <: numtype)) = 64) + | SUB128 + -- if ($sizenn((Inn : Inn <: numtype)) = 64) + +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec +syntax extwideop_{Inn : Inn}((Inn : Inn <: numtype)) = + | MUL_WIDE(sx) + -- if ($sizenn((Inn : Inn <: numtype)) = 64) + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec syntax testop_{Inn : Inn}((Inn : Inn <: numtype)) = | EQZ @@ -2139,6 +2151,8 @@ syntax instr = | TESTOP(numtype : numtype, testop_(numtype)) | RELOP(numtype : numtype, relop_(numtype)) | CVTOP(numtype_1 : numtype, numtype_2 : numtype, cvtop__(numtype_2, numtype_1)) + | WIDEOP(numtype : numtype, wideop_(numtype)) + | EXTWIDEOP(numtype : numtype, extwideop_(numtype)) | VCONST(vectype : vectype, vec_(vectype)) | VVUNOP(vectype : vectype, vvunop : vvunop) | VVBINOP(vectype : vectype, vvbinop : vvbinop) @@ -2219,233 +2233,233 @@ def $free_catch(catch : catch) : free ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec rec { -;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:585.1-585.44 +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:595.1-595.44 def $shift_labelidxs(labelidx*) : labelidx* - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:586.1-586.32 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:596.1-596.32 def $shift_labelidxs([]) = [] - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:587.1-587.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:597.1-597.66 def $shift_labelidxs{`labelidx'*` : labelidx*}([`%`_labelidx(0,)] ++ labelidx'*{labelidx' <- `labelidx'*`}) = $shift_labelidxs(labelidx'*{labelidx' <- `labelidx'*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:588.1-588.91 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:598.1-598.91 def $shift_labelidxs{labelidx : labelidx, `labelidx'*` : labelidx*}([labelidx] ++ labelidx'*{labelidx' <- `labelidx'*`}) = [`%`_labelidx((((labelidx!`%`_labelidx.0 : nat <:> int) - (1 : nat <:> int)) : int <:> nat),)] ++ $shift_labelidxs(labelidx'*{labelidx' <- `labelidx'*`}) } ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec rec { -;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:421.1-421.30 +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:431.1-431.30 def $free_instr(instr : instr) : free - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:436.1-436.26 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:446.1-446.26 def $free_instr(NOP_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:437.1-437.34 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:447.1-447.34 def $free_instr(UNREACHABLE_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:438.1-438.27 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:448.1-448.27 def $free_instr(DROP_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:439.1-439.86 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:449.1-449.86 def $free_instr{`valtype*?` : valtype*?}(SELECT_instr(valtype*{valtype <- `valtype*`}?{`valtype*` <- `valtype*?`})) = $free_opt($free_list($free_valtype(valtype)*{valtype <- `valtype*`})?{`valtype*` <- `valtype*?`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:441.1-441.92 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:451.1-451.92 def $free_instr{blocktype : blocktype, `instr*` : instr*}(BLOCK_instr(blocktype, instr*{instr <- `instr*`})) = $free_blocktype(blocktype) +++ $free_block(instr*{instr <- `instr*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:442.1-442.91 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:452.1-452.91 def $free_instr{blocktype : blocktype, `instr*` : instr*}(LOOP_instr(blocktype, instr*{instr <- `instr*`})) = $free_blocktype(blocktype) +++ $free_block(instr*{instr <- `instr*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:443.1-444.79 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:453.1-454.79 def $free_instr{blocktype : blocktype, `instr_1*` : instr*, `instr_2*` : instr*}(`IF%%ELSE%`_instr(blocktype, instr_1*{instr_1 <- `instr_1*`}, instr_2*{instr_2 <- `instr_2*`})) = $free_blocktype(blocktype) +++ $free_block(instr_1*{instr_1 <- `instr_1*`}) +++ $free_block(instr_2*{instr_2 <- `instr_2*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:446.1-446.56 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:456.1-456.56 def $free_instr{labelidx : labelidx}(BR_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:447.1-447.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:457.1-457.59 def $free_instr{labelidx : labelidx}(BR_IF_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:448.1-449.69 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:458.1-459.69 def $free_instr{`labelidx*` : labelidx*, labelidx' : labelidx}(BR_TABLE_instr(labelidx*{labelidx <- `labelidx*`}, labelidx')) = $free_list($free_labelidx(labelidx)*{labelidx <- `labelidx*`}) +++ $free_labelidx(labelidx') - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:450.1-450.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:460.1-460.64 def $free_instr{labelidx : labelidx}(BR_ON_NULL_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:451.1-451.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:461.1-461.68 def $free_instr{labelidx : labelidx}(BR_ON_NON_NULL_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:452.1-453.83 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:462.1-463.83 def $free_instr{labelidx : labelidx, reftype_1 : reftype, reftype_2 : reftype}(BR_ON_CAST_instr(labelidx, reftype_1, reftype_2)) = $free_labelidx(labelidx) +++ $free_reftype(reftype_1) +++ $free_reftype(reftype_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:454.1-455.83 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:464.1-465.83 def $free_instr{labelidx : labelidx, reftype_1 : reftype, reftype_2 : reftype}(BR_ON_CAST_FAIL_instr(labelidx, reftype_1, reftype_2)) = $free_labelidx(labelidx) +++ $free_reftype(reftype_1) +++ $free_reftype(reftype_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:457.1-457.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:467.1-467.55 def $free_instr{funcidx : funcidx}(CALL_instr(funcidx)) = $free_funcidx(funcidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:458.1-458.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:468.1-468.59 def $free_instr{typeuse : typeuse}(CALL_REF_instr(typeuse)) = $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:459.1-460.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:469.1-470.53 def $free_instr{tableidx : tableidx, typeuse : typeuse}(CALL_INDIRECT_instr(tableidx, typeuse)) = $free_tableidx(tableidx) +++ $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:461.1-461.29 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:471.1-471.29 def $free_instr(RETURN_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:462.1-462.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:472.1-472.62 def $free_instr{funcidx : funcidx}(RETURN_CALL_instr(funcidx)) = $free_funcidx(funcidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:463.1-463.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:473.1-473.66 def $free_instr{typeuse : typeuse}(RETURN_CALL_REF_instr(typeuse)) = $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:464.1-465.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:474.1-475.53 def $free_instr{tableidx : tableidx, typeuse : typeuse}(RETURN_CALL_INDIRECT_instr(tableidx, typeuse)) = $free_tableidx(tableidx) +++ $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:467.1-467.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:477.1-477.53 def $free_instr{tagidx : tagidx}(THROW_instr(tagidx)) = $free_tagidx(tagidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:468.1-468.32 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:478.1-478.32 def $free_instr(THROW_REF_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:469.1-470.99 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:479.1-480.99 def $free_instr{blocktype : blocktype, `catch*` : catch*, `instr*` : instr*}(TRY_TABLE_instr(blocktype, `%`_list(catch*{catch <- `catch*`},), instr*{instr <- `instr*`})) = $free_blocktype(blocktype) +++ $free_list($free_catch(catch)*{catch <- `catch*`}) +++ $free_list($free_instr(instr)*{instr <- `instr*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:472.1-472.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:482.1-482.63 def $free_instr{numtype : numtype, numlit : num_(numtype)}(CONST_instr(numtype, numlit)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:473.1-473.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:483.1-483.60 def $free_instr{numtype : numtype, unop : unop_(numtype)}(UNOP_instr(numtype, unop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:474.1-474.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:484.1-484.62 def $free_instr{numtype : numtype, binop : binop_(numtype)}(BINOP_instr(numtype, binop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:475.1-475.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:485.1-485.64 def $free_instr{numtype : numtype, testop : testop_(numtype)}(TESTOP_instr(numtype, testop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:476.1-476.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:486.1-486.62 def $free_instr{numtype : numtype, relop : relop_(numtype)}(RELOP_instr(numtype, relop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:477.1-478.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:487.1-488.55 def $free_instr{numtype_1 : numtype, numtype_2 : numtype, cvtop : cvtop__(numtype_2, numtype_1)}(CVTOP_instr(numtype_1, numtype_2, cvtop)) = $free_numtype(numtype_1) +++ $free_numtype(numtype_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:480.1-480.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:490.1-490.64 def $free_instr{vectype : vectype, veclit : vec_(vectype)}(VCONST_instr(vectype, veclit)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:481.1-481.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:491.1-491.64 def $free_instr{vectype : vectype, vvunop : vvunop}(VVUNOP_instr(vectype, vvunop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:482.1-482.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:492.1-492.66 def $free_instr{vectype : vectype, vvbinop : vvbinop}(VVBINOP_instr(vectype, vvbinop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:483.1-483.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:493.1-493.68 def $free_instr{vectype : vectype, vvternop : vvternop}(VVTERNOP_instr(vectype, vvternop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:484.1-484.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:494.1-494.68 def $free_instr{vectype : vectype, vvtestop : vvtestop}(VVTESTOP_instr(vectype, vvtestop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:485.1-485.56 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:495.1-495.56 def $free_instr{shape : shape, vunop : vunop_(shape)}(VUNOP_instr(shape, vunop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:486.1-486.58 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:496.1-496.58 def $free_instr{shape : shape, vbinop : vbinop_(shape)}(VBINOP_instr(shape, vbinop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:487.1-487.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:497.1-497.60 def $free_instr{shape : shape, vternop : vternop_(shape)}(VTERNOP_instr(shape, vternop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:488.1-488.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:498.1-498.60 def $free_instr{shape : shape, vtestop : vtestop_(shape)}(VTESTOP_instr(shape, vtestop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:489.1-489.58 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:499.1-499.58 def $free_instr{shape : shape, vrelop : vrelop_(shape)}(VRELOP_instr(shape, vrelop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:490.1-490.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:500.1-500.64 def $free_instr{ishape : ishape, vshiftop : vshiftop_(ishape)}(VSHIFTOP_instr(ishape, vshiftop)) = $free_shape(ishape!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:491.1-491.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:501.1-501.55 def $free_instr{ishape : ishape}(VBITMASK_instr(ishape)) = $free_shape(ishape!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:492.1-492.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:502.1-502.66 def $free_instr{bshape : bshape, vswizzlop : vswizzlop_(bshape)}(VSWIZZLOP_instr(bshape, vswizzlop)) = $free_shape(bshape!`%`_bshape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:493.1-493.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:503.1-503.64 def $free_instr{bshape : bshape, `laneidx*` : laneidx*}(VSHUFFLE_instr(bshape, laneidx*{laneidx <- `laneidx*`})) = $free_shape(bshape!`%`_bshape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:494.1-495.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:504.1-505.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, vextunop : vextunop__(ishape_2, ishape_1)}(VEXTUNOP_instr(ishape_1, ishape_2, vextunop)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:496.1-497.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:506.1-507.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, vextbinop : vextbinop__(ishape_2, ishape_1)}(VEXTBINOP_instr(ishape_1, ishape_2, vextbinop)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:498.1-499.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:508.1-509.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, vextternop : vextternop__(ishape_2, ishape_1)}(VEXTTERNOP_instr(ishape_1, ishape_2, vextternop)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:500.1-501.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:510.1-511.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, sx : sx}(VNARROW_instr(ishape_1, ishape_2, sx)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:502.1-503.47 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:512.1-513.47 def $free_instr{shape_1 : shape, shape_2 : shape, vcvtop : vcvtop__(shape_2, shape_1)}(VCVTOP_instr(shape_1, shape_2, vcvtop)) = $free_shape(shape_1) +++ $free_shape(shape_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:504.1-504.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:514.1-514.51 def $free_instr{shape : shape}(VSPLAT_instr(shape)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:505.1-505.70 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:515.1-515.70 def $free_instr{shape : shape, `sx?` : sx?, laneidx : laneidx}(VEXTRACT_LANE_instr(shape, sx?{sx <- `sx?`}, laneidx)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:506.1-506.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:516.1-516.66 def $free_instr{shape : shape, laneidx : laneidx}(VREPLACE_LANE_instr(shape, laneidx)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:508.1-508.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:518.1-518.62 def $free_instr{heaptype : heaptype}(`REF.NULL`_instr(heaptype)) = $free_heaptype(heaptype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:509.1-509.34 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:519.1-519.34 def $free_instr(`REF.IS_NULL`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:510.1-510.38 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:520.1-520.38 def $free_instr(`REF.AS_NON_NULL`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:511.1-511.29 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:521.1-521.29 def $free_instr(`REF.EQ`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:512.1-512.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:522.1-522.59 def $free_instr{reftype : reftype}(`REF.TEST`_instr(reftype)) = $free_reftype(reftype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:513.1-513.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:523.1-523.59 def $free_instr{reftype : reftype}(`REF.CAST`_instr(reftype)) = $free_reftype(reftype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:514.1-514.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:524.1-524.59 def $free_instr{funcidx : funcidx}(`REF.FUNC`_instr(funcidx)) = $free_funcidx(funcidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:515.1-515.30 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:525.1-525.30 def $free_instr(`REF.I31`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:517.1-517.33 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:527.1-527.33 def $free_instr{sx : sx}(`I31.GET`_instr(sx)) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:519.1-519.61 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:529.1-529.61 def $free_instr{typeidx : typeidx}(`STRUCT.NEW`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:520.1-520.69 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:530.1-530.69 def $free_instr{typeidx : typeidx}(`STRUCT.NEW_DEFAULT`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:521.1-521.69 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:531.1-531.69 def $free_instr{`sx?` : sx?, typeidx : typeidx, u32 : u32}(`STRUCT.GET`_instr(sx?{sx <- `sx?`}, typeidx, u32)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:522.1-522.65 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:532.1-532.65 def $free_instr{typeidx : typeidx, u32 : u32}(`STRUCT.SET`_instr(typeidx, u32)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:524.1-524.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:534.1-534.60 def $free_instr{typeidx : typeidx}(`ARRAY.NEW`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:525.1-525.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:535.1-535.68 def $free_instr{typeidx : typeidx}(`ARRAY.NEW_DEFAULT`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:526.1-526.70 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:536.1-536.70 def $free_instr{typeidx : typeidx, u32 : u32}(`ARRAY.NEW_FIXED`_instr(typeidx, u32)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:527.1-528.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:537.1-538.51 def $free_instr{typeidx : typeidx, dataidx : dataidx}(`ARRAY.NEW_DATA`_instr(typeidx, dataidx)) = $free_typeidx(typeidx) +++ $free_dataidx(dataidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:529.1-530.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:539.1-540.51 def $free_instr{typeidx : typeidx, elemidx : elemidx}(`ARRAY.NEW_ELEM`_instr(typeidx, elemidx)) = $free_typeidx(typeidx) +++ $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:531.1-531.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:541.1-541.64 def $free_instr{`sx?` : sx?, typeidx : typeidx}(`ARRAY.GET`_instr(sx?{sx <- `sx?`}, typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:532.1-532.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:542.1-542.60 def $free_instr{typeidx : typeidx}(`ARRAY.SET`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:533.1-533.32 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:543.1-543.32 def $free_instr(`ARRAY.LEN`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:534.1-534.61 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:544.1-544.61 def $free_instr{typeidx : typeidx}(`ARRAY.FILL`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:535.1-536.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:545.1-546.55 def $free_instr{typeidx_1 : typeidx, typeidx_2 : typeidx}(`ARRAY.COPY`_instr(typeidx_1, typeidx_2)) = $free_typeidx(typeidx_1) +++ $free_typeidx(typeidx_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:537.1-538.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:547.1-548.51 def $free_instr{typeidx : typeidx, dataidx : dataidx}(`ARRAY.INIT_DATA`_instr(typeidx, dataidx)) = $free_typeidx(typeidx) +++ $free_dataidx(dataidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:539.1-540.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:549.1-550.51 def $free_instr{typeidx : typeidx, elemidx : elemidx}(`ARRAY.INIT_ELEM`_instr(typeidx, elemidx)) = $free_typeidx(typeidx) +++ $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:542.1-542.41 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:552.1-552.41 def $free_instr(`EXTERN.CONVERT_ANY`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:543.1-543.41 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:553.1-553.41 def $free_instr(`ANY.CONVERT_EXTERN`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:545.1-545.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:555.1-555.63 def $free_instr{localidx : localidx}(`LOCAL.GET`_instr(localidx)) = $free_localidx(localidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:546.1-546.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:556.1-556.63 def $free_instr{localidx : localidx}(`LOCAL.SET`_instr(localidx)) = $free_localidx(localidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:547.1-547.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:557.1-557.63 def $free_instr{localidx : localidx}(`LOCAL.TEE`_instr(localidx)) = $free_localidx(localidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:549.1-549.67 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:559.1-559.67 def $free_instr{globalidx : globalidx}(`GLOBAL.GET`_instr(globalidx)) = $free_globalidx(globalidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:550.1-550.67 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:560.1-560.67 def $free_instr{globalidx : globalidx}(`GLOBAL.SET`_instr(globalidx)) = $free_globalidx(globalidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:552.1-552.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:562.1-562.63 def $free_instr{tableidx : tableidx}(`TABLE.GET`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:553.1-553.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:563.1-563.63 def $free_instr{tableidx : tableidx}(`TABLE.SET`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:554.1-554.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:564.1-564.64 def $free_instr{tableidx : tableidx}(`TABLE.SIZE`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:555.1-555.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:565.1-565.64 def $free_instr{tableidx : tableidx}(`TABLE.GROW`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:556.1-556.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:566.1-566.64 def $free_instr{tableidx : tableidx}(`TABLE.FILL`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:557.1-558.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:567.1-568.59 def $free_instr{tableidx_1 : tableidx, tableidx_2 : tableidx}(`TABLE.COPY`_instr(tableidx_1, tableidx_2)) = $free_tableidx(tableidx_1) +++ $free_tableidx(tableidx_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:559.1-560.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:569.1-570.53 def $free_instr{tableidx : tableidx, elemidx : elemidx}(`TABLE.INIT`_instr(tableidx, elemidx)) = $free_tableidx(tableidx) +++ $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:561.1-561.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:571.1-571.60 def $free_instr{elemidx : elemidx}(`ELEM.DROP`_instr(elemidx)) = $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:563.1-564.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:573.1-574.49 def $free_instr{numtype : numtype, `loadop?` : loadop_(numtype)?, memidx : memidx, memarg : memarg}(LOAD_instr(numtype, loadop?{loadop <- `loadop?`}, memidx, memarg)) = $free_numtype(numtype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:565.1-566.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:575.1-576.49 def $free_instr{numtype : numtype, `storeop?` : storeop_(numtype)?, memidx : memidx, memarg : memarg}(STORE_instr(numtype, storeop?{storeop <- `storeop?`}, memidx, memarg)) = $free_numtype(numtype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:567.1-568.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:577.1-578.49 def $free_instr{vectype : vectype, `vloadop?` : vloadop_(vectype)?, memidx : memidx, memarg : memarg}(VLOAD_instr(vectype, vloadop?{vloadop <- `vloadop?`}, memidx, memarg)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:569.1-570.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:579.1-580.49 def $free_instr{vectype : vectype, sz : sz, memidx : memidx, memarg : memarg, laneidx : laneidx}(VLOAD_LANE_instr(vectype, sz, memidx, memarg, laneidx)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:571.1-572.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:581.1-582.49 def $free_instr{vectype : vectype, memidx : memidx, memarg : memarg}(VSTORE_instr(vectype, memidx, memarg)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:573.1-574.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:583.1-584.49 def $free_instr{vectype : vectype, sz : sz, memidx : memidx, memarg : memarg, laneidx : laneidx}(VSTORE_LANE_instr(vectype, sz, memidx, memarg, laneidx)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:575.1-575.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:585.1-585.59 def $free_instr{memidx : memidx}(`MEMORY.SIZE`_instr(memidx)) = $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:576.1-576.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:586.1-586.59 def $free_instr{memidx : memidx}(`MEMORY.GROW`_instr(memidx)) = $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:577.1-577.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:587.1-587.59 def $free_instr{memidx : memidx}(`MEMORY.FILL`_instr(memidx)) = $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:578.1-579.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:588.1-589.51 def $free_instr{memidx_1 : memidx, memidx_2 : memidx}(`MEMORY.COPY`_instr(memidx_1, memidx_2)) = $free_memidx(memidx_1) +++ $free_memidx(memidx_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:580.1-581.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:590.1-591.49 def $free_instr{memidx : memidx, dataidx : dataidx}(`MEMORY.INIT`_instr(memidx, dataidx)) = $free_memidx(memidx) +++ $free_dataidx(dataidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:582.1-582.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:592.1-592.60 def $free_instr{dataidx : dataidx}(`DATA.DROP`_instr(dataidx)) = $free_dataidx(dataidx) -;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:422.1-422.31 +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:432.1-432.31 def $free_block(instr*) : free - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:590.1-591.47 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:600.1-601.47 def $free_block{`instr*` : instr*, free : free}(instr*{instr <- `instr*`}) = free[LABELS_free = $shift_labelidxs(free.LABELS_free)] -- if (free = $free_list($free_instr(instr)*{instr <- `instr*`})) } @@ -3889,123 +3903,131 @@ relation Instr_ok: `%|-%:%`(context, instr, instrtype) rule cvtop{C : context, nt_1 : numtype, nt_2 : numtype, cvtop : cvtop__(nt_2, nt_1)}: `%|-%:%`(C, CVTOP_instr(nt_1, nt_2, cvtop), `%->_%%`_instrtype(`%`_resulttype([(nt_2 : numtype <: valtype)],), [], `%`_resulttype([(nt_1 : numtype <: valtype)],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:541.1-542.35 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:538.1-539.50 + rule wideop{C : context, nt : numtype, wideop_nt : wideop_(nt)}: + `%|-%:%`(C, WIDEOP_instr(nt, wideop_nt), `%->_%%`_instrtype(`%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype) (nt : numtype <: valtype) (nt : numtype <: valtype)],), [], `%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype)],))) + + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:541.1-542.50 + rule extwideop{C : context, nt : numtype, extwideop_nt : extwideop_(nt)}: + `%|-%:%`(C, EXTWIDEOP_instr(nt, extwideop_nt), `%->_%%`_instrtype(`%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype)],), [], `%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype)],))) + + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:547.1-548.35 rule vconst{C : context, c : vec_(V128_Vnn)}: `%|-%:%`(C, VCONST_instr(V128_vectype, c), `%->_%%`_instrtype(`%`_resulttype([],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:544.1-545.41 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:550.1-551.41 rule vvunop{C : context, vvunop : vvunop}: `%|-%:%`(C, VVUNOP_instr(V128_vectype, vvunop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:547.1-548.48 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:553.1-554.48 rule vvbinop{C : context, vvbinop : vvbinop}: `%|-%:%`(C, VVBINOP_instr(V128_vectype, vvbinop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:550.1-551.55 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:556.1-557.55 rule vvternop{C : context, vvternop : vvternop}: `%|-%:%`(C, VVTERNOP_instr(V128_vectype, vvternop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:553.1-554.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:559.1-560.44 rule vvtestop{C : context, vvtestop : vvtestop}: `%|-%:%`(C, VVTESTOP_instr(V128_vectype, vvtestop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([I32_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:556.1-557.37 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:562.1-563.37 rule vunop{C : context, sh : shape, vunop : vunop_(sh)}: `%|-%:%`(C, VUNOP_instr(sh, vunop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:559.1-560.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:565.1-566.44 rule vbinop{C : context, sh : shape, vbinop : vbinop_(sh)}: `%|-%:%`(C, VBINOP_instr(sh, vbinop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:562.1-563.51 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:568.1-569.51 rule vternop{C : context, sh : shape, vternop : vternop_(sh)}: `%|-%:%`(C, VTERNOP_instr(sh, vternop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:565.1-566.40 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:571.1-572.40 rule vtestop{C : context, sh : shape, vtestop : vtestop_(sh)}: `%|-%:%`(C, VTESTOP_instr(sh, vtestop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([I32_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:568.1-569.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:574.1-575.44 rule vrelop{C : context, sh : shape, vrelop : vrelop_(sh)}: `%|-%:%`(C, VRELOP_instr(sh, vrelop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:571.1-572.47 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:577.1-578.47 rule vshiftop{C : context, sh : ishape, vshiftop : vshiftop_(sh)}: `%|-%:%`(C, VSHIFTOP_instr(sh, vshiftop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype I32_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:574.1-575.33 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:580.1-581.33 rule vbitmask{C : context, sh : ishape}: `%|-%:%`(C, VBITMASK_instr(sh), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([I32_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:577.1-578.50 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:583.1-584.50 rule vswizzlop{C : context, sh : bshape, vswizzlop : vswizzlop_(sh)}: `%|-%:%`(C, VSWIZZLOP_instr(sh, vswizzlop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:580.1-582.29 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:586.1-588.29 rule vshuffle{C : context, sh : bshape, `i*` : laneidx*}: `%|-%:%`(C, VSHUFFLE_instr(sh, i*{i <- `i*`}), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) -- (if (i!`%`_laneidx.0 < (2 * $dim(sh!`%`_bshape.0)!`%`_dim.0)))*{i <- `i*`} - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:584.1-585.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:590.1-591.44 rule vsplat{C : context, sh : shape}: `%|-%:%`(C, VSPLAT_instr(sh), `%->_%%`_instrtype(`%`_resulttype([($unpackshape(sh) : numtype <: valtype)],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:587.1-589.21 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:593.1-595.21 rule vextract_lane{C : context, sh : shape, `sx?` : sx?, i : laneidx}: `%|-%:%`(C, VEXTRACT_LANE_instr(sh, sx?{sx <- `sx?`}, i), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([($unpackshape(sh) : numtype <: valtype)],))) -- if (i!`%`_laneidx.0 < $dim(sh)!`%`_dim.0) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:591.1-593.21 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:597.1-599.21 rule vreplace_lane{C : context, sh : shape, i : laneidx}: `%|-%:%`(C, VREPLACE_LANE_instr(sh, i), `%->_%%`_instrtype(`%`_resulttype([V128_valtype ($unpackshape(sh) : numtype <: valtype)],), [], `%`_resulttype([V128_valtype],))) -- if (i!`%`_laneidx.0 < $dim(sh)!`%`_dim.0) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:595.1-596.50 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:601.1-602.50 rule vextunop{C : context, sh_1 : ishape, sh_2 : ishape, vextunop : vextunop__(sh_2, sh_1)}: `%|-%:%`(C, VEXTUNOP_instr(sh_1, sh_2, vextunop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:598.1-599.57 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:604.1-605.57 rule vextbinop{C : context, sh_1 : ishape, sh_2 : ishape, vextbinop : vextbinop__(sh_2, sh_1)}: `%|-%:%`(C, VEXTBINOP_instr(sh_1, sh_2, vextbinop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:601.1-602.64 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:607.1-608.64 rule vextternop{C : context, sh_1 : ishape, sh_2 : ishape, vextternop : vextternop__(sh_2, sh_1)}: `%|-%:%`(C, VEXTTERNOP_instr(sh_1, sh_2, vextternop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:604.1-605.48 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:610.1-611.48 rule vnarrow{C : context, sh_1 : ishape, sh_2 : ishape, sx : sx}: `%|-%:%`(C, VNARROW_instr(sh_1, sh_2, sx), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:607.1-608.46 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:613.1-614.46 rule vcvtop{C : context, sh_1 : shape, sh_2 : shape, vcvtop : vcvtop__(sh_2, sh_1)}: `%|-%:%`(C, VCVTOP_instr(sh_1, sh_2, vcvtop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:6.1-6.96 relation Instrs_ok: `%|-%:%`(context, instr*, instrtype) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:613.1-614.24 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:619.1-620.24 rule empty{C : context}: `%|-%:%`(C, [], `%->_%%`_instrtype(`%`_resulttype([],), [], `%`_resulttype([],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:616.1-618.46 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:622.1-624.46 rule instr{C : context, instr : instr, `t_1*` : valtype*, `x*` : idx*, `t_2*` : valtype*}: `%|-%:%`(C, [instr], `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) -- Instr_ok: `%|-%:%`(C, instr, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:621.1-625.82 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:627.1-631.82 rule seq{C : context, `instr_1*` : instr*, `instr_2*` : instr*, `t_1*` : valtype*, `x_1*` : idx*, `x_2*` : idx*, `t_3*` : valtype*, `t_2*` : valtype*, `init*` : init*, `t*` : valtype*}: `%|-%:%`(C, instr_1*{instr_1 <- `instr_1*`} ++ instr_2*{instr_2 <- `instr_2*`}, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x_1*{x_1 <- `x_1*`} ++ x_2*{x_2 <- `x_2*`}, `%`_resulttype(t_3*{t_3 <- `t_3*`},))) -- Instrs_ok: `%|-%:%`(C, instr_1*{instr_1 <- `instr_1*`}, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x_1*{x_1 <- `x_1*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) -- (if (C.LOCALS_context[x_1!`%`_idx.0] = `%%`_localtype(init, t)))*{init <- `init*`, t <- `t*`, x_1 <- `x_1*`} -- Instrs_ok: `%|-%:%`($with_locals(C, x_1*{x_1 <- `x_1*`}, `%%`_localtype(SET_init, t)*{t <- `t*`}), instr_2*{instr_2 <- `instr_2*`}, `%->_%%`_instrtype(`%`_resulttype(t_2*{t_2 <- `t_2*`},), x_2*{x_2 <- `x_2*`}, `%`_resulttype(t_3*{t_3 <- `t_3*`},))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:627.1-631.33 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:633.1-637.33 rule sub{C : context, `instr*` : instr*, it' : instrtype, it : instrtype}: `%|-%:%`(C, instr*{instr <- `instr*`}, it') -- Instrs_ok: `%|-%:%`(C, instr*{instr <- `instr*`}, it) -- Instrtype_sub: `%|-%<:%`(C, it, it') -- Instrtype_ok: `%|-%:OK`(C, it') - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:634.1-637.33 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:640.1-643.33 rule frame{C : context, `instr*` : instr*, `t*` : valtype*, `t_1*` : valtype*, `x*` : idx*, `t_2*` : valtype*}: `%|-%:%`(C, instr*{instr <- `instr*`}, `%->_%%`_instrtype(`%`_resulttype(t*{t <- `t*`} ++ t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t*{t <- `t*`} ++ t_2*{t_2 <- `t_2*`},))) -- Instrs_ok: `%|-%:%`(C, instr*{instr <- `instr*`}, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) @@ -4966,6 +4988,33 @@ def $cvtop__(numtype_1 : numtype, numtype_2 : numtype, cvtop__ : cvtop__(numtype def $cvtop__{Fnn_1 : Fnn, Inn_2 : Inn, f_1 : num_((Fnn_1 : Fnn <: numtype))}((Fnn_1 : Fnn <: numtype), (Inn_2 : Inn <: numtype), REINTERPRET_cvtop__, f_1) = [$reinterpret__((Fnn_1 : Fnn <: numtype), (Inn_2 : Inn <: numtype), f_1)] -- if ($size((Fnn_1 : Fnn <: numtype)) = $size((Inn_2 : Inn <: numtype))) +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $iconcat_(numtype : numtype, N : N, num_ : num_(numtype), num_ : num_(numtype)) : iN(N) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $iconcat_{Inn : Inn, N : N, i_1 : num_((Inn : Inn <: numtype)), i_2 : num_((Inn : Inn <: numtype))}((Inn : Inn <: numtype), N, i_1, i_2) = $ior_(N, $iextend_(N, $sizenn((Inn : Inn <: numtype)), U_sx, `%`_iN(i_1!`%`_num_.0,)), $ishl_(N, $iextend_(N, $sizenn((Inn : Inn <: numtype)), U_sx, `%`_iN(i_2!`%`_num_.0,)), `%`_u32($sizenn((Inn : Inn <: numtype)),))) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $isplit_(numtype : numtype, N : N, iN : iN(N)) : (num_(numtype), num_(numtype)) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $isplit_{Inn : Inn, N : N, i_1 : iN(N)}((Inn : Inn <: numtype), N, i_1) = ($wrap__(N, $sizenn((Inn : Inn <: numtype)), i_1), $wrap__(N, $sizenn((Inn : Inn <: numtype)), $ishr_(N, U_sx, i_1, `%`_u32($sizenn((Inn : Inn <: numtype)),)))) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $wideop_(numtype : numtype, N : N, wideop_ : wideop_(numtype), iN : iN(N), iN : iN(N)) : iN(N) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $wideop_{Inn : Inn, N : N, i_1 : iN(N), i_2 : iN(N)}((Inn : Inn <: numtype), N, ADD128_wideop_, i_1, i_2) = $iadd_(N, i_1, i_2) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $wideop_{Inn : Inn, N : N, i_1 : iN(N), i_2 : iN(N)}((Inn : Inn <: numtype), N, SUB128_wideop_, i_1, i_2) = $isub_(N, i_1, i_2) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $wideop__(numtype : numtype, wideop_ : wideop_(numtype), num_ : num_(numtype), num_ : num_(numtype), num_ : num_(numtype), num_ : num_(numtype)) : (num_(numtype), num_(numtype)) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $wideop__{Inn : Inn, wideop : wideop_((Inn : Inn <: numtype)), i_1 : num_((Inn : Inn <: numtype)), i_2 : num_((Inn : Inn <: numtype)), i_3 : num_((Inn : Inn <: numtype)), i_4 : num_((Inn : Inn <: numtype))}((Inn : Inn <: numtype), wideop, i_1, i_2, i_3, i_4) = $isplit_((Inn : Inn <: numtype), 128, $wideop_((Inn : Inn <: numtype), 128, wideop, $iconcat_((Inn : Inn <: numtype), 128, i_1, i_2), $iconcat_((Inn : Inn <: numtype), 128, i_3, i_4))) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $extwideop__(numtype : numtype, extwideop_ : extwideop_(numtype), num_ : num_(numtype), num_ : num_(numtype)) : (num_(numtype), num_(numtype)) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $extwideop__{Inn : Inn, sx : sx, i_1 : num_((Inn : Inn <: numtype)), i_2 : num_((Inn : Inn <: numtype))}((Inn : Inn <: numtype), MUL_WIDE_extwideop_(sx), i_1, i_2) = $isplit_((Inn : Inn <: numtype), 128, $imul_(128, $iextend_(128, $sizenn((Inn : Inn <: numtype)), sx, `%`_iN(i_1!`%`_num_.0,)), $iextend_(128, $sizenn((Inn : Inn <: numtype)), sx, `%`_iN(i_2!`%`_num_.0,)))) + ;; ../../../../specification/wasm-latest/3.2-numerics.vector.spectec def $lanes_(shape : shape, vec_ : vec_(V128_Vnn)) : lane_($lanetype(shape))* @@ -6281,6 +6330,16 @@ relation Step_pure: `%~>%`(instr*, instr*) `%~>%`([CONST_instr(nt_1, c_1) CVTOP_instr(nt_2, nt_1, cvtop)], [TRAP_instr]) -- if ($cvtop__(nt_1, nt_2, cvtop, c_1) = []) + ;; ../../../../specification/wasm-latest/4.3-execution.instructions.spectec + rule wideop{nt : numtype, c_1 : num_(nt), c_2 : num_(nt), c_3 : num_(nt), c_4 : num_(nt), wideop_nt : wideop_(nt), c_5 : num_(nt), c_6 : num_(nt)}: + `%~>%`([CONST_instr(nt, c_1) CONST_instr(nt, c_2) CONST_instr(nt, c_3) CONST_instr(nt, c_4) WIDEOP_instr(nt, wideop_nt)], [CONST_instr(nt, c_5) CONST_instr(nt, c_6)]) + -- if ((c_5, c_6) <- [$wideop__(nt, wideop_nt, c_1, c_2, c_3, c_4)]) + + ;; ../../../../specification/wasm-latest/4.3-execution.instructions.spectec + rule extwideop{nt : numtype, c_1 : num_(nt), c_2 : num_(nt), extwideop_nt : extwideop_(nt), c_5 : num_(nt), c_6 : num_(nt)}: + `%~>%`([CONST_instr(nt, c_1) CONST_instr(nt, c_2) EXTWIDEOP_instr(nt, extwideop_nt)], [CONST_instr(nt, c_5) CONST_instr(nt, c_6)]) + -- if ((c_5, c_6) <- [$extwideop__(nt, extwideop_nt, c_1, c_2)]) + ;; ../../../../specification/wasm-latest/4.3-execution.instructions.spectec rule vvunop{c_1 : vec_(V128_Vnn), vvunop : vvunop, c : vec_(V128_Vnn)}: `%~>%`([VCONST_instr(V128_vectype, c_1) VVUNOP_instr(V128_vectype, vvunop)], [VCONST_instr(V128_vectype, c)]) @@ -8607,7 +8666,7 @@ grammar Blaneidx : laneidx ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec rec { -;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:793.1-807.71 +;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:800.1-814.71 grammar Binstr : instr ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:8.5-8.24 prod 0x00 => UNREACHABLE_instr @@ -9093,517 +9152,525 @@ grammar Binstr : instr prod {{0xFC} {`%`_u32(6,):Bu32}} => CVTOP_instr(I64_numtype, F64_numtype, TRUNC_SAT_cvtop__(S_sx)) ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:386.5-386.45 prod {{0xFC} {`%`_u32(7,):Bu32}} => CVTOP_instr(I64_numtype, F64_numtype, TRUNC_SAT_cvtop__(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:396.5-396.50 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:390.5-390.38 + prod {{0xFC} {`%`_u32(13,):Bu32}} => WIDEOP_instr(I64_numtype, ADD128_wideop_) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:391.5-391.38 + prod {{0xFC} {`%`_u32(14,):Bu32}} => WIDEOP_instr(I64_numtype, SUB128_wideop_) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:392.5-392.45 + prod {{0xFC} {`%`_u32(15,):Bu32}} => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(S_sx)) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:393.5-393.45 + prod {{0xFC} {`%`_u32(16,):Bu32}} => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(U_sx)) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:403.5-403.50 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(0,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:397.5-397.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:404.5-404.70 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(1,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(8,), `%`_M(8,), S_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:398.5-398.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:405.5-405.70 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(2,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(8,), `%`_M(8,), U_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:399.5-399.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:406.5-406.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(3,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(16,), `%`_M(4,), S_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:400.5-400.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:407.5-407.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(4,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(16,), `%`_M(4,), U_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:401.5-401.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:408.5-408.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(5,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(32,), `%`_M(2,), S_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:402.5-402.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:409.5-409.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(6,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(32,), `%`_M(2,), U_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:403.5-403.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:410.5-410.61 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(7,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(8,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:404.5-404.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:411.5-411.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(8,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(16,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:405.5-405.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:412.5-412.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(9,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(32,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:406.5-406.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:413.5-413.63 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(10,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(64,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:407.5-407.52 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:414.5-414.52 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(11,):Bu32} {(x, ao):Bmemarg}} => VSTORE_instr(V128_vectype, x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:408.5-408.72 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:415.5-415.72 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(84,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(8,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:409.5-409.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:416.5-416.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(85,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(16,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:410.5-410.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:417.5-417.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(86,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(32,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:411.5-411.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:418.5-418.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(87,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(64,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:412.5-412.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:419.5-419.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(88,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(8,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:413.5-413.74 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:420.5-420.74 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(89,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(16,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:414.5-414.74 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:421.5-421.74 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(90,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(32,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:415.5-415.74 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:422.5-422.74 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(91,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(64,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:416.5-416.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:423.5-423.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(92,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(ZERO_vloadop_(`%`_sz(32,),)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:417.5-417.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:424.5-424.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(93,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(ZERO_vloadop_(`%`_sz(64,),)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:421.5-421.72 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:428.5-428.72 prod{`b*` : byte*} {{0xFD} {`%`_u32(12,):Bu32} {b:Bbyte^16{b <- `b*`}}} => VCONST_instr(V128_vectype, $inv_ibytes_(128, b^16{b <- `b*`})) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:425.5-425.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:432.5-432.61 prod{`l*` : labelidx*} {{0xFD} {`%`_u32(13,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx^16{l <- `l*`}}} => VSHUFFLE_instr(`%`_bshape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), `%`_laneidx(l!`%`_labelidx.0,)^16{l <- `l*`}) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:426.5-426.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:433.5-433.49 prod {{0xFD} {`%`_u32(14,):Bu32}} => VSWIZZLOP_instr(`%`_bshape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SWIZZLE_vswizzlop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:427.5-427.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:434.5-434.58 prod {{0xFD} {`%`_u32(256,):Bu32}} => VSWIZZLOP_instr(`%`_bshape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), RELAXED_SWIZZLE_vswizzlop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:431.5-431.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:438.5-438.38 prod {{0xFD} {`%`_u32(15,):Bu32}} => VSPLAT_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:432.5-432.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:439.5-439.38 prod {{0xFD} {`%`_u32(16,):Bu32}} => VSPLAT_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:433.5-433.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:440.5-440.38 prod {{0xFD} {`%`_u32(17,):Bu32}} => VSPLAT_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:434.5-434.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:441.5-441.38 prod {{0xFD} {`%`_u32(18,):Bu32}} => VSPLAT_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:435.5-435.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:442.5-442.38 prod {{0xFD} {`%`_u32(19,):Bu32}} => VSPLAT_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:436.5-436.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:443.5-443.38 prod {{0xFD} {`%`_u32(20,):Bu32}} => VSPLAT_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:440.5-440.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:447.5-447.60 prod{l : labelidx} {{0xFD} {`%`_u32(21,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ?(S_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:441.5-441.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:448.5-448.60 prod{l : labelidx} {{0xFD} {`%`_u32(22,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ?(U_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:442.5-442.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:449.5-449.58 prod{l : labelidx} {{0xFD} {`%`_u32(23,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:443.5-443.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:450.5-450.60 prod{l : labelidx} {{0xFD} {`%`_u32(24,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ?(S_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:444.5-444.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:451.5-451.60 prod{l : labelidx} {{0xFD} {`%`_u32(25,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ?(U_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:445.5-445.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:452.5-452.58 prod{l : labelidx} {{0xFD} {`%`_u32(26,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:446.5-446.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:453.5-453.58 prod{l : labelidx} {{0xFD} {`%`_u32(27,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:447.5-447.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:454.5-454.58 prod{l : labelidx} {{0xFD} {`%`_u32(28,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:448.5-448.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:455.5-455.58 prod{l : labelidx} {{0xFD} {`%`_u32(29,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:449.5-449.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:456.5-456.58 prod{l : labelidx} {{0xFD} {`%`_u32(30,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:450.5-450.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:457.5-457.58 prod{l : labelidx} {{0xFD} {`%`_u32(31,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:451.5-451.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:458.5-458.58 prod{l : labelidx} {{0xFD} {`%`_u32(32,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:452.5-452.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:459.5-459.58 prod{l : labelidx} {{0xFD} {`%`_u32(33,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:453.5-453.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:460.5-460.58 prod{l : labelidx} {{0xFD} {`%`_u32(34,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:457.5-457.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:464.5-464.41 prod {{0xFD} {`%`_u32(35,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:458.5-458.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:465.5-465.41 prod {{0xFD} {`%`_u32(36,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:459.5-459.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:466.5-466.43 prod {{0xFD} {`%`_u32(37,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:460.5-460.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:467.5-467.43 prod {{0xFD} {`%`_u32(38,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:461.5-461.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:468.5-468.43 prod {{0xFD} {`%`_u32(39,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:462.5-462.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:469.5-469.43 prod {{0xFD} {`%`_u32(40,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:463.5-463.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:470.5-470.43 prod {{0xFD} {`%`_u32(41,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:464.5-464.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:471.5-471.43 prod {{0xFD} {`%`_u32(42,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:465.5-465.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:472.5-472.43 prod {{0xFD} {`%`_u32(43,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:466.5-466.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:473.5-473.43 prod {{0xFD} {`%`_u32(44,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:470.5-470.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:477.5-477.41 prod {{0xFD} {`%`_u32(45,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:471.5-471.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:478.5-478.41 prod {{0xFD} {`%`_u32(46,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:472.5-472.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:479.5-479.43 prod {{0xFD} {`%`_u32(47,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:473.5-473.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:480.5-480.43 prod {{0xFD} {`%`_u32(48,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:474.5-474.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:481.5-481.43 prod {{0xFD} {`%`_u32(49,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:475.5-475.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:482.5-482.43 prod {{0xFD} {`%`_u32(50,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:476.5-476.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:483.5-483.43 prod {{0xFD} {`%`_u32(51,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:477.5-477.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:484.5-484.43 prod {{0xFD} {`%`_u32(52,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:478.5-478.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:485.5-485.43 prod {{0xFD} {`%`_u32(53,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:479.5-479.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:486.5-486.43 prod {{0xFD} {`%`_u32(54,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:483.5-483.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:490.5-490.41 prod {{0xFD} {`%`_u32(55,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:484.5-484.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:491.5-491.41 prod {{0xFD} {`%`_u32(56,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:485.5-485.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:492.5-492.43 prod {{0xFD} {`%`_u32(57,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:486.5-486.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:493.5-493.43 prod {{0xFD} {`%`_u32(58,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:487.5-487.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:494.5-494.43 prod {{0xFD} {`%`_u32(59,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:488.5-488.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:495.5-495.43 prod {{0xFD} {`%`_u32(60,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:489.5-489.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:496.5-496.43 prod {{0xFD} {`%`_u32(61,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:490.5-490.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:497.5-497.43 prod {{0xFD} {`%`_u32(62,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:491.5-491.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:498.5-498.43 prod {{0xFD} {`%`_u32(63,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:492.5-492.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:499.5-499.43 prod {{0xFD} {`%`_u32(64,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:496.5-496.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:503.5-503.41 prod {{0xFD} {`%`_u32(65,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:497.5-497.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:504.5-504.41 prod {{0xFD} {`%`_u32(66,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:498.5-498.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:505.5-505.41 prod {{0xFD} {`%`_u32(67,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), LT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:499.5-499.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:506.5-506.41 prod {{0xFD} {`%`_u32(68,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), GT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:500.5-500.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:507.5-507.41 prod {{0xFD} {`%`_u32(69,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), LE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:501.5-501.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:508.5-508.41 prod {{0xFD} {`%`_u32(70,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), GE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:505.5-505.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:512.5-512.41 prod {{0xFD} {`%`_u32(71,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:506.5-506.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:513.5-513.41 prod {{0xFD} {`%`_u32(72,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:507.5-507.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:514.5-514.41 prod {{0xFD} {`%`_u32(73,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), LT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:508.5-508.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:515.5-515.41 prod {{0xFD} {`%`_u32(74,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), GT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:509.5-509.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:516.5-516.41 prod {{0xFD} {`%`_u32(75,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), LE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:510.5-510.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:517.5-517.41 prod {{0xFD} {`%`_u32(76,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), GE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:514.5-514.36 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:521.5-521.36 prod {{0xFD} {`%`_u32(77,):Bu32}} => VVUNOP_instr(V128_vectype, NOT_vvunop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:518.5-518.37 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:525.5-525.37 prod {{0xFD} {`%`_u32(78,):Bu32}} => VVBINOP_instr(V128_vectype, AND_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:519.5-519.40 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:526.5-526.40 prod {{0xFD} {`%`_u32(79,):Bu32}} => VVBINOP_instr(V128_vectype, ANDNOT_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:520.5-520.36 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:527.5-527.36 prod {{0xFD} {`%`_u32(80,):Bu32}} => VVBINOP_instr(V128_vectype, OR_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:521.5-521.37 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:528.5-528.37 prod {{0xFD} {`%`_u32(81,):Bu32}} => VVBINOP_instr(V128_vectype, XOR_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:525.5-525.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:532.5-532.44 prod {{0xFD} {`%`_u32(82,):Bu32}} => VVTERNOP_instr(V128_vectype, BITSELECT_vvternop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:529.5-529.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:536.5-536.43 prod {{0xFD} {`%`_u32(83,):Bu32}} => VVTESTOP_instr(V128_vectype, ANY_TRUE_vvtestop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:533.5-533.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:540.5-540.41 prod {{0xFD} {`%`_u32(96,):Bu32}} => VUNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:534.5-534.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:541.5-541.41 prod {{0xFD} {`%`_u32(97,):Bu32}} => VUNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:535.5-535.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:542.5-542.44 prod {{0xFD} {`%`_u32(98,):Bu32}} => VUNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), POPCNT_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:539.5-539.48 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:546.5-546.48 prod {{0xFD} {`%`_u32(99,):Bu32}} => VTESTOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:543.5-543.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:550.5-550.41 prod {{0xFD} {`%`_u32(100,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:547.5-547.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:554.5-554.53 prod {{0xFD} {`%`_u32(101,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), S_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:548.5-548.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:555.5-555.53 prod {{0xFD} {`%`_u32(102,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), U_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:552.5-552.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:559.5-559.45 prod {{0xFD} {`%`_u32(107,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:553.5-553.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:560.5-560.47 prod {{0xFD} {`%`_u32(108,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:554.5-554.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:561.5-561.47 prod {{0xFD} {`%`_u32(109,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:558.5-558.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:565.5-565.43 prod {{0xFD} {`%`_u32(110,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:559.5-559.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:566.5-566.49 prod {{0xFD} {`%`_u32(111,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ADD_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:560.5-560.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:567.5-567.49 prod {{0xFD} {`%`_u32(112,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ADD_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:561.5-561.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:568.5-568.43 prod {{0xFD} {`%`_u32(113,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:562.5-562.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:569.5-569.49 prod {{0xFD} {`%`_u32(114,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), SUB_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:563.5-563.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:570.5-570.49 prod {{0xFD} {`%`_u32(115,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), SUB_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:564.5-564.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:571.5-571.45 prod {{0xFD} {`%`_u32(118,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MIN_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:565.5-565.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:572.5-572.45 prod {{0xFD} {`%`_u32(119,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MIN_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:566.5-566.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:573.5-573.45 prod {{0xFD} {`%`_u32(120,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MAX_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:567.5-567.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:574.5-574.45 prod {{0xFD} {`%`_u32(121,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MAX_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:568.5-568.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:575.5-575.46 prod {{0xFD} {`%`_u32(123,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), AVGRU_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:572.5-572.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:579.5-579.70 prod {{0xFD} {`%`_u32(124,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTADD_PAIRWISE_vextunop__(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:573.5-573.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:580.5-580.70 prod {{0xFD} {`%`_u32(125,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTADD_PAIRWISE_vextunop__(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:577.5-577.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:584.5-584.42 prod {{0xFD} {`%`_u32(128,):Bu32}} => VUNOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:578.5-578.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:585.5-585.42 prod {{0xFD} {`%`_u32(129,):Bu32}} => VUNOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:582.5-582.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:589.5-589.53 prod {{0xFD} {`%`_u32(130,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), Q15MULR_SATS_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:583.5-583.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:590.5-590.43 prod {{0xFD} {`%`_u32(142,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:584.5-584.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:591.5-591.49 prod {{0xFD} {`%`_u32(143,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ADD_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:585.5-585.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:592.5-592.49 prod {{0xFD} {`%`_u32(144,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ADD_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:586.5-586.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:593.5-593.43 prod {{0xFD} {`%`_u32(145,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:587.5-587.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:594.5-594.49 prod {{0xFD} {`%`_u32(146,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), SUB_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:588.5-588.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:595.5-595.49 prod {{0xFD} {`%`_u32(147,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), SUB_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:589.5-589.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:596.5-596.43 prod {{0xFD} {`%`_u32(149,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:590.5-590.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:597.5-597.45 prod {{0xFD} {`%`_u32(150,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MIN_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:591.5-591.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:598.5-598.45 prod {{0xFD} {`%`_u32(151,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MIN_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:592.5-592.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:599.5-599.45 prod {{0xFD} {`%`_u32(152,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MAX_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:593.5-593.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:600.5-600.45 prod {{0xFD} {`%`_u32(153,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MAX_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:594.5-594.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:601.5-601.46 prod {{0xFD} {`%`_u32(155,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), AVGRU_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:595.5-595.57 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:602.5-602.57 prod {{0xFD} {`%`_u32(273,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), RELAXED_Q15MULRS_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:599.5-599.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:606.5-606.49 prod {{0xFD} {`%`_u32(131,):Bu32}} => VTESTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:603.5-603.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:610.5-610.41 prod {{0xFD} {`%`_u32(132,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:607.5-607.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:614.5-614.53 prod {{0xFD} {`%`_u32(133,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), S_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:608.5-608.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:615.5-615.53 prod {{0xFD} {`%`_u32(134,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), U_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:612.5-612.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:619.5-619.63 prod {{0xFD} {`%`_u32(135,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:613.5-613.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:620.5-620.64 prod {{0xFD} {`%`_u32(136,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:614.5-614.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:621.5-621.63 prod {{0xFD} {`%`_u32(137,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:615.5-615.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:622.5-622.64 prod {{0xFD} {`%`_u32(138,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:619.5-619.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:626.5-626.45 prod {{0xFD} {`%`_u32(139,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:620.5-620.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:627.5-627.47 prod {{0xFD} {`%`_u32(140,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:621.5-621.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:628.5-628.47 prod {{0xFD} {`%`_u32(141,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:625.5-625.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:632.5-632.66 prod {{0xFD} {`%`_u32(156,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:626.5-626.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:633.5-633.67 prod {{0xFD} {`%`_u32(157,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:627.5-627.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:634.5-634.66 prod {{0xFD} {`%`_u32(158,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:628.5-628.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:635.5-635.67 prod {{0xFD} {`%`_u32(159,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:629.5-629.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:636.5-636.67 prod {{0xFD} {`%`_u32(274,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), RELAXED_DOTS_vextbinop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:633.5-633.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:640.5-640.70 prod {{0xFD} {`%`_u32(126,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTADD_PAIRWISE_vextunop__(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:634.5-634.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:641.5-641.70 prod {{0xFD} {`%`_u32(127,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTADD_PAIRWISE_vextunop__(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:638.5-638.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:645.5-645.42 prod {{0xFD} {`%`_u32(160,):Bu32}} => VUNOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:639.5-639.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:646.5-646.42 prod {{0xFD} {`%`_u32(161,):Bu32}} => VUNOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:643.5-643.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:650.5-650.49 prod {{0xFD} {`%`_u32(163,):Bu32}} => VTESTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:647.5-647.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:654.5-654.41 prod {{0xFD} {`%`_u32(164,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:651.5-651.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:658.5-658.63 prod {{0xFD} {`%`_u32(167,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:652.5-652.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:659.5-659.64 prod {{0xFD} {`%`_u32(168,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:653.5-653.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:660.5-660.63 prod {{0xFD} {`%`_u32(169,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:654.5-654.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:661.5-661.64 prod {{0xFD} {`%`_u32(170,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:658.5-658.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:665.5-665.45 prod {{0xFD} {`%`_u32(171,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:659.5-659.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:666.5-666.49 prod {{0xFD} {`%`_u32(172,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:660.5-660.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:667.5-667.49 prod {{0xFD} {`%`_u32(173,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:664.5-664.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:671.5-671.43 prod {{0xFD} {`%`_u32(174,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:665.5-665.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:672.5-672.43 prod {{0xFD} {`%`_u32(177,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:666.5-666.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:673.5-673.43 prod {{0xFD} {`%`_u32(181,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:667.5-667.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:674.5-674.45 prod {{0xFD} {`%`_u32(182,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MIN_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:668.5-668.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:675.5-675.45 prod {{0xFD} {`%`_u32(183,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MIN_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:669.5-669.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:676.5-676.45 prod {{0xFD} {`%`_u32(184,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MAX_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:670.5-670.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:677.5-677.45 prod {{0xFD} {`%`_u32(185,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MAX_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:674.5-674.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:681.5-681.59 prod {{0xFD} {`%`_u32(186,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), DOTS_vextbinop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:675.5-675.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:682.5-682.66 prod {{0xFD} {`%`_u32(188,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:676.5-676.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:683.5-683.67 prod {{0xFD} {`%`_u32(189,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:677.5-677.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:684.5-684.66 prod {{0xFD} {`%`_u32(190,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:678.5-678.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:685.5-685.67 prod {{0xFD} {`%`_u32(191,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:682.5-682.72 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:689.5-689.72 prod {{0xFD} {`%`_u32(275,):Bu32}} => VEXTTERNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), RELAXED_DOT_ADDS_vextternop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:686.5-686.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:693.5-693.42 prod {{0xFD} {`%`_u32(192,):Bu32}} => VUNOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:687.5-687.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:694.5-694.42 prod {{0xFD} {`%`_u32(193,):Bu32}} => VUNOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:691.5-691.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:698.5-698.49 prod {{0xFD} {`%`_u32(195,):Bu32}} => VTESTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:695.5-695.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:702.5-702.41 prod {{0xFD} {`%`_u32(196,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:699.5-699.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:706.5-706.63 prod {{0xFD} {`%`_u32(199,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:700.5-700.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:707.5-707.64 prod {{0xFD} {`%`_u32(200,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:701.5-701.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:708.5-708.63 prod {{0xFD} {`%`_u32(201,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:702.5-702.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:709.5-709.64 prod {{0xFD} {`%`_u32(202,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:706.5-706.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:713.5-713.45 prod {{0xFD} {`%`_u32(203,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:707.5-707.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:714.5-714.49 prod {{0xFD} {`%`_u32(204,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:708.5-708.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:715.5-715.49 prod {{0xFD} {`%`_u32(205,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:712.5-712.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:719.5-719.43 prod {{0xFD} {`%`_u32(206,):Bu32}} => VBINOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:713.5-713.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:720.5-720.43 prod {{0xFD} {`%`_u32(209,):Bu32}} => VBINOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:714.5-714.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:721.5-721.43 prod {{0xFD} {`%`_u32(213,):Bu32}} => VBINOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:718.5-718.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:725.5-725.42 prod {{0xFD} {`%`_u32(214,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:719.5-719.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:726.5-726.42 prod {{0xFD} {`%`_u32(215,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:720.5-720.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:727.5-727.46 prod {{0xFD} {`%`_u32(216,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:721.5-721.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:728.5-728.46 prod {{0xFD} {`%`_u32(217,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:722.5-722.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:729.5-729.46 prod {{0xFD} {`%`_u32(218,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:723.5-723.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:730.5-730.46 prod {{0xFD} {`%`_u32(219,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:727.5-727.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:734.5-734.66 prod {{0xFD} {`%`_u32(220,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:728.5-728.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:735.5-735.67 prod {{0xFD} {`%`_u32(221,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:729.5-729.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:736.5-736.66 prod {{0xFD} {`%`_u32(222,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:730.5-730.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:737.5-737.67 prod {{0xFD} {`%`_u32(223,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:734.5-734.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:741.5-741.43 prod {{0xFD} {`%`_u32(103,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), CEIL_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:735.5-735.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:742.5-742.44 prod {{0xFD} {`%`_u32(104,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), FLOOR_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:736.5-736.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:743.5-743.44 prod {{0xFD} {`%`_u32(105,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), TRUNC_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:737.5-737.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:744.5-744.46 prod {{0xFD} {`%`_u32(106,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), NEAREST_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:738.5-738.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:745.5-745.42 prod {{0xFD} {`%`_u32(224,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:739.5-739.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:746.5-746.42 prod {{0xFD} {`%`_u32(225,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:740.5-740.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:747.5-747.43 prod {{0xFD} {`%`_u32(227,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), SQRT_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:744.5-744.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:751.5-751.43 prod {{0xFD} {`%`_u32(228,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:745.5-745.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:752.5-752.43 prod {{0xFD} {`%`_u32(229,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:746.5-746.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:753.5-753.43 prod {{0xFD} {`%`_u32(230,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:747.5-747.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:754.5-754.43 prod {{0xFD} {`%`_u32(231,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), DIV_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:748.5-748.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:755.5-755.43 prod {{0xFD} {`%`_u32(232,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:749.5-749.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:756.5-756.43 prod {{0xFD} {`%`_u32(233,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:750.5-750.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:757.5-757.44 prod {{0xFD} {`%`_u32(234,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), PMIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:751.5-751.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:758.5-758.44 prod {{0xFD} {`%`_u32(235,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), PMAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:752.5-752.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:759.5-759.51 prod {{0xFD} {`%`_u32(269,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:753.5-753.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:760.5-760.51 prod {{0xFD} {`%`_u32(270,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:757.5-757.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:764.5-764.53 prod {{0xFD} {`%`_u32(261,):Bu32}} => VTERNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_MADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:758.5-758.54 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:765.5-765.54 prod {{0xFD} {`%`_u32(262,):Bu32}} => VTERNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_NMADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:762.5-762.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:769.5-769.43 prod {{0xFD} {`%`_u32(116,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), CEIL_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:763.5-763.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:770.5-770.44 prod {{0xFD} {`%`_u32(117,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), FLOOR_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:764.5-764.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:771.5-771.44 prod {{0xFD} {`%`_u32(122,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), TRUNC_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:765.5-765.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:772.5-772.46 prod {{0xFD} {`%`_u32(148,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), NEAREST_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:766.5-766.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:773.5-773.42 prod {{0xFD} {`%`_u32(236,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:767.5-767.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:774.5-774.42 prod {{0xFD} {`%`_u32(237,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:768.5-768.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:775.5-775.43 prod {{0xFD} {`%`_u32(239,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), SQRT_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:772.5-772.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:779.5-779.43 prod {{0xFD} {`%`_u32(240,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:773.5-773.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:780.5-780.43 prod {{0xFD} {`%`_u32(241,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:774.5-774.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:781.5-781.43 prod {{0xFD} {`%`_u32(242,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:775.5-775.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:782.5-782.43 prod {{0xFD} {`%`_u32(243,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), DIV_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:776.5-776.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:783.5-783.43 prod {{0xFD} {`%`_u32(244,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:777.5-777.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:784.5-784.43 prod {{0xFD} {`%`_u32(245,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:778.5-778.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:785.5-785.44 prod {{0xFD} {`%`_u32(246,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), PMIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:779.5-779.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:786.5-786.44 prod {{0xFD} {`%`_u32(247,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), PMAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:780.5-780.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:787.5-787.51 prod {{0xFD} {`%`_u32(271,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:781.5-781.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:788.5-788.51 prod {{0xFD} {`%`_u32(272,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:785.5-785.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:792.5-792.53 prod {{0xFD} {`%`_u32(263,):Bu32}} => VTERNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_MADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:786.5-786.54 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:793.5-793.54 prod {{0xFD} {`%`_u32(264,):Bu32}} => VTERNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_NMADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:787.5-787.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:794.5-794.59 prod {{0xFD} {`%`_u32(265,):Bu32}} => VTERNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:788.5-788.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:795.5-795.59 prod {{0xFD} {`%`_u32(266,):Bu32}} => VTERNOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:789.5-789.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:796.5-796.59 prod {{0xFD} {`%`_u32(267,):Bu32}} => VTERNOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:790.5-790.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:797.5-797.59 prod {{0xFD} {`%`_u32(268,):Bu32}} => VTERNOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:794.5-794.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:801.5-801.61 prod {{0xFD} {`%`_u32(94,):Bu32}} => VCVTOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), DEMOTE_vcvtop__(ZERO_zero)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:795.5-795.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:802.5-802.61 prod {{0xFD} {`%`_u32(95,):Bu32}} => VCVTOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), PROMOTELOW_vcvtop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:796.5-796.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:803.5-803.62 prod {{0xFD} {`%`_u32(248,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), TRUNC_SAT_vcvtop__(S_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:797.5-797.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:804.5-804.62 prod {{0xFD} {`%`_u32(249,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), TRUNC_SAT_vcvtop__(U_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:798.5-798.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:805.5-805.60 prod {{0xFD} {`%`_u32(250,):Bu32}} => VCVTOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(), S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:799.5-799.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:806.5-806.60 prod {{0xFD} {`%`_u32(251,):Bu32}} => VCVTOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(), U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:800.5-800.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:807.5-807.67 prod {{0xFD} {`%`_u32(252,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), TRUNC_SAT_vcvtop__(S_sx, ?(ZERO_zero))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:801.5-801.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:808.5-808.67 prod {{0xFD} {`%`_u32(253,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), TRUNC_SAT_vcvtop__(U_sx, ?(ZERO_zero))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:802.5-802.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:809.5-809.64 prod {{0xFD} {`%`_u32(254,):Bu32}} => VCVTOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(LOW_half), S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:803.5-803.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:810.5-810.64 prod {{0xFD} {`%`_u32(255,):Bu32}} => VCVTOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(LOW_half), U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:804.5-804.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:811.5-811.66 prod {{0xFD} {`%`_u32(257,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_TRUNC_vcvtop__(S_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:805.5-805.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:812.5-812.66 prod {{0xFD} {`%`_u32(258,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_TRUNC_vcvtop__(U_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:806.5-806.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:813.5-813.71 prod {{0xFD} {`%`_u32(259,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_TRUNC_vcvtop__(S_sx, ?(ZERO_zero))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:807.5-807.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:814.5-814.71 prod {{0xFD} {`%`_u32(260,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_TRUNC_vcvtop__(U_sx, ?(ZERO_zero))) } @@ -11128,6 +11195,14 @@ grammar Tplaininstr_(I : I) : instr ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec prod "f64.reinterpret_i64" => CVTOP_instr(F64_numtype, I64_numtype, REINTERPRET_cvtop__) ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.add128" => WIDEOP_instr(I64_numtype, ADD128_wideop_) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.sub128" => WIDEOP_instr(I64_numtype, SUB128_wideop_) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.mul_wide_s" => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(S_sx)) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.mul_wide_u" => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(U_sx)) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec prod{`c*` : u8*} {{"v128.const"} {"i8x16"} {c*{c <- `c*`}:Ti8^16{}}} => VCONST_instr(V128_vectype, $inv_ibytes_(128, $concat_(syntax byte, $ibytes_(8, c)*{c <- `c*`}))) ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec prod{`c*` : u16*} {{"v128.const"} {"i16x8"} {c*{c <- `c*`}:Ti16^8{}}} => VCONST_instr(V128_vectype, $inv_ibytes_(128, $concat_(syntax byte, $ibytes_(16, c)*{c <- `c*`}))) @@ -13538,6 +13613,18 @@ syntax binop_(numtype : numtype) | COPYSIGN +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec +syntax wideop_{Inn : Inn}((Inn : Inn <: numtype)) = + | ADD128 + -- if ($sizenn((Inn : Inn <: numtype)) = 64) + | SUB128 + -- if ($sizenn((Inn : Inn <: numtype)) = 64) + +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec +syntax extwideop_{Inn : Inn}((Inn : Inn <: numtype)) = + | MUL_WIDE(sx) + -- if ($sizenn((Inn : Inn <: numtype)) = 64) + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec syntax testop_{Inn : Inn}((Inn : Inn <: numtype)) = | EQZ @@ -14048,6 +14135,8 @@ syntax instr = | TESTOP(numtype : numtype, testop_(numtype)) | RELOP(numtype : numtype, relop_(numtype)) | CVTOP(numtype_1 : numtype, numtype_2 : numtype, cvtop__(numtype_2, numtype_1)) + | WIDEOP(numtype : numtype, wideop_(numtype)) + | EXTWIDEOP(numtype : numtype, extwideop_(numtype)) | VCONST(vectype : vectype, vec_(vectype)) | VVUNOP(vectype : vectype, vvunop : vvunop) | VVBINOP(vectype : vectype, vvbinop : vvbinop) @@ -14128,233 +14217,233 @@ def $free_catch(catch : catch) : free ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec rec { -;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:585.1-585.44 +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:595.1-595.44 def $shift_labelidxs(labelidx*) : labelidx* - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:586.1-586.32 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:596.1-596.32 def $shift_labelidxs([]) = [] - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:587.1-587.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:597.1-597.66 def $shift_labelidxs{`labelidx'*` : labelidx*}([`%`_labelidx(0,)] ++ labelidx'*{labelidx' <- `labelidx'*`}) = $shift_labelidxs(labelidx'*{labelidx' <- `labelidx'*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:588.1-588.91 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:598.1-598.91 def $shift_labelidxs{labelidx : labelidx, `labelidx'*` : labelidx*}([labelidx] ++ labelidx'*{labelidx' <- `labelidx'*`}) = [`%`_labelidx((((labelidx!`%`_labelidx.0 : nat <:> int) - (1 : nat <:> int)) : int <:> nat),)] ++ $shift_labelidxs(labelidx'*{labelidx' <- `labelidx'*`}) } ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec rec { -;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:421.1-421.30 +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:431.1-431.30 def $free_instr(instr : instr) : free - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:436.1-436.26 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:446.1-446.26 def $free_instr(NOP_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:437.1-437.34 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:447.1-447.34 def $free_instr(UNREACHABLE_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:438.1-438.27 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:448.1-448.27 def $free_instr(DROP_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:439.1-439.86 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:449.1-449.86 def $free_instr{`valtype*?` : valtype*?}(SELECT_instr(valtype*{valtype <- `valtype*`}?{`valtype*` <- `valtype*?`})) = $free_opt($free_list($free_valtype(valtype)*{valtype <- `valtype*`})?{`valtype*` <- `valtype*?`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:441.1-441.92 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:451.1-451.92 def $free_instr{blocktype : blocktype, `instr*` : instr*}(BLOCK_instr(blocktype, instr*{instr <- `instr*`})) = $free_blocktype(blocktype) +++ $free_block(instr*{instr <- `instr*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:442.1-442.91 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:452.1-452.91 def $free_instr{blocktype : blocktype, `instr*` : instr*}(LOOP_instr(blocktype, instr*{instr <- `instr*`})) = $free_blocktype(blocktype) +++ $free_block(instr*{instr <- `instr*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:443.1-444.79 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:453.1-454.79 def $free_instr{blocktype : blocktype, `instr_1*` : instr*, `instr_2*` : instr*}(`IF%%ELSE%`_instr(blocktype, instr_1*{instr_1 <- `instr_1*`}, instr_2*{instr_2 <- `instr_2*`})) = $free_blocktype(blocktype) +++ $free_block(instr_1*{instr_1 <- `instr_1*`}) +++ $free_block(instr_2*{instr_2 <- `instr_2*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:446.1-446.56 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:456.1-456.56 def $free_instr{labelidx : labelidx}(BR_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:447.1-447.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:457.1-457.59 def $free_instr{labelidx : labelidx}(BR_IF_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:448.1-449.69 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:458.1-459.69 def $free_instr{`labelidx*` : labelidx*, labelidx' : labelidx}(BR_TABLE_instr(labelidx*{labelidx <- `labelidx*`}, labelidx')) = $free_list($free_labelidx(labelidx)*{labelidx <- `labelidx*`}) +++ $free_labelidx(labelidx') - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:450.1-450.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:460.1-460.64 def $free_instr{labelidx : labelidx}(BR_ON_NULL_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:451.1-451.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:461.1-461.68 def $free_instr{labelidx : labelidx}(BR_ON_NON_NULL_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:452.1-453.83 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:462.1-463.83 def $free_instr{labelidx : labelidx, reftype_1 : reftype, reftype_2 : reftype}(BR_ON_CAST_instr(labelidx, reftype_1, reftype_2)) = $free_labelidx(labelidx) +++ $free_reftype(reftype_1) +++ $free_reftype(reftype_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:454.1-455.83 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:464.1-465.83 def $free_instr{labelidx : labelidx, reftype_1 : reftype, reftype_2 : reftype}(BR_ON_CAST_FAIL_instr(labelidx, reftype_1, reftype_2)) = $free_labelidx(labelidx) +++ $free_reftype(reftype_1) +++ $free_reftype(reftype_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:457.1-457.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:467.1-467.55 def $free_instr{funcidx : funcidx}(CALL_instr(funcidx)) = $free_funcidx(funcidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:458.1-458.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:468.1-468.59 def $free_instr{typeuse : typeuse}(CALL_REF_instr(typeuse)) = $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:459.1-460.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:469.1-470.53 def $free_instr{tableidx : tableidx, typeuse : typeuse}(CALL_INDIRECT_instr(tableidx, typeuse)) = $free_tableidx(tableidx) +++ $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:461.1-461.29 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:471.1-471.29 def $free_instr(RETURN_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:462.1-462.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:472.1-472.62 def $free_instr{funcidx : funcidx}(RETURN_CALL_instr(funcidx)) = $free_funcidx(funcidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:463.1-463.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:473.1-473.66 def $free_instr{typeuse : typeuse}(RETURN_CALL_REF_instr(typeuse)) = $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:464.1-465.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:474.1-475.53 def $free_instr{tableidx : tableidx, typeuse : typeuse}(RETURN_CALL_INDIRECT_instr(tableidx, typeuse)) = $free_tableidx(tableidx) +++ $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:467.1-467.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:477.1-477.53 def $free_instr{tagidx : tagidx}(THROW_instr(tagidx)) = $free_tagidx(tagidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:468.1-468.32 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:478.1-478.32 def $free_instr(THROW_REF_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:469.1-470.99 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:479.1-480.99 def $free_instr{blocktype : blocktype, `catch*` : catch*, `instr*` : instr*}(TRY_TABLE_instr(blocktype, `%`_list(catch*{catch <- `catch*`},), instr*{instr <- `instr*`})) = $free_blocktype(blocktype) +++ $free_list($free_catch(catch)*{catch <- `catch*`}) +++ $free_list($free_instr(instr)*{instr <- `instr*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:472.1-472.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:482.1-482.63 def $free_instr{numtype : numtype, numlit : num_(numtype)}(CONST_instr(numtype, numlit)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:473.1-473.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:483.1-483.60 def $free_instr{numtype : numtype, unop : unop_(numtype)}(UNOP_instr(numtype, unop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:474.1-474.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:484.1-484.62 def $free_instr{numtype : numtype, binop : binop_(numtype)}(BINOP_instr(numtype, binop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:475.1-475.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:485.1-485.64 def $free_instr{numtype : numtype, testop : testop_(numtype)}(TESTOP_instr(numtype, testop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:476.1-476.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:486.1-486.62 def $free_instr{numtype : numtype, relop : relop_(numtype)}(RELOP_instr(numtype, relop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:477.1-478.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:487.1-488.55 def $free_instr{numtype_1 : numtype, numtype_2 : numtype, cvtop : cvtop__(numtype_2, numtype_1)}(CVTOP_instr(numtype_1, numtype_2, cvtop)) = $free_numtype(numtype_1) +++ $free_numtype(numtype_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:480.1-480.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:490.1-490.64 def $free_instr{vectype : vectype, veclit : vec_(vectype)}(VCONST_instr(vectype, veclit)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:481.1-481.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:491.1-491.64 def $free_instr{vectype : vectype, vvunop : vvunop}(VVUNOP_instr(vectype, vvunop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:482.1-482.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:492.1-492.66 def $free_instr{vectype : vectype, vvbinop : vvbinop}(VVBINOP_instr(vectype, vvbinop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:483.1-483.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:493.1-493.68 def $free_instr{vectype : vectype, vvternop : vvternop}(VVTERNOP_instr(vectype, vvternop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:484.1-484.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:494.1-494.68 def $free_instr{vectype : vectype, vvtestop : vvtestop}(VVTESTOP_instr(vectype, vvtestop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:485.1-485.56 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:495.1-495.56 def $free_instr{shape : shape, vunop : vunop_(shape)}(VUNOP_instr(shape, vunop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:486.1-486.58 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:496.1-496.58 def $free_instr{shape : shape, vbinop : vbinop_(shape)}(VBINOP_instr(shape, vbinop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:487.1-487.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:497.1-497.60 def $free_instr{shape : shape, vternop : vternop_(shape)}(VTERNOP_instr(shape, vternop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:488.1-488.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:498.1-498.60 def $free_instr{shape : shape, vtestop : vtestop_(shape)}(VTESTOP_instr(shape, vtestop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:489.1-489.58 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:499.1-499.58 def $free_instr{shape : shape, vrelop : vrelop_(shape)}(VRELOP_instr(shape, vrelop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:490.1-490.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:500.1-500.64 def $free_instr{ishape : ishape, vshiftop : vshiftop_(ishape)}(VSHIFTOP_instr(ishape, vshiftop)) = $free_shape(ishape!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:491.1-491.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:501.1-501.55 def $free_instr{ishape : ishape}(VBITMASK_instr(ishape)) = $free_shape(ishape!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:492.1-492.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:502.1-502.66 def $free_instr{bshape : bshape, vswizzlop : vswizzlop_(bshape)}(VSWIZZLOP_instr(bshape, vswizzlop)) = $free_shape(bshape!`%`_bshape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:493.1-493.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:503.1-503.64 def $free_instr{bshape : bshape, `laneidx*` : laneidx*}(VSHUFFLE_instr(bshape, laneidx*{laneidx <- `laneidx*`})) = $free_shape(bshape!`%`_bshape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:494.1-495.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:504.1-505.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, vextunop : vextunop__(ishape_2, ishape_1)}(VEXTUNOP_instr(ishape_1, ishape_2, vextunop)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:496.1-497.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:506.1-507.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, vextbinop : vextbinop__(ishape_2, ishape_1)}(VEXTBINOP_instr(ishape_1, ishape_2, vextbinop)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:498.1-499.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:508.1-509.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, vextternop : vextternop__(ishape_2, ishape_1)}(VEXTTERNOP_instr(ishape_1, ishape_2, vextternop)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:500.1-501.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:510.1-511.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, sx : sx}(VNARROW_instr(ishape_1, ishape_2, sx)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:502.1-503.47 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:512.1-513.47 def $free_instr{shape_1 : shape, shape_2 : shape, vcvtop : vcvtop__(shape_2, shape_1)}(VCVTOP_instr(shape_1, shape_2, vcvtop)) = $free_shape(shape_1) +++ $free_shape(shape_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:504.1-504.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:514.1-514.51 def $free_instr{shape : shape}(VSPLAT_instr(shape)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:505.1-505.70 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:515.1-515.70 def $free_instr{shape : shape, `sx?` : sx?, laneidx : laneidx}(VEXTRACT_LANE_instr(shape, sx?{sx <- `sx?`}, laneidx)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:506.1-506.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:516.1-516.66 def $free_instr{shape : shape, laneidx : laneidx}(VREPLACE_LANE_instr(shape, laneidx)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:508.1-508.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:518.1-518.62 def $free_instr{heaptype : heaptype}(`REF.NULL`_instr(heaptype)) = $free_heaptype(heaptype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:509.1-509.34 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:519.1-519.34 def $free_instr(`REF.IS_NULL`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:510.1-510.38 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:520.1-520.38 def $free_instr(`REF.AS_NON_NULL`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:511.1-511.29 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:521.1-521.29 def $free_instr(`REF.EQ`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:512.1-512.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:522.1-522.59 def $free_instr{reftype : reftype}(`REF.TEST`_instr(reftype)) = $free_reftype(reftype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:513.1-513.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:523.1-523.59 def $free_instr{reftype : reftype}(`REF.CAST`_instr(reftype)) = $free_reftype(reftype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:514.1-514.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:524.1-524.59 def $free_instr{funcidx : funcidx}(`REF.FUNC`_instr(funcidx)) = $free_funcidx(funcidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:515.1-515.30 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:525.1-525.30 def $free_instr(`REF.I31`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:517.1-517.33 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:527.1-527.33 def $free_instr{sx : sx}(`I31.GET`_instr(sx)) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:519.1-519.61 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:529.1-529.61 def $free_instr{typeidx : typeidx}(`STRUCT.NEW`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:520.1-520.69 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:530.1-530.69 def $free_instr{typeidx : typeidx}(`STRUCT.NEW_DEFAULT`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:521.1-521.69 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:531.1-531.69 def $free_instr{`sx?` : sx?, typeidx : typeidx, u32 : u32}(`STRUCT.GET`_instr(sx?{sx <- `sx?`}, typeidx, u32)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:522.1-522.65 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:532.1-532.65 def $free_instr{typeidx : typeidx, u32 : u32}(`STRUCT.SET`_instr(typeidx, u32)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:524.1-524.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:534.1-534.60 def $free_instr{typeidx : typeidx}(`ARRAY.NEW`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:525.1-525.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:535.1-535.68 def $free_instr{typeidx : typeidx}(`ARRAY.NEW_DEFAULT`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:526.1-526.70 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:536.1-536.70 def $free_instr{typeidx : typeidx, u32 : u32}(`ARRAY.NEW_FIXED`_instr(typeidx, u32)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:527.1-528.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:537.1-538.51 def $free_instr{typeidx : typeidx, dataidx : dataidx}(`ARRAY.NEW_DATA`_instr(typeidx, dataidx)) = $free_typeidx(typeidx) +++ $free_dataidx(dataidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:529.1-530.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:539.1-540.51 def $free_instr{typeidx : typeidx, elemidx : elemidx}(`ARRAY.NEW_ELEM`_instr(typeidx, elemidx)) = $free_typeidx(typeidx) +++ $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:531.1-531.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:541.1-541.64 def $free_instr{`sx?` : sx?, typeidx : typeidx}(`ARRAY.GET`_instr(sx?{sx <- `sx?`}, typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:532.1-532.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:542.1-542.60 def $free_instr{typeidx : typeidx}(`ARRAY.SET`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:533.1-533.32 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:543.1-543.32 def $free_instr(`ARRAY.LEN`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:534.1-534.61 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:544.1-544.61 def $free_instr{typeidx : typeidx}(`ARRAY.FILL`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:535.1-536.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:545.1-546.55 def $free_instr{typeidx_1 : typeidx, typeidx_2 : typeidx}(`ARRAY.COPY`_instr(typeidx_1, typeidx_2)) = $free_typeidx(typeidx_1) +++ $free_typeidx(typeidx_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:537.1-538.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:547.1-548.51 def $free_instr{typeidx : typeidx, dataidx : dataidx}(`ARRAY.INIT_DATA`_instr(typeidx, dataidx)) = $free_typeidx(typeidx) +++ $free_dataidx(dataidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:539.1-540.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:549.1-550.51 def $free_instr{typeidx : typeidx, elemidx : elemidx}(`ARRAY.INIT_ELEM`_instr(typeidx, elemidx)) = $free_typeidx(typeidx) +++ $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:542.1-542.41 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:552.1-552.41 def $free_instr(`EXTERN.CONVERT_ANY`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:543.1-543.41 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:553.1-553.41 def $free_instr(`ANY.CONVERT_EXTERN`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:545.1-545.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:555.1-555.63 def $free_instr{localidx : localidx}(`LOCAL.GET`_instr(localidx)) = $free_localidx(localidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:546.1-546.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:556.1-556.63 def $free_instr{localidx : localidx}(`LOCAL.SET`_instr(localidx)) = $free_localidx(localidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:547.1-547.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:557.1-557.63 def $free_instr{localidx : localidx}(`LOCAL.TEE`_instr(localidx)) = $free_localidx(localidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:549.1-549.67 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:559.1-559.67 def $free_instr{globalidx : globalidx}(`GLOBAL.GET`_instr(globalidx)) = $free_globalidx(globalidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:550.1-550.67 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:560.1-560.67 def $free_instr{globalidx : globalidx}(`GLOBAL.SET`_instr(globalidx)) = $free_globalidx(globalidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:552.1-552.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:562.1-562.63 def $free_instr{tableidx : tableidx}(`TABLE.GET`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:553.1-553.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:563.1-563.63 def $free_instr{tableidx : tableidx}(`TABLE.SET`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:554.1-554.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:564.1-564.64 def $free_instr{tableidx : tableidx}(`TABLE.SIZE`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:555.1-555.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:565.1-565.64 def $free_instr{tableidx : tableidx}(`TABLE.GROW`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:556.1-556.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:566.1-566.64 def $free_instr{tableidx : tableidx}(`TABLE.FILL`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:557.1-558.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:567.1-568.59 def $free_instr{tableidx_1 : tableidx, tableidx_2 : tableidx}(`TABLE.COPY`_instr(tableidx_1, tableidx_2)) = $free_tableidx(tableidx_1) +++ $free_tableidx(tableidx_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:559.1-560.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:569.1-570.53 def $free_instr{tableidx : tableidx, elemidx : elemidx}(`TABLE.INIT`_instr(tableidx, elemidx)) = $free_tableidx(tableidx) +++ $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:561.1-561.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:571.1-571.60 def $free_instr{elemidx : elemidx}(`ELEM.DROP`_instr(elemidx)) = $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:563.1-564.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:573.1-574.49 def $free_instr{numtype : numtype, `loadop?` : loadop_(numtype)?, memidx : memidx, memarg : memarg}(LOAD_instr(numtype, loadop?{loadop <- `loadop?`}, memidx, memarg)) = $free_numtype(numtype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:565.1-566.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:575.1-576.49 def $free_instr{numtype : numtype, `storeop?` : storeop_(numtype)?, memidx : memidx, memarg : memarg}(STORE_instr(numtype, storeop?{storeop <- `storeop?`}, memidx, memarg)) = $free_numtype(numtype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:567.1-568.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:577.1-578.49 def $free_instr{vectype : vectype, `vloadop?` : vloadop_(vectype)?, memidx : memidx, memarg : memarg}(VLOAD_instr(vectype, vloadop?{vloadop <- `vloadop?`}, memidx, memarg)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:569.1-570.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:579.1-580.49 def $free_instr{vectype : vectype, sz : sz, memidx : memidx, memarg : memarg, laneidx : laneidx}(VLOAD_LANE_instr(vectype, sz, memidx, memarg, laneidx)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:571.1-572.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:581.1-582.49 def $free_instr{vectype : vectype, memidx : memidx, memarg : memarg}(VSTORE_instr(vectype, memidx, memarg)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:573.1-574.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:583.1-584.49 def $free_instr{vectype : vectype, sz : sz, memidx : memidx, memarg : memarg, laneidx : laneidx}(VSTORE_LANE_instr(vectype, sz, memidx, memarg, laneidx)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:575.1-575.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:585.1-585.59 def $free_instr{memidx : memidx}(`MEMORY.SIZE`_instr(memidx)) = $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:576.1-576.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:586.1-586.59 def $free_instr{memidx : memidx}(`MEMORY.GROW`_instr(memidx)) = $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:577.1-577.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:587.1-587.59 def $free_instr{memidx : memidx}(`MEMORY.FILL`_instr(memidx)) = $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:578.1-579.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:588.1-589.51 def $free_instr{memidx_1 : memidx, memidx_2 : memidx}(`MEMORY.COPY`_instr(memidx_1, memidx_2)) = $free_memidx(memidx_1) +++ $free_memidx(memidx_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:580.1-581.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:590.1-591.49 def $free_instr{memidx : memidx, dataidx : dataidx}(`MEMORY.INIT`_instr(memidx, dataidx)) = $free_memidx(memidx) +++ $free_dataidx(dataidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:582.1-582.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:592.1-592.60 def $free_instr{dataidx : dataidx}(`DATA.DROP`_instr(dataidx)) = $free_dataidx(dataidx) -;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:422.1-422.31 +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:432.1-432.31 def $free_block(instr*) : free - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:590.1-591.47 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:600.1-601.47 def $free_block{`instr*` : instr*, free : free}(instr*{instr <- `instr*`}) = free[LABELS_free = $shift_labelidxs(free.LABELS_free)] -- if (free = $free_list($free_instr(instr)*{instr <- `instr*`})) } @@ -15798,123 +15887,131 @@ relation Instr_ok: `%|-%:%`(context, instr, instrtype) rule cvtop{C : context, nt_1 : numtype, nt_2 : numtype, cvtop : cvtop__(nt_2, nt_1)}: `%|-%:%`(C, CVTOP_instr(nt_1, nt_2, cvtop), `%->_%%`_instrtype(`%`_resulttype([(nt_2 : numtype <: valtype)],), [], `%`_resulttype([(nt_1 : numtype <: valtype)],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:541.1-542.35 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:538.1-539.50 + rule wideop{C : context, nt : numtype, wideop_nt : wideop_(nt)}: + `%|-%:%`(C, WIDEOP_instr(nt, wideop_nt), `%->_%%`_instrtype(`%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype) (nt : numtype <: valtype) (nt : numtype <: valtype)],), [], `%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype)],))) + + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:541.1-542.50 + rule extwideop{C : context, nt : numtype, extwideop_nt : extwideop_(nt)}: + `%|-%:%`(C, EXTWIDEOP_instr(nt, extwideop_nt), `%->_%%`_instrtype(`%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype)],), [], `%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype)],))) + + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:547.1-548.35 rule vconst{C : context, c : vec_(V128_Vnn)}: `%|-%:%`(C, VCONST_instr(V128_vectype, c), `%->_%%`_instrtype(`%`_resulttype([],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:544.1-545.41 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:550.1-551.41 rule vvunop{C : context, vvunop : vvunop}: `%|-%:%`(C, VVUNOP_instr(V128_vectype, vvunop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:547.1-548.48 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:553.1-554.48 rule vvbinop{C : context, vvbinop : vvbinop}: `%|-%:%`(C, VVBINOP_instr(V128_vectype, vvbinop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:550.1-551.55 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:556.1-557.55 rule vvternop{C : context, vvternop : vvternop}: `%|-%:%`(C, VVTERNOP_instr(V128_vectype, vvternop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:553.1-554.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:559.1-560.44 rule vvtestop{C : context, vvtestop : vvtestop}: `%|-%:%`(C, VVTESTOP_instr(V128_vectype, vvtestop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([I32_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:556.1-557.37 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:562.1-563.37 rule vunop{C : context, sh : shape, vunop : vunop_(sh)}: `%|-%:%`(C, VUNOP_instr(sh, vunop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:559.1-560.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:565.1-566.44 rule vbinop{C : context, sh : shape, vbinop : vbinop_(sh)}: `%|-%:%`(C, VBINOP_instr(sh, vbinop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:562.1-563.51 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:568.1-569.51 rule vternop{C : context, sh : shape, vternop : vternop_(sh)}: `%|-%:%`(C, VTERNOP_instr(sh, vternop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:565.1-566.40 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:571.1-572.40 rule vtestop{C : context, sh : shape, vtestop : vtestop_(sh)}: `%|-%:%`(C, VTESTOP_instr(sh, vtestop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([I32_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:568.1-569.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:574.1-575.44 rule vrelop{C : context, sh : shape, vrelop : vrelop_(sh)}: `%|-%:%`(C, VRELOP_instr(sh, vrelop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:571.1-572.47 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:577.1-578.47 rule vshiftop{C : context, sh : ishape, vshiftop : vshiftop_(sh)}: `%|-%:%`(C, VSHIFTOP_instr(sh, vshiftop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype I32_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:574.1-575.33 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:580.1-581.33 rule vbitmask{C : context, sh : ishape}: `%|-%:%`(C, VBITMASK_instr(sh), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([I32_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:577.1-578.50 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:583.1-584.50 rule vswizzlop{C : context, sh : bshape, vswizzlop : vswizzlop_(sh)}: `%|-%:%`(C, VSWIZZLOP_instr(sh, vswizzlop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:580.1-582.29 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:586.1-588.29 rule vshuffle{C : context, sh : bshape, `i*` : laneidx*}: `%|-%:%`(C, VSHUFFLE_instr(sh, i*{i <- `i*`}), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) -- (if (i!`%`_laneidx.0 < (2 * $dim(sh!`%`_bshape.0)!`%`_dim.0)))*{i <- `i*`} - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:584.1-585.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:590.1-591.44 rule vsplat{C : context, sh : shape}: `%|-%:%`(C, VSPLAT_instr(sh), `%->_%%`_instrtype(`%`_resulttype([($unpackshape(sh) : numtype <: valtype)],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:587.1-589.21 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:593.1-595.21 rule vextract_lane{C : context, sh : shape, `sx?` : sx?, i : laneidx}: `%|-%:%`(C, VEXTRACT_LANE_instr(sh, sx?{sx <- `sx?`}, i), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([($unpackshape(sh) : numtype <: valtype)],))) -- if (i!`%`_laneidx.0 < $dim(sh)!`%`_dim.0) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:591.1-593.21 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:597.1-599.21 rule vreplace_lane{C : context, sh : shape, i : laneidx}: `%|-%:%`(C, VREPLACE_LANE_instr(sh, i), `%->_%%`_instrtype(`%`_resulttype([V128_valtype ($unpackshape(sh) : numtype <: valtype)],), [], `%`_resulttype([V128_valtype],))) -- if (i!`%`_laneidx.0 < $dim(sh)!`%`_dim.0) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:595.1-596.50 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:601.1-602.50 rule vextunop{C : context, sh_1 : ishape, sh_2 : ishape, vextunop : vextunop__(sh_2, sh_1)}: `%|-%:%`(C, VEXTUNOP_instr(sh_1, sh_2, vextunop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:598.1-599.57 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:604.1-605.57 rule vextbinop{C : context, sh_1 : ishape, sh_2 : ishape, vextbinop : vextbinop__(sh_2, sh_1)}: `%|-%:%`(C, VEXTBINOP_instr(sh_1, sh_2, vextbinop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:601.1-602.64 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:607.1-608.64 rule vextternop{C : context, sh_1 : ishape, sh_2 : ishape, vextternop : vextternop__(sh_2, sh_1)}: `%|-%:%`(C, VEXTTERNOP_instr(sh_1, sh_2, vextternop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:604.1-605.48 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:610.1-611.48 rule vnarrow{C : context, sh_1 : ishape, sh_2 : ishape, sx : sx}: `%|-%:%`(C, VNARROW_instr(sh_1, sh_2, sx), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:607.1-608.46 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:613.1-614.46 rule vcvtop{C : context, sh_1 : shape, sh_2 : shape, vcvtop : vcvtop__(sh_2, sh_1)}: `%|-%:%`(C, VCVTOP_instr(sh_1, sh_2, vcvtop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:6.1-6.96 relation Instrs_ok: `%|-%:%`(context, instr*, instrtype) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:613.1-614.24 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:619.1-620.24 rule empty{C : context}: `%|-%:%`(C, [], `%->_%%`_instrtype(`%`_resulttype([],), [], `%`_resulttype([],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:616.1-618.46 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:622.1-624.46 rule instr{C : context, instr : instr, `t_1*` : valtype*, `x*` : idx*, `t_2*` : valtype*}: `%|-%:%`(C, [instr], `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) -- Instr_ok: `%|-%:%`(C, instr, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:621.1-625.82 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:627.1-631.82 rule seq{C : context, `instr_1*` : instr*, `instr_2*` : instr*, `t_1*` : valtype*, `x_1*` : idx*, `x_2*` : idx*, `t_3*` : valtype*, `t_2*` : valtype*, `init*` : init*, `t*` : valtype*}: `%|-%:%`(C, instr_1*{instr_1 <- `instr_1*`} ++ instr_2*{instr_2 <- `instr_2*`}, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x_1*{x_1 <- `x_1*`} ++ x_2*{x_2 <- `x_2*`}, `%`_resulttype(t_3*{t_3 <- `t_3*`},))) -- Instrs_ok: `%|-%:%`(C, instr_1*{instr_1 <- `instr_1*`}, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x_1*{x_1 <- `x_1*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) -- (if (C.LOCALS_context[x_1!`%`_idx.0] = `%%`_localtype(init, t)))*{init <- `init*`, t <- `t*`, x_1 <- `x_1*`} -- Instrs_ok: `%|-%:%`($with_locals(C, x_1*{x_1 <- `x_1*`}, `%%`_localtype(SET_init, t)*{t <- `t*`}), instr_2*{instr_2 <- `instr_2*`}, `%->_%%`_instrtype(`%`_resulttype(t_2*{t_2 <- `t_2*`},), x_2*{x_2 <- `x_2*`}, `%`_resulttype(t_3*{t_3 <- `t_3*`},))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:627.1-631.33 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:633.1-637.33 rule sub{C : context, `instr*` : instr*, it' : instrtype, it : instrtype}: `%|-%:%`(C, instr*{instr <- `instr*`}, it') -- Instrs_ok: `%|-%:%`(C, instr*{instr <- `instr*`}, it) -- Instrtype_sub: `%|-%<:%`(C, it, it') -- Instrtype_ok: `%|-%:OK`(C, it') - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:634.1-637.33 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:640.1-643.33 rule frame{C : context, `instr*` : instr*, `t*` : valtype*, `t_1*` : valtype*, `x*` : idx*, `t_2*` : valtype*}: `%|-%:%`(C, instr*{instr <- `instr*`}, `%->_%%`_instrtype(`%`_resulttype(t*{t <- `t*`} ++ t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t*{t <- `t*`} ++ t_2*{t_2 <- `t_2*`},))) -- Instrs_ok: `%|-%:%`(C, instr*{instr <- `instr*`}, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) @@ -16875,6 +16972,33 @@ def $cvtop__(numtype_1 : numtype, numtype_2 : numtype, cvtop__ : cvtop__(numtype def $cvtop__{Fnn_1 : Fnn, Inn_2 : Inn, f_1 : num_((Fnn_1 : Fnn <: numtype))}((Fnn_1 : Fnn <: numtype), (Inn_2 : Inn <: numtype), REINTERPRET_cvtop__, f_1) = [$reinterpret__((Fnn_1 : Fnn <: numtype), (Inn_2 : Inn <: numtype), f_1)] -- if ($size((Fnn_1 : Fnn <: numtype)) = $size((Inn_2 : Inn <: numtype))) +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $iconcat_(numtype : numtype, N : N, num_ : num_(numtype), num_ : num_(numtype)) : iN(N) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $iconcat_{Inn : Inn, N : N, i_1 : num_((Inn : Inn <: numtype)), i_2 : num_((Inn : Inn <: numtype))}((Inn : Inn <: numtype), N, i_1, i_2) = $ior_(N, $iextend_(N, $sizenn((Inn : Inn <: numtype)), U_sx, `%`_iN(i_1!`%`_num_.0,)), $ishl_(N, $iextend_(N, $sizenn((Inn : Inn <: numtype)), U_sx, `%`_iN(i_2!`%`_num_.0,)), `%`_u32($sizenn((Inn : Inn <: numtype)),))) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $isplit_(numtype : numtype, N : N, iN : iN(N)) : (num_(numtype), num_(numtype)) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $isplit_{Inn : Inn, N : N, i_1 : iN(N)}((Inn : Inn <: numtype), N, i_1) = ($wrap__(N, $sizenn((Inn : Inn <: numtype)), i_1), $wrap__(N, $sizenn((Inn : Inn <: numtype)), $ishr_(N, U_sx, i_1, `%`_u32($sizenn((Inn : Inn <: numtype)),)))) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $wideop_(numtype : numtype, N : N, wideop_ : wideop_(numtype), iN : iN(N), iN : iN(N)) : iN(N) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $wideop_{Inn : Inn, N : N, i_1 : iN(N), i_2 : iN(N)}((Inn : Inn <: numtype), N, ADD128_wideop_, i_1, i_2) = $iadd_(N, i_1, i_2) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $wideop_{Inn : Inn, N : N, i_1 : iN(N), i_2 : iN(N)}((Inn : Inn <: numtype), N, SUB128_wideop_, i_1, i_2) = $isub_(N, i_1, i_2) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $wideop__(numtype : numtype, wideop_ : wideop_(numtype), num_ : num_(numtype), num_ : num_(numtype), num_ : num_(numtype), num_ : num_(numtype)) : (num_(numtype), num_(numtype)) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $wideop__{Inn : Inn, wideop : wideop_((Inn : Inn <: numtype)), i_1 : num_((Inn : Inn <: numtype)), i_2 : num_((Inn : Inn <: numtype)), i_3 : num_((Inn : Inn <: numtype)), i_4 : num_((Inn : Inn <: numtype))}((Inn : Inn <: numtype), wideop, i_1, i_2, i_3, i_4) = $isplit_((Inn : Inn <: numtype), 128, $wideop_((Inn : Inn <: numtype), 128, wideop, $iconcat_((Inn : Inn <: numtype), 128, i_1, i_2), $iconcat_((Inn : Inn <: numtype), 128, i_3, i_4))) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $extwideop__(numtype : numtype, extwideop_ : extwideop_(numtype), num_ : num_(numtype), num_ : num_(numtype)) : (num_(numtype), num_(numtype)) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $extwideop__{Inn : Inn, sx : sx, i_1 : num_((Inn : Inn <: numtype)), i_2 : num_((Inn : Inn <: numtype))}((Inn : Inn <: numtype), MUL_WIDE_extwideop_(sx), i_1, i_2) = $isplit_((Inn : Inn <: numtype), 128, $imul_(128, $iextend_(128, $sizenn((Inn : Inn <: numtype)), sx, `%`_iN(i_1!`%`_num_.0,)), $iextend_(128, $sizenn((Inn : Inn <: numtype)), sx, `%`_iN(i_2!`%`_num_.0,)))) + ;; ../../../../specification/wasm-latest/3.2-numerics.vector.spectec def $lanes_(shape : shape, vec_ : vec_(V128_Vnn)) : lane_($lanetype(shape))* @@ -18192,6 +18316,16 @@ relation Step_pure: `%~>%`(instr*, instr*) `%~>%`([CONST_instr(nt_1, c_1) CVTOP_instr(nt_2, nt_1, cvtop)], [TRAP_instr]) -- if ($cvtop__(nt_1, nt_2, cvtop, c_1) = []) + ;; ../../../../specification/wasm-latest/4.3-execution.instructions.spectec + rule wideop{nt : numtype, c_1 : num_(nt), c_2 : num_(nt), c_3 : num_(nt), c_4 : num_(nt), wideop_nt : wideop_(nt), c_5 : num_(nt), c_6 : num_(nt)}: + `%~>%`([CONST_instr(nt, c_1) CONST_instr(nt, c_2) CONST_instr(nt, c_3) CONST_instr(nt, c_4) WIDEOP_instr(nt, wideop_nt)], [CONST_instr(nt, c_5) CONST_instr(nt, c_6)]) + -- if ((c_5, c_6) <- [$wideop__(nt, wideop_nt, c_1, c_2, c_3, c_4)]) + + ;; ../../../../specification/wasm-latest/4.3-execution.instructions.spectec + rule extwideop{nt : numtype, c_1 : num_(nt), c_2 : num_(nt), extwideop_nt : extwideop_(nt), c_5 : num_(nt), c_6 : num_(nt)}: + `%~>%`([CONST_instr(nt, c_1) CONST_instr(nt, c_2) EXTWIDEOP_instr(nt, extwideop_nt)], [CONST_instr(nt, c_5) CONST_instr(nt, c_6)]) + -- if ((c_5, c_6) <- [$extwideop__(nt, extwideop_nt, c_1, c_2)]) + ;; ../../../../specification/wasm-latest/4.3-execution.instructions.spectec rule vvunop{c_1 : vec_(V128_Vnn), vvunop : vvunop, c : vec_(V128_Vnn)}: `%~>%`([VCONST_instr(V128_vectype, c_1) VVUNOP_instr(V128_vectype, vvunop)], [VCONST_instr(V128_vectype, c)]) @@ -20518,7 +20652,7 @@ grammar Blaneidx : laneidx ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec rec { -;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:793.1-807.71 +;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:800.1-814.71 grammar Binstr : instr ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:8.5-8.24 prod 0x00 => UNREACHABLE_instr @@ -21004,517 +21138,525 @@ grammar Binstr : instr prod {{0xFC} {`%`_u32(6,):Bu32}} => CVTOP_instr(I64_numtype, F64_numtype, TRUNC_SAT_cvtop__(S_sx)) ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:386.5-386.45 prod {{0xFC} {`%`_u32(7,):Bu32}} => CVTOP_instr(I64_numtype, F64_numtype, TRUNC_SAT_cvtop__(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:396.5-396.50 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:390.5-390.38 + prod {{0xFC} {`%`_u32(13,):Bu32}} => WIDEOP_instr(I64_numtype, ADD128_wideop_) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:391.5-391.38 + prod {{0xFC} {`%`_u32(14,):Bu32}} => WIDEOP_instr(I64_numtype, SUB128_wideop_) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:392.5-392.45 + prod {{0xFC} {`%`_u32(15,):Bu32}} => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(S_sx)) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:393.5-393.45 + prod {{0xFC} {`%`_u32(16,):Bu32}} => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(U_sx)) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:403.5-403.50 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(0,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:397.5-397.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:404.5-404.70 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(1,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(8,), `%`_M(8,), S_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:398.5-398.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:405.5-405.70 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(2,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(8,), `%`_M(8,), U_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:399.5-399.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:406.5-406.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(3,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(16,), `%`_M(4,), S_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:400.5-400.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:407.5-407.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(4,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(16,), `%`_M(4,), U_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:401.5-401.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:408.5-408.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(5,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(32,), `%`_M(2,), S_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:402.5-402.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:409.5-409.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(6,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(32,), `%`_M(2,), U_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:403.5-403.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:410.5-410.61 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(7,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(8,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:404.5-404.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:411.5-411.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(8,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(16,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:405.5-405.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:412.5-412.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(9,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(32,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:406.5-406.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:413.5-413.63 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(10,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(64,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:407.5-407.52 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:414.5-414.52 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(11,):Bu32} {(x, ao):Bmemarg}} => VSTORE_instr(V128_vectype, x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:408.5-408.72 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:415.5-415.72 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(84,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(8,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:409.5-409.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:416.5-416.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(85,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(16,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:410.5-410.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:417.5-417.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(86,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(32,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:411.5-411.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:418.5-418.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(87,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(64,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:412.5-412.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:419.5-419.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(88,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(8,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:413.5-413.74 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:420.5-420.74 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(89,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(16,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:414.5-414.74 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:421.5-421.74 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(90,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(32,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:415.5-415.74 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:422.5-422.74 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(91,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(64,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:416.5-416.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:423.5-423.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(92,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(ZERO_vloadop_(`%`_sz(32,),)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:417.5-417.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:424.5-424.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(93,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(ZERO_vloadop_(`%`_sz(64,),)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:421.5-421.72 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:428.5-428.72 prod{`b*` : byte*} {{0xFD} {`%`_u32(12,):Bu32} {b:Bbyte^16{b <- `b*`}}} => VCONST_instr(V128_vectype, $inv_ibytes_(128, b^16{b <- `b*`})) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:425.5-425.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:432.5-432.61 prod{`l*` : labelidx*} {{0xFD} {`%`_u32(13,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx^16{l <- `l*`}}} => VSHUFFLE_instr(`%`_bshape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), `%`_laneidx(l!`%`_labelidx.0,)^16{l <- `l*`}) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:426.5-426.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:433.5-433.49 prod {{0xFD} {`%`_u32(14,):Bu32}} => VSWIZZLOP_instr(`%`_bshape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SWIZZLE_vswizzlop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:427.5-427.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:434.5-434.58 prod {{0xFD} {`%`_u32(256,):Bu32}} => VSWIZZLOP_instr(`%`_bshape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), RELAXED_SWIZZLE_vswizzlop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:431.5-431.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:438.5-438.38 prod {{0xFD} {`%`_u32(15,):Bu32}} => VSPLAT_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:432.5-432.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:439.5-439.38 prod {{0xFD} {`%`_u32(16,):Bu32}} => VSPLAT_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:433.5-433.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:440.5-440.38 prod {{0xFD} {`%`_u32(17,):Bu32}} => VSPLAT_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:434.5-434.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:441.5-441.38 prod {{0xFD} {`%`_u32(18,):Bu32}} => VSPLAT_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:435.5-435.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:442.5-442.38 prod {{0xFD} {`%`_u32(19,):Bu32}} => VSPLAT_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:436.5-436.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:443.5-443.38 prod {{0xFD} {`%`_u32(20,):Bu32}} => VSPLAT_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:440.5-440.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:447.5-447.60 prod{l : labelidx} {{0xFD} {`%`_u32(21,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ?(S_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:441.5-441.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:448.5-448.60 prod{l : labelidx} {{0xFD} {`%`_u32(22,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ?(U_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:442.5-442.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:449.5-449.58 prod{l : labelidx} {{0xFD} {`%`_u32(23,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:443.5-443.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:450.5-450.60 prod{l : labelidx} {{0xFD} {`%`_u32(24,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ?(S_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:444.5-444.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:451.5-451.60 prod{l : labelidx} {{0xFD} {`%`_u32(25,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ?(U_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:445.5-445.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:452.5-452.58 prod{l : labelidx} {{0xFD} {`%`_u32(26,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:446.5-446.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:453.5-453.58 prod{l : labelidx} {{0xFD} {`%`_u32(27,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:447.5-447.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:454.5-454.58 prod{l : labelidx} {{0xFD} {`%`_u32(28,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:448.5-448.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:455.5-455.58 prod{l : labelidx} {{0xFD} {`%`_u32(29,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:449.5-449.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:456.5-456.58 prod{l : labelidx} {{0xFD} {`%`_u32(30,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:450.5-450.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:457.5-457.58 prod{l : labelidx} {{0xFD} {`%`_u32(31,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:451.5-451.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:458.5-458.58 prod{l : labelidx} {{0xFD} {`%`_u32(32,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:452.5-452.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:459.5-459.58 prod{l : labelidx} {{0xFD} {`%`_u32(33,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:453.5-453.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:460.5-460.58 prod{l : labelidx} {{0xFD} {`%`_u32(34,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:457.5-457.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:464.5-464.41 prod {{0xFD} {`%`_u32(35,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:458.5-458.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:465.5-465.41 prod {{0xFD} {`%`_u32(36,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:459.5-459.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:466.5-466.43 prod {{0xFD} {`%`_u32(37,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:460.5-460.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:467.5-467.43 prod {{0xFD} {`%`_u32(38,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:461.5-461.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:468.5-468.43 prod {{0xFD} {`%`_u32(39,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:462.5-462.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:469.5-469.43 prod {{0xFD} {`%`_u32(40,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:463.5-463.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:470.5-470.43 prod {{0xFD} {`%`_u32(41,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:464.5-464.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:471.5-471.43 prod {{0xFD} {`%`_u32(42,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:465.5-465.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:472.5-472.43 prod {{0xFD} {`%`_u32(43,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:466.5-466.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:473.5-473.43 prod {{0xFD} {`%`_u32(44,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:470.5-470.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:477.5-477.41 prod {{0xFD} {`%`_u32(45,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:471.5-471.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:478.5-478.41 prod {{0xFD} {`%`_u32(46,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:472.5-472.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:479.5-479.43 prod {{0xFD} {`%`_u32(47,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:473.5-473.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:480.5-480.43 prod {{0xFD} {`%`_u32(48,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:474.5-474.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:481.5-481.43 prod {{0xFD} {`%`_u32(49,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:475.5-475.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:482.5-482.43 prod {{0xFD} {`%`_u32(50,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:476.5-476.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:483.5-483.43 prod {{0xFD} {`%`_u32(51,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:477.5-477.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:484.5-484.43 prod {{0xFD} {`%`_u32(52,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:478.5-478.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:485.5-485.43 prod {{0xFD} {`%`_u32(53,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:479.5-479.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:486.5-486.43 prod {{0xFD} {`%`_u32(54,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:483.5-483.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:490.5-490.41 prod {{0xFD} {`%`_u32(55,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:484.5-484.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:491.5-491.41 prod {{0xFD} {`%`_u32(56,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:485.5-485.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:492.5-492.43 prod {{0xFD} {`%`_u32(57,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:486.5-486.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:493.5-493.43 prod {{0xFD} {`%`_u32(58,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:487.5-487.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:494.5-494.43 prod {{0xFD} {`%`_u32(59,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:488.5-488.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:495.5-495.43 prod {{0xFD} {`%`_u32(60,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:489.5-489.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:496.5-496.43 prod {{0xFD} {`%`_u32(61,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:490.5-490.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:497.5-497.43 prod {{0xFD} {`%`_u32(62,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:491.5-491.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:498.5-498.43 prod {{0xFD} {`%`_u32(63,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:492.5-492.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:499.5-499.43 prod {{0xFD} {`%`_u32(64,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:496.5-496.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:503.5-503.41 prod {{0xFD} {`%`_u32(65,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:497.5-497.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:504.5-504.41 prod {{0xFD} {`%`_u32(66,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:498.5-498.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:505.5-505.41 prod {{0xFD} {`%`_u32(67,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), LT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:499.5-499.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:506.5-506.41 prod {{0xFD} {`%`_u32(68,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), GT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:500.5-500.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:507.5-507.41 prod {{0xFD} {`%`_u32(69,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), LE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:501.5-501.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:508.5-508.41 prod {{0xFD} {`%`_u32(70,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), GE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:505.5-505.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:512.5-512.41 prod {{0xFD} {`%`_u32(71,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:506.5-506.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:513.5-513.41 prod {{0xFD} {`%`_u32(72,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:507.5-507.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:514.5-514.41 prod {{0xFD} {`%`_u32(73,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), LT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:508.5-508.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:515.5-515.41 prod {{0xFD} {`%`_u32(74,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), GT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:509.5-509.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:516.5-516.41 prod {{0xFD} {`%`_u32(75,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), LE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:510.5-510.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:517.5-517.41 prod {{0xFD} {`%`_u32(76,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), GE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:514.5-514.36 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:521.5-521.36 prod {{0xFD} {`%`_u32(77,):Bu32}} => VVUNOP_instr(V128_vectype, NOT_vvunop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:518.5-518.37 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:525.5-525.37 prod {{0xFD} {`%`_u32(78,):Bu32}} => VVBINOP_instr(V128_vectype, AND_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:519.5-519.40 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:526.5-526.40 prod {{0xFD} {`%`_u32(79,):Bu32}} => VVBINOP_instr(V128_vectype, ANDNOT_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:520.5-520.36 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:527.5-527.36 prod {{0xFD} {`%`_u32(80,):Bu32}} => VVBINOP_instr(V128_vectype, OR_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:521.5-521.37 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:528.5-528.37 prod {{0xFD} {`%`_u32(81,):Bu32}} => VVBINOP_instr(V128_vectype, XOR_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:525.5-525.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:532.5-532.44 prod {{0xFD} {`%`_u32(82,):Bu32}} => VVTERNOP_instr(V128_vectype, BITSELECT_vvternop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:529.5-529.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:536.5-536.43 prod {{0xFD} {`%`_u32(83,):Bu32}} => VVTESTOP_instr(V128_vectype, ANY_TRUE_vvtestop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:533.5-533.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:540.5-540.41 prod {{0xFD} {`%`_u32(96,):Bu32}} => VUNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:534.5-534.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:541.5-541.41 prod {{0xFD} {`%`_u32(97,):Bu32}} => VUNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:535.5-535.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:542.5-542.44 prod {{0xFD} {`%`_u32(98,):Bu32}} => VUNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), POPCNT_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:539.5-539.48 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:546.5-546.48 prod {{0xFD} {`%`_u32(99,):Bu32}} => VTESTOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:543.5-543.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:550.5-550.41 prod {{0xFD} {`%`_u32(100,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:547.5-547.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:554.5-554.53 prod {{0xFD} {`%`_u32(101,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), S_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:548.5-548.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:555.5-555.53 prod {{0xFD} {`%`_u32(102,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), U_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:552.5-552.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:559.5-559.45 prod {{0xFD} {`%`_u32(107,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:553.5-553.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:560.5-560.47 prod {{0xFD} {`%`_u32(108,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:554.5-554.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:561.5-561.47 prod {{0xFD} {`%`_u32(109,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:558.5-558.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:565.5-565.43 prod {{0xFD} {`%`_u32(110,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:559.5-559.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:566.5-566.49 prod {{0xFD} {`%`_u32(111,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ADD_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:560.5-560.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:567.5-567.49 prod {{0xFD} {`%`_u32(112,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ADD_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:561.5-561.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:568.5-568.43 prod {{0xFD} {`%`_u32(113,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:562.5-562.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:569.5-569.49 prod {{0xFD} {`%`_u32(114,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), SUB_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:563.5-563.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:570.5-570.49 prod {{0xFD} {`%`_u32(115,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), SUB_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:564.5-564.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:571.5-571.45 prod {{0xFD} {`%`_u32(118,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MIN_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:565.5-565.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:572.5-572.45 prod {{0xFD} {`%`_u32(119,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MIN_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:566.5-566.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:573.5-573.45 prod {{0xFD} {`%`_u32(120,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MAX_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:567.5-567.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:574.5-574.45 prod {{0xFD} {`%`_u32(121,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MAX_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:568.5-568.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:575.5-575.46 prod {{0xFD} {`%`_u32(123,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), AVGRU_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:572.5-572.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:579.5-579.70 prod {{0xFD} {`%`_u32(124,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTADD_PAIRWISE_vextunop__(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:573.5-573.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:580.5-580.70 prod {{0xFD} {`%`_u32(125,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTADD_PAIRWISE_vextunop__(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:577.5-577.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:584.5-584.42 prod {{0xFD} {`%`_u32(128,):Bu32}} => VUNOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:578.5-578.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:585.5-585.42 prod {{0xFD} {`%`_u32(129,):Bu32}} => VUNOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:582.5-582.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:589.5-589.53 prod {{0xFD} {`%`_u32(130,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), Q15MULR_SATS_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:583.5-583.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:590.5-590.43 prod {{0xFD} {`%`_u32(142,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:584.5-584.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:591.5-591.49 prod {{0xFD} {`%`_u32(143,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ADD_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:585.5-585.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:592.5-592.49 prod {{0xFD} {`%`_u32(144,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ADD_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:586.5-586.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:593.5-593.43 prod {{0xFD} {`%`_u32(145,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:587.5-587.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:594.5-594.49 prod {{0xFD} {`%`_u32(146,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), SUB_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:588.5-588.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:595.5-595.49 prod {{0xFD} {`%`_u32(147,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), SUB_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:589.5-589.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:596.5-596.43 prod {{0xFD} {`%`_u32(149,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:590.5-590.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:597.5-597.45 prod {{0xFD} {`%`_u32(150,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MIN_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:591.5-591.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:598.5-598.45 prod {{0xFD} {`%`_u32(151,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MIN_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:592.5-592.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:599.5-599.45 prod {{0xFD} {`%`_u32(152,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MAX_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:593.5-593.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:600.5-600.45 prod {{0xFD} {`%`_u32(153,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MAX_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:594.5-594.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:601.5-601.46 prod {{0xFD} {`%`_u32(155,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), AVGRU_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:595.5-595.57 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:602.5-602.57 prod {{0xFD} {`%`_u32(273,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), RELAXED_Q15MULRS_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:599.5-599.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:606.5-606.49 prod {{0xFD} {`%`_u32(131,):Bu32}} => VTESTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:603.5-603.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:610.5-610.41 prod {{0xFD} {`%`_u32(132,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:607.5-607.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:614.5-614.53 prod {{0xFD} {`%`_u32(133,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), S_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:608.5-608.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:615.5-615.53 prod {{0xFD} {`%`_u32(134,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), U_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:612.5-612.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:619.5-619.63 prod {{0xFD} {`%`_u32(135,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:613.5-613.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:620.5-620.64 prod {{0xFD} {`%`_u32(136,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:614.5-614.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:621.5-621.63 prod {{0xFD} {`%`_u32(137,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:615.5-615.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:622.5-622.64 prod {{0xFD} {`%`_u32(138,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:619.5-619.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:626.5-626.45 prod {{0xFD} {`%`_u32(139,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:620.5-620.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:627.5-627.47 prod {{0xFD} {`%`_u32(140,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:621.5-621.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:628.5-628.47 prod {{0xFD} {`%`_u32(141,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:625.5-625.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:632.5-632.66 prod {{0xFD} {`%`_u32(156,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:626.5-626.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:633.5-633.67 prod {{0xFD} {`%`_u32(157,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:627.5-627.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:634.5-634.66 prod {{0xFD} {`%`_u32(158,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:628.5-628.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:635.5-635.67 prod {{0xFD} {`%`_u32(159,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:629.5-629.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:636.5-636.67 prod {{0xFD} {`%`_u32(274,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), RELAXED_DOTS_vextbinop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:633.5-633.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:640.5-640.70 prod {{0xFD} {`%`_u32(126,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTADD_PAIRWISE_vextunop__(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:634.5-634.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:641.5-641.70 prod {{0xFD} {`%`_u32(127,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTADD_PAIRWISE_vextunop__(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:638.5-638.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:645.5-645.42 prod {{0xFD} {`%`_u32(160,):Bu32}} => VUNOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:639.5-639.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:646.5-646.42 prod {{0xFD} {`%`_u32(161,):Bu32}} => VUNOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:643.5-643.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:650.5-650.49 prod {{0xFD} {`%`_u32(163,):Bu32}} => VTESTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:647.5-647.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:654.5-654.41 prod {{0xFD} {`%`_u32(164,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:651.5-651.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:658.5-658.63 prod {{0xFD} {`%`_u32(167,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:652.5-652.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:659.5-659.64 prod {{0xFD} {`%`_u32(168,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:653.5-653.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:660.5-660.63 prod {{0xFD} {`%`_u32(169,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:654.5-654.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:661.5-661.64 prod {{0xFD} {`%`_u32(170,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:658.5-658.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:665.5-665.45 prod {{0xFD} {`%`_u32(171,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:659.5-659.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:666.5-666.49 prod {{0xFD} {`%`_u32(172,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:660.5-660.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:667.5-667.49 prod {{0xFD} {`%`_u32(173,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:664.5-664.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:671.5-671.43 prod {{0xFD} {`%`_u32(174,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:665.5-665.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:672.5-672.43 prod {{0xFD} {`%`_u32(177,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:666.5-666.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:673.5-673.43 prod {{0xFD} {`%`_u32(181,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:667.5-667.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:674.5-674.45 prod {{0xFD} {`%`_u32(182,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MIN_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:668.5-668.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:675.5-675.45 prod {{0xFD} {`%`_u32(183,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MIN_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:669.5-669.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:676.5-676.45 prod {{0xFD} {`%`_u32(184,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MAX_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:670.5-670.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:677.5-677.45 prod {{0xFD} {`%`_u32(185,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MAX_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:674.5-674.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:681.5-681.59 prod {{0xFD} {`%`_u32(186,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), DOTS_vextbinop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:675.5-675.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:682.5-682.66 prod {{0xFD} {`%`_u32(188,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:676.5-676.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:683.5-683.67 prod {{0xFD} {`%`_u32(189,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:677.5-677.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:684.5-684.66 prod {{0xFD} {`%`_u32(190,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:678.5-678.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:685.5-685.67 prod {{0xFD} {`%`_u32(191,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:682.5-682.72 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:689.5-689.72 prod {{0xFD} {`%`_u32(275,):Bu32}} => VEXTTERNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), RELAXED_DOT_ADDS_vextternop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:686.5-686.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:693.5-693.42 prod {{0xFD} {`%`_u32(192,):Bu32}} => VUNOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:687.5-687.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:694.5-694.42 prod {{0xFD} {`%`_u32(193,):Bu32}} => VUNOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:691.5-691.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:698.5-698.49 prod {{0xFD} {`%`_u32(195,):Bu32}} => VTESTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:695.5-695.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:702.5-702.41 prod {{0xFD} {`%`_u32(196,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:699.5-699.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:706.5-706.63 prod {{0xFD} {`%`_u32(199,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:700.5-700.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:707.5-707.64 prod {{0xFD} {`%`_u32(200,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:701.5-701.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:708.5-708.63 prod {{0xFD} {`%`_u32(201,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:702.5-702.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:709.5-709.64 prod {{0xFD} {`%`_u32(202,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:706.5-706.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:713.5-713.45 prod {{0xFD} {`%`_u32(203,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:707.5-707.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:714.5-714.49 prod {{0xFD} {`%`_u32(204,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:708.5-708.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:715.5-715.49 prod {{0xFD} {`%`_u32(205,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:712.5-712.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:719.5-719.43 prod {{0xFD} {`%`_u32(206,):Bu32}} => VBINOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:713.5-713.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:720.5-720.43 prod {{0xFD} {`%`_u32(209,):Bu32}} => VBINOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:714.5-714.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:721.5-721.43 prod {{0xFD} {`%`_u32(213,):Bu32}} => VBINOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:718.5-718.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:725.5-725.42 prod {{0xFD} {`%`_u32(214,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:719.5-719.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:726.5-726.42 prod {{0xFD} {`%`_u32(215,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:720.5-720.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:727.5-727.46 prod {{0xFD} {`%`_u32(216,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:721.5-721.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:728.5-728.46 prod {{0xFD} {`%`_u32(217,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:722.5-722.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:729.5-729.46 prod {{0xFD} {`%`_u32(218,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:723.5-723.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:730.5-730.46 prod {{0xFD} {`%`_u32(219,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:727.5-727.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:734.5-734.66 prod {{0xFD} {`%`_u32(220,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:728.5-728.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:735.5-735.67 prod {{0xFD} {`%`_u32(221,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:729.5-729.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:736.5-736.66 prod {{0xFD} {`%`_u32(222,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:730.5-730.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:737.5-737.67 prod {{0xFD} {`%`_u32(223,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:734.5-734.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:741.5-741.43 prod {{0xFD} {`%`_u32(103,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), CEIL_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:735.5-735.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:742.5-742.44 prod {{0xFD} {`%`_u32(104,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), FLOOR_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:736.5-736.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:743.5-743.44 prod {{0xFD} {`%`_u32(105,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), TRUNC_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:737.5-737.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:744.5-744.46 prod {{0xFD} {`%`_u32(106,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), NEAREST_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:738.5-738.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:745.5-745.42 prod {{0xFD} {`%`_u32(224,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:739.5-739.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:746.5-746.42 prod {{0xFD} {`%`_u32(225,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:740.5-740.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:747.5-747.43 prod {{0xFD} {`%`_u32(227,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), SQRT_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:744.5-744.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:751.5-751.43 prod {{0xFD} {`%`_u32(228,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:745.5-745.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:752.5-752.43 prod {{0xFD} {`%`_u32(229,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:746.5-746.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:753.5-753.43 prod {{0xFD} {`%`_u32(230,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:747.5-747.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:754.5-754.43 prod {{0xFD} {`%`_u32(231,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), DIV_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:748.5-748.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:755.5-755.43 prod {{0xFD} {`%`_u32(232,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:749.5-749.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:756.5-756.43 prod {{0xFD} {`%`_u32(233,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:750.5-750.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:757.5-757.44 prod {{0xFD} {`%`_u32(234,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), PMIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:751.5-751.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:758.5-758.44 prod {{0xFD} {`%`_u32(235,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), PMAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:752.5-752.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:759.5-759.51 prod {{0xFD} {`%`_u32(269,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:753.5-753.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:760.5-760.51 prod {{0xFD} {`%`_u32(270,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:757.5-757.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:764.5-764.53 prod {{0xFD} {`%`_u32(261,):Bu32}} => VTERNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_MADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:758.5-758.54 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:765.5-765.54 prod {{0xFD} {`%`_u32(262,):Bu32}} => VTERNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_NMADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:762.5-762.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:769.5-769.43 prod {{0xFD} {`%`_u32(116,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), CEIL_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:763.5-763.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:770.5-770.44 prod {{0xFD} {`%`_u32(117,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), FLOOR_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:764.5-764.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:771.5-771.44 prod {{0xFD} {`%`_u32(122,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), TRUNC_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:765.5-765.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:772.5-772.46 prod {{0xFD} {`%`_u32(148,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), NEAREST_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:766.5-766.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:773.5-773.42 prod {{0xFD} {`%`_u32(236,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:767.5-767.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:774.5-774.42 prod {{0xFD} {`%`_u32(237,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:768.5-768.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:775.5-775.43 prod {{0xFD} {`%`_u32(239,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), SQRT_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:772.5-772.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:779.5-779.43 prod {{0xFD} {`%`_u32(240,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:773.5-773.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:780.5-780.43 prod {{0xFD} {`%`_u32(241,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:774.5-774.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:781.5-781.43 prod {{0xFD} {`%`_u32(242,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:775.5-775.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:782.5-782.43 prod {{0xFD} {`%`_u32(243,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), DIV_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:776.5-776.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:783.5-783.43 prod {{0xFD} {`%`_u32(244,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:777.5-777.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:784.5-784.43 prod {{0xFD} {`%`_u32(245,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:778.5-778.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:785.5-785.44 prod {{0xFD} {`%`_u32(246,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), PMIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:779.5-779.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:786.5-786.44 prod {{0xFD} {`%`_u32(247,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), PMAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:780.5-780.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:787.5-787.51 prod {{0xFD} {`%`_u32(271,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:781.5-781.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:788.5-788.51 prod {{0xFD} {`%`_u32(272,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:785.5-785.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:792.5-792.53 prod {{0xFD} {`%`_u32(263,):Bu32}} => VTERNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_MADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:786.5-786.54 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:793.5-793.54 prod {{0xFD} {`%`_u32(264,):Bu32}} => VTERNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_NMADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:787.5-787.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:794.5-794.59 prod {{0xFD} {`%`_u32(265,):Bu32}} => VTERNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:788.5-788.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:795.5-795.59 prod {{0xFD} {`%`_u32(266,):Bu32}} => VTERNOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:789.5-789.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:796.5-796.59 prod {{0xFD} {`%`_u32(267,):Bu32}} => VTERNOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:790.5-790.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:797.5-797.59 prod {{0xFD} {`%`_u32(268,):Bu32}} => VTERNOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:794.5-794.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:801.5-801.61 prod {{0xFD} {`%`_u32(94,):Bu32}} => VCVTOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), DEMOTE_vcvtop__(ZERO_zero)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:795.5-795.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:802.5-802.61 prod {{0xFD} {`%`_u32(95,):Bu32}} => VCVTOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), PROMOTELOW_vcvtop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:796.5-796.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:803.5-803.62 prod {{0xFD} {`%`_u32(248,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), TRUNC_SAT_vcvtop__(S_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:797.5-797.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:804.5-804.62 prod {{0xFD} {`%`_u32(249,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), TRUNC_SAT_vcvtop__(U_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:798.5-798.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:805.5-805.60 prod {{0xFD} {`%`_u32(250,):Bu32}} => VCVTOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(), S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:799.5-799.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:806.5-806.60 prod {{0xFD} {`%`_u32(251,):Bu32}} => VCVTOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(), U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:800.5-800.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:807.5-807.67 prod {{0xFD} {`%`_u32(252,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), TRUNC_SAT_vcvtop__(S_sx, ?(ZERO_zero))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:801.5-801.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:808.5-808.67 prod {{0xFD} {`%`_u32(253,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), TRUNC_SAT_vcvtop__(U_sx, ?(ZERO_zero))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:802.5-802.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:809.5-809.64 prod {{0xFD} {`%`_u32(254,):Bu32}} => VCVTOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(LOW_half), S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:803.5-803.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:810.5-810.64 prod {{0xFD} {`%`_u32(255,):Bu32}} => VCVTOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(LOW_half), U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:804.5-804.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:811.5-811.66 prod {{0xFD} {`%`_u32(257,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_TRUNC_vcvtop__(S_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:805.5-805.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:812.5-812.66 prod {{0xFD} {`%`_u32(258,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_TRUNC_vcvtop__(U_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:806.5-806.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:813.5-813.71 prod {{0xFD} {`%`_u32(259,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_TRUNC_vcvtop__(S_sx, ?(ZERO_zero))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:807.5-807.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:814.5-814.71 prod {{0xFD} {`%`_u32(260,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_TRUNC_vcvtop__(U_sx, ?(ZERO_zero))) } @@ -23039,6 +23181,14 @@ grammar Tplaininstr_(I : I) : instr ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec prod "f64.reinterpret_i64" => CVTOP_instr(F64_numtype, I64_numtype, REINTERPRET_cvtop__) ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.add128" => WIDEOP_instr(I64_numtype, ADD128_wideop_) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.sub128" => WIDEOP_instr(I64_numtype, SUB128_wideop_) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.mul_wide_s" => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(S_sx)) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.mul_wide_u" => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(U_sx)) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec prod{`c*` : u8*} {{"v128.const"} {"i8x16"} {c*{c <- `c*`}:Ti8^16{}}} => VCONST_instr(V128_vectype, $inv_ibytes_(128, $concat_(syntax byte, $ibytes_(8, c)*{c <- `c*`}))) ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec prod{`c*` : u16*} {{"v128.const"} {"i16x8"} {c*{c <- `c*`}:Ti16^8{}}} => VCONST_instr(V128_vectype, $inv_ibytes_(128, $concat_(syntax byte, $ibytes_(16, c)*{c <- `c*`}))) @@ -25449,6 +25599,18 @@ syntax binop_(numtype : numtype) | COPYSIGN +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec +syntax wideop_{Inn : Inn}((Inn : Inn <: numtype)) = + | ADD128 + -- if ($sizenn((Inn : Inn <: numtype)) = 64) + | SUB128 + -- if ($sizenn((Inn : Inn <: numtype)) = 64) + +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec +syntax extwideop_{Inn : Inn}((Inn : Inn <: numtype)) = + | MUL_WIDE(sx) + -- if ($sizenn((Inn : Inn <: numtype)) = 64) + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec syntax testop_{Inn : Inn}((Inn : Inn <: numtype)) = | EQZ @@ -25959,6 +26121,8 @@ syntax instr = | TESTOP(numtype : numtype, testop_(numtype)) | RELOP(numtype : numtype, relop_(numtype)) | CVTOP(numtype_1 : numtype, numtype_2 : numtype, cvtop__(numtype_2, numtype_1)) + | WIDEOP(numtype : numtype, wideop_(numtype)) + | EXTWIDEOP(numtype : numtype, extwideop_(numtype)) | VCONST(vectype : vectype, vec_(vectype)) | VVUNOP(vectype : vectype, vvunop : vvunop) | VVBINOP(vectype : vectype, vvbinop : vvbinop) @@ -26039,233 +26203,233 @@ def $free_catch(catch : catch) : free ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec rec { -;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:585.1-585.44 +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:595.1-595.44 def $shift_labelidxs(labelidx*) : labelidx* - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:586.1-586.32 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:596.1-596.32 def $shift_labelidxs([]) = [] - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:587.1-587.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:597.1-597.66 def $shift_labelidxs{`labelidx'*` : labelidx*}([`%`_labelidx(0,)] ++ labelidx'*{labelidx' <- `labelidx'*`}) = $shift_labelidxs(labelidx'*{labelidx' <- `labelidx'*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:588.1-588.91 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:598.1-598.91 def $shift_labelidxs{labelidx : labelidx, `labelidx'*` : labelidx*}([labelidx] ++ labelidx'*{labelidx' <- `labelidx'*`}) = [`%`_labelidx((((labelidx!`%`_labelidx.0 : nat <:> int) - (1 : nat <:> int)) : int <:> nat),)] ++ $shift_labelidxs(labelidx'*{labelidx' <- `labelidx'*`}) } ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec rec { -;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:421.1-421.30 +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:431.1-431.30 def $free_instr(instr : instr) : free - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:436.1-436.26 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:446.1-446.26 def $free_instr(NOP_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:437.1-437.34 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:447.1-447.34 def $free_instr(UNREACHABLE_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:438.1-438.27 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:448.1-448.27 def $free_instr(DROP_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:439.1-439.86 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:449.1-449.86 def $free_instr{`valtype*?` : valtype*?}(SELECT_instr(valtype*{valtype <- `valtype*`}?{`valtype*` <- `valtype*?`})) = $free_opt($free_list($free_valtype(valtype)*{valtype <- `valtype*`})?{`valtype*` <- `valtype*?`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:441.1-441.92 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:451.1-451.92 def $free_instr{blocktype : blocktype, `instr*` : instr*}(BLOCK_instr(blocktype, instr*{instr <- `instr*`})) = $free_blocktype(blocktype) +++ $free_block(instr*{instr <- `instr*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:442.1-442.91 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:452.1-452.91 def $free_instr{blocktype : blocktype, `instr*` : instr*}(LOOP_instr(blocktype, instr*{instr <- `instr*`})) = $free_blocktype(blocktype) +++ $free_block(instr*{instr <- `instr*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:443.1-444.79 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:453.1-454.79 def $free_instr{blocktype : blocktype, `instr_1*` : instr*, `instr_2*` : instr*}(`IF%%ELSE%`_instr(blocktype, instr_1*{instr_1 <- `instr_1*`}, instr_2*{instr_2 <- `instr_2*`})) = $free_blocktype(blocktype) +++ $free_block(instr_1*{instr_1 <- `instr_1*`}) +++ $free_block(instr_2*{instr_2 <- `instr_2*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:446.1-446.56 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:456.1-456.56 def $free_instr{labelidx : labelidx}(BR_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:447.1-447.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:457.1-457.59 def $free_instr{labelidx : labelidx}(BR_IF_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:448.1-449.69 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:458.1-459.69 def $free_instr{`labelidx*` : labelidx*, labelidx' : labelidx}(BR_TABLE_instr(labelidx*{labelidx <- `labelidx*`}, labelidx')) = $free_list($free_labelidx(labelidx)*{labelidx <- `labelidx*`}) +++ $free_labelidx(labelidx') - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:450.1-450.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:460.1-460.64 def $free_instr{labelidx : labelidx}(BR_ON_NULL_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:451.1-451.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:461.1-461.68 def $free_instr{labelidx : labelidx}(BR_ON_NON_NULL_instr(labelidx)) = $free_labelidx(labelidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:452.1-453.83 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:462.1-463.83 def $free_instr{labelidx : labelidx, reftype_1 : reftype, reftype_2 : reftype}(BR_ON_CAST_instr(labelidx, reftype_1, reftype_2)) = $free_labelidx(labelidx) +++ $free_reftype(reftype_1) +++ $free_reftype(reftype_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:454.1-455.83 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:464.1-465.83 def $free_instr{labelidx : labelidx, reftype_1 : reftype, reftype_2 : reftype}(BR_ON_CAST_FAIL_instr(labelidx, reftype_1, reftype_2)) = $free_labelidx(labelidx) +++ $free_reftype(reftype_1) +++ $free_reftype(reftype_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:457.1-457.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:467.1-467.55 def $free_instr{funcidx : funcidx}(CALL_instr(funcidx)) = $free_funcidx(funcidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:458.1-458.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:468.1-468.59 def $free_instr{typeuse : typeuse}(CALL_REF_instr(typeuse)) = $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:459.1-460.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:469.1-470.53 def $free_instr{tableidx : tableidx, typeuse : typeuse}(CALL_INDIRECT_instr(tableidx, typeuse)) = $free_tableidx(tableidx) +++ $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:461.1-461.29 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:471.1-471.29 def $free_instr(RETURN_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:462.1-462.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:472.1-472.62 def $free_instr{funcidx : funcidx}(RETURN_CALL_instr(funcidx)) = $free_funcidx(funcidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:463.1-463.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:473.1-473.66 def $free_instr{typeuse : typeuse}(RETURN_CALL_REF_instr(typeuse)) = $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:464.1-465.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:474.1-475.53 def $free_instr{tableidx : tableidx, typeuse : typeuse}(RETURN_CALL_INDIRECT_instr(tableidx, typeuse)) = $free_tableidx(tableidx) +++ $free_typeuse(typeuse) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:467.1-467.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:477.1-477.53 def $free_instr{tagidx : tagidx}(THROW_instr(tagidx)) = $free_tagidx(tagidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:468.1-468.32 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:478.1-478.32 def $free_instr(THROW_REF_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:469.1-470.99 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:479.1-480.99 def $free_instr{blocktype : blocktype, `catch*` : catch*, `instr*` : instr*}(TRY_TABLE_instr(blocktype, `%`_list(catch*{catch <- `catch*`},), instr*{instr <- `instr*`})) = $free_blocktype(blocktype) +++ $free_list($free_catch(catch)*{catch <- `catch*`}) +++ $free_list($free_instr(instr)*{instr <- `instr*`}) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:472.1-472.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:482.1-482.63 def $free_instr{numtype : numtype, numlit : num_(numtype)}(CONST_instr(numtype, numlit)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:473.1-473.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:483.1-483.60 def $free_instr{numtype : numtype, unop : unop_(numtype)}(UNOP_instr(numtype, unop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:474.1-474.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:484.1-484.62 def $free_instr{numtype : numtype, binop : binop_(numtype)}(BINOP_instr(numtype, binop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:475.1-475.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:485.1-485.64 def $free_instr{numtype : numtype, testop : testop_(numtype)}(TESTOP_instr(numtype, testop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:476.1-476.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:486.1-486.62 def $free_instr{numtype : numtype, relop : relop_(numtype)}(RELOP_instr(numtype, relop)) = $free_numtype(numtype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:477.1-478.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:487.1-488.55 def $free_instr{numtype_1 : numtype, numtype_2 : numtype, cvtop : cvtop__(numtype_2, numtype_1)}(CVTOP_instr(numtype_1, numtype_2, cvtop)) = $free_numtype(numtype_1) +++ $free_numtype(numtype_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:480.1-480.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:490.1-490.64 def $free_instr{vectype : vectype, veclit : vec_(vectype)}(VCONST_instr(vectype, veclit)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:481.1-481.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:491.1-491.64 def $free_instr{vectype : vectype, vvunop : vvunop}(VVUNOP_instr(vectype, vvunop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:482.1-482.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:492.1-492.66 def $free_instr{vectype : vectype, vvbinop : vvbinop}(VVBINOP_instr(vectype, vvbinop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:483.1-483.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:493.1-493.68 def $free_instr{vectype : vectype, vvternop : vvternop}(VVTERNOP_instr(vectype, vvternop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:484.1-484.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:494.1-494.68 def $free_instr{vectype : vectype, vvtestop : vvtestop}(VVTESTOP_instr(vectype, vvtestop)) = $free_vectype(vectype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:485.1-485.56 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:495.1-495.56 def $free_instr{shape : shape, vunop : vunop_(shape)}(VUNOP_instr(shape, vunop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:486.1-486.58 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:496.1-496.58 def $free_instr{shape : shape, vbinop : vbinop_(shape)}(VBINOP_instr(shape, vbinop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:487.1-487.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:497.1-497.60 def $free_instr{shape : shape, vternop : vternop_(shape)}(VTERNOP_instr(shape, vternop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:488.1-488.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:498.1-498.60 def $free_instr{shape : shape, vtestop : vtestop_(shape)}(VTESTOP_instr(shape, vtestop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:489.1-489.58 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:499.1-499.58 def $free_instr{shape : shape, vrelop : vrelop_(shape)}(VRELOP_instr(shape, vrelop)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:490.1-490.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:500.1-500.64 def $free_instr{ishape : ishape, vshiftop : vshiftop_(ishape)}(VSHIFTOP_instr(ishape, vshiftop)) = $free_shape(ishape!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:491.1-491.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:501.1-501.55 def $free_instr{ishape : ishape}(VBITMASK_instr(ishape)) = $free_shape(ishape!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:492.1-492.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:502.1-502.66 def $free_instr{bshape : bshape, vswizzlop : vswizzlop_(bshape)}(VSWIZZLOP_instr(bshape, vswizzlop)) = $free_shape(bshape!`%`_bshape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:493.1-493.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:503.1-503.64 def $free_instr{bshape : bshape, `laneidx*` : laneidx*}(VSHUFFLE_instr(bshape, laneidx*{laneidx <- `laneidx*`})) = $free_shape(bshape!`%`_bshape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:494.1-495.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:504.1-505.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, vextunop : vextunop__(ishape_2, ishape_1)}(VEXTUNOP_instr(ishape_1, ishape_2, vextunop)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:496.1-497.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:506.1-507.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, vextbinop : vextbinop__(ishape_2, ishape_1)}(VEXTBINOP_instr(ishape_1, ishape_2, vextbinop)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:498.1-499.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:508.1-509.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, vextternop : vextternop__(ishape_2, ishape_1)}(VEXTTERNOP_instr(ishape_1, ishape_2, vextternop)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:500.1-501.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:510.1-511.49 def $free_instr{ishape_1 : ishape, ishape_2 : ishape, sx : sx}(VNARROW_instr(ishape_1, ishape_2, sx)) = $free_shape(ishape_1!`%`_ishape.0) +++ $free_shape(ishape_2!`%`_ishape.0) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:502.1-503.47 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:512.1-513.47 def $free_instr{shape_1 : shape, shape_2 : shape, vcvtop : vcvtop__(shape_2, shape_1)}(VCVTOP_instr(shape_1, shape_2, vcvtop)) = $free_shape(shape_1) +++ $free_shape(shape_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:504.1-504.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:514.1-514.51 def $free_instr{shape : shape}(VSPLAT_instr(shape)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:505.1-505.70 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:515.1-515.70 def $free_instr{shape : shape, `sx?` : sx?, laneidx : laneidx}(VEXTRACT_LANE_instr(shape, sx?{sx <- `sx?`}, laneidx)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:506.1-506.66 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:516.1-516.66 def $free_instr{shape : shape, laneidx : laneidx}(VREPLACE_LANE_instr(shape, laneidx)) = $free_shape(shape) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:508.1-508.62 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:518.1-518.62 def $free_instr{heaptype : heaptype}(`REF.NULL`_instr(heaptype)) = $free_heaptype(heaptype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:509.1-509.34 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:519.1-519.34 def $free_instr(`REF.IS_NULL`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:510.1-510.38 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:520.1-520.38 def $free_instr(`REF.AS_NON_NULL`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:511.1-511.29 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:521.1-521.29 def $free_instr(`REF.EQ`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:512.1-512.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:522.1-522.59 def $free_instr{reftype : reftype}(`REF.TEST`_instr(reftype)) = $free_reftype(reftype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:513.1-513.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:523.1-523.59 def $free_instr{reftype : reftype}(`REF.CAST`_instr(reftype)) = $free_reftype(reftype) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:514.1-514.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:524.1-524.59 def $free_instr{funcidx : funcidx}(`REF.FUNC`_instr(funcidx)) = $free_funcidx(funcidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:515.1-515.30 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:525.1-525.30 def $free_instr(`REF.I31`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:517.1-517.33 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:527.1-527.33 def $free_instr{sx : sx}(`I31.GET`_instr(sx)) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:519.1-519.61 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:529.1-529.61 def $free_instr{typeidx : typeidx}(`STRUCT.NEW`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:520.1-520.69 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:530.1-530.69 def $free_instr{typeidx : typeidx}(`STRUCT.NEW_DEFAULT`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:521.1-521.69 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:531.1-531.69 def $free_instr{`sx?` : sx?, typeidx : typeidx, u32 : u32}(`STRUCT.GET`_instr(sx?{sx <- `sx?`}, typeidx, u32)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:522.1-522.65 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:532.1-532.65 def $free_instr{typeidx : typeidx, u32 : u32}(`STRUCT.SET`_instr(typeidx, u32)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:524.1-524.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:534.1-534.60 def $free_instr{typeidx : typeidx}(`ARRAY.NEW`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:525.1-525.68 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:535.1-535.68 def $free_instr{typeidx : typeidx}(`ARRAY.NEW_DEFAULT`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:526.1-526.70 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:536.1-536.70 def $free_instr{typeidx : typeidx, u32 : u32}(`ARRAY.NEW_FIXED`_instr(typeidx, u32)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:527.1-528.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:537.1-538.51 def $free_instr{typeidx : typeidx, dataidx : dataidx}(`ARRAY.NEW_DATA`_instr(typeidx, dataidx)) = $free_typeidx(typeidx) +++ $free_dataidx(dataidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:529.1-530.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:539.1-540.51 def $free_instr{typeidx : typeidx, elemidx : elemidx}(`ARRAY.NEW_ELEM`_instr(typeidx, elemidx)) = $free_typeidx(typeidx) +++ $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:531.1-531.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:541.1-541.64 def $free_instr{`sx?` : sx?, typeidx : typeidx}(`ARRAY.GET`_instr(sx?{sx <- `sx?`}, typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:532.1-532.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:542.1-542.60 def $free_instr{typeidx : typeidx}(`ARRAY.SET`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:533.1-533.32 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:543.1-543.32 def $free_instr(`ARRAY.LEN`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:534.1-534.61 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:544.1-544.61 def $free_instr{typeidx : typeidx}(`ARRAY.FILL`_instr(typeidx)) = $free_typeidx(typeidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:535.1-536.55 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:545.1-546.55 def $free_instr{typeidx_1 : typeidx, typeidx_2 : typeidx}(`ARRAY.COPY`_instr(typeidx_1, typeidx_2)) = $free_typeidx(typeidx_1) +++ $free_typeidx(typeidx_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:537.1-538.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:547.1-548.51 def $free_instr{typeidx : typeidx, dataidx : dataidx}(`ARRAY.INIT_DATA`_instr(typeidx, dataidx)) = $free_typeidx(typeidx) +++ $free_dataidx(dataidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:539.1-540.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:549.1-550.51 def $free_instr{typeidx : typeidx, elemidx : elemidx}(`ARRAY.INIT_ELEM`_instr(typeidx, elemidx)) = $free_typeidx(typeidx) +++ $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:542.1-542.41 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:552.1-552.41 def $free_instr(`EXTERN.CONVERT_ANY`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:543.1-543.41 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:553.1-553.41 def $free_instr(`ANY.CONVERT_EXTERN`_instr) = {TYPES [], FUNCS [], GLOBALS [], TABLES [], MEMS [], ELEMS [], DATAS [], LOCALS [], LABELS [], TAGS []} - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:545.1-545.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:555.1-555.63 def $free_instr{localidx : localidx}(`LOCAL.GET`_instr(localidx)) = $free_localidx(localidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:546.1-546.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:556.1-556.63 def $free_instr{localidx : localidx}(`LOCAL.SET`_instr(localidx)) = $free_localidx(localidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:547.1-547.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:557.1-557.63 def $free_instr{localidx : localidx}(`LOCAL.TEE`_instr(localidx)) = $free_localidx(localidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:549.1-549.67 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:559.1-559.67 def $free_instr{globalidx : globalidx}(`GLOBAL.GET`_instr(globalidx)) = $free_globalidx(globalidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:550.1-550.67 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:560.1-560.67 def $free_instr{globalidx : globalidx}(`GLOBAL.SET`_instr(globalidx)) = $free_globalidx(globalidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:552.1-552.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:562.1-562.63 def $free_instr{tableidx : tableidx}(`TABLE.GET`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:553.1-553.63 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:563.1-563.63 def $free_instr{tableidx : tableidx}(`TABLE.SET`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:554.1-554.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:564.1-564.64 def $free_instr{tableidx : tableidx}(`TABLE.SIZE`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:555.1-555.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:565.1-565.64 def $free_instr{tableidx : tableidx}(`TABLE.GROW`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:556.1-556.64 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:566.1-566.64 def $free_instr{tableidx : tableidx}(`TABLE.FILL`_instr(tableidx)) = $free_tableidx(tableidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:557.1-558.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:567.1-568.59 def $free_instr{tableidx_1 : tableidx, tableidx_2 : tableidx}(`TABLE.COPY`_instr(tableidx_1, tableidx_2)) = $free_tableidx(tableidx_1) +++ $free_tableidx(tableidx_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:559.1-560.53 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:569.1-570.53 def $free_instr{tableidx : tableidx, elemidx : elemidx}(`TABLE.INIT`_instr(tableidx, elemidx)) = $free_tableidx(tableidx) +++ $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:561.1-561.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:571.1-571.60 def $free_instr{elemidx : elemidx}(`ELEM.DROP`_instr(elemidx)) = $free_elemidx(elemidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:563.1-564.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:573.1-574.49 def $free_instr{numtype : numtype, `loadop?` : loadop_(numtype)?, memidx : memidx, memarg : memarg}(LOAD_instr(numtype, loadop?{loadop <- `loadop?`}, memidx, memarg)) = $free_numtype(numtype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:565.1-566.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:575.1-576.49 def $free_instr{numtype : numtype, `storeop?` : storeop_(numtype)?, memidx : memidx, memarg : memarg}(STORE_instr(numtype, storeop?{storeop <- `storeop?`}, memidx, memarg)) = $free_numtype(numtype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:567.1-568.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:577.1-578.49 def $free_instr{vectype : vectype, `vloadop?` : vloadop_(vectype)?, memidx : memidx, memarg : memarg}(VLOAD_instr(vectype, vloadop?{vloadop <- `vloadop?`}, memidx, memarg)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:569.1-570.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:579.1-580.49 def $free_instr{vectype : vectype, sz : sz, memidx : memidx, memarg : memarg, laneidx : laneidx}(VLOAD_LANE_instr(vectype, sz, memidx, memarg, laneidx)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:571.1-572.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:581.1-582.49 def $free_instr{vectype : vectype, memidx : memidx, memarg : memarg}(VSTORE_instr(vectype, memidx, memarg)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:573.1-574.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:583.1-584.49 def $free_instr{vectype : vectype, sz : sz, memidx : memidx, memarg : memarg, laneidx : laneidx}(VSTORE_LANE_instr(vectype, sz, memidx, memarg, laneidx)) = $free_vectype(vectype) +++ $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:575.1-575.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:585.1-585.59 def $free_instr{memidx : memidx}(`MEMORY.SIZE`_instr(memidx)) = $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:576.1-576.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:586.1-586.59 def $free_instr{memidx : memidx}(`MEMORY.GROW`_instr(memidx)) = $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:577.1-577.59 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:587.1-587.59 def $free_instr{memidx : memidx}(`MEMORY.FILL`_instr(memidx)) = $free_memidx(memidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:578.1-579.51 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:588.1-589.51 def $free_instr{memidx_1 : memidx, memidx_2 : memidx}(`MEMORY.COPY`_instr(memidx_1, memidx_2)) = $free_memidx(memidx_1) +++ $free_memidx(memidx_2) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:580.1-581.49 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:590.1-591.49 def $free_instr{memidx : memidx, dataidx : dataidx}(`MEMORY.INIT`_instr(memidx, dataidx)) = $free_memidx(memidx) +++ $free_dataidx(dataidx) - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:582.1-582.60 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:592.1-592.60 def $free_instr{dataidx : dataidx}(`DATA.DROP`_instr(dataidx)) = $free_dataidx(dataidx) -;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:422.1-422.31 +;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:432.1-432.31 def $free_block(instr*) : free - ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:590.1-591.47 + ;; ../../../../specification/wasm-latest/1.3-syntax.instructions.spectec:600.1-601.47 def $free_block{`instr*` : instr*, free : free}(instr*{instr <- `instr*`}) = free[LABELS_free = $shift_labelidxs(free.LABELS_free)] -- if (free = $free_list($free_instr(instr)*{instr <- `instr*`})) } @@ -27813,109 +27977,117 @@ relation Instr_ok: `%|-%:%`(context, instr, instrtype) rule cvtop{C : context, nt_1 : numtype, nt_2 : numtype, cvtop : cvtop__(nt_2, nt_1)}: `%|-%:%`(C, CVTOP_instr(nt_1, nt_2, cvtop), `%->_%%`_instrtype(`%`_resulttype([(nt_2 : numtype <: valtype)],), [], `%`_resulttype([(nt_1 : numtype <: valtype)],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:541.1-542.35 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:538.1-539.50 + rule wideop{C : context, nt : numtype, wideop_nt : wideop_(nt)}: + `%|-%:%`(C, WIDEOP_instr(nt, wideop_nt), `%->_%%`_instrtype(`%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype) (nt : numtype <: valtype) (nt : numtype <: valtype)],), [], `%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype)],))) + + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:541.1-542.50 + rule extwideop{C : context, nt : numtype, extwideop_nt : extwideop_(nt)}: + `%|-%:%`(C, EXTWIDEOP_instr(nt, extwideop_nt), `%->_%%`_instrtype(`%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype)],), [], `%`_resulttype([(nt : numtype <: valtype) (nt : numtype <: valtype)],))) + + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:547.1-548.35 rule vconst{C : context, c : vec_(V128_Vnn)}: `%|-%:%`(C, VCONST_instr(V128_vectype, c), `%->_%%`_instrtype(`%`_resulttype([],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:544.1-545.41 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:550.1-551.41 rule vvunop{C : context, vvunop : vvunop}: `%|-%:%`(C, VVUNOP_instr(V128_vectype, vvunop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:547.1-548.48 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:553.1-554.48 rule vvbinop{C : context, vvbinop : vvbinop}: `%|-%:%`(C, VVBINOP_instr(V128_vectype, vvbinop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:550.1-551.55 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:556.1-557.55 rule vvternop{C : context, vvternop : vvternop}: `%|-%:%`(C, VVTERNOP_instr(V128_vectype, vvternop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:553.1-554.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:559.1-560.44 rule vvtestop{C : context, vvtestop : vvtestop}: `%|-%:%`(C, VVTESTOP_instr(V128_vectype, vvtestop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([I32_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:556.1-557.37 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:562.1-563.37 rule vunop{C : context, sh : shape, vunop : vunop_(sh)}: `%|-%:%`(C, VUNOP_instr(sh, vunop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:559.1-560.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:565.1-566.44 rule vbinop{C : context, sh : shape, vbinop : vbinop_(sh)}: `%|-%:%`(C, VBINOP_instr(sh, vbinop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:562.1-563.51 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:568.1-569.51 rule vternop{C : context, sh : shape, vternop : vternop_(sh)}: `%|-%:%`(C, VTERNOP_instr(sh, vternop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:565.1-566.40 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:571.1-572.40 rule vtestop{C : context, sh : shape, vtestop : vtestop_(sh)}: `%|-%:%`(C, VTESTOP_instr(sh, vtestop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([I32_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:568.1-569.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:574.1-575.44 rule vrelop{C : context, sh : shape, vrelop : vrelop_(sh)}: `%|-%:%`(C, VRELOP_instr(sh, vrelop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:571.1-572.47 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:577.1-578.47 rule vshiftop{C : context, sh : ishape, vshiftop : vshiftop_(sh)}: `%|-%:%`(C, VSHIFTOP_instr(sh, vshiftop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype I32_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:574.1-575.33 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:580.1-581.33 rule vbitmask{C : context, sh : ishape}: `%|-%:%`(C, VBITMASK_instr(sh), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([I32_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:577.1-578.50 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:583.1-584.50 rule vswizzlop{C : context, sh : bshape, vswizzlop : vswizzlop_(sh)}: `%|-%:%`(C, VSWIZZLOP_instr(sh, vswizzlop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:580.1-582.29 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:586.1-588.29 rule vshuffle{C : context, sh : bshape, `i*` : laneidx*}: `%|-%:%`(C, VSHUFFLE_instr(sh, i*{i <- `i*`}), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) -- (if (i!`%`_laneidx.0 < (2 * $dim(sh!`%`_bshape.0)!`%`_dim.0)))*{i <- `i*`} - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:584.1-585.44 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:590.1-591.44 rule vsplat{C : context, sh : shape}: `%|-%:%`(C, VSPLAT_instr(sh), `%->_%%`_instrtype(`%`_resulttype([($unpackshape(sh) : numtype <: valtype)],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:587.1-589.21 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:593.1-595.21 rule vextract_lane{C : context, sh : shape, `sx?` : sx?, i : laneidx}: `%|-%:%`(C, VEXTRACT_LANE_instr(sh, sx?{sx <- `sx?`}, i), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([($unpackshape(sh) : numtype <: valtype)],))) -- if (i!`%`_laneidx.0 < $dim(sh)!`%`_dim.0) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:591.1-593.21 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:597.1-599.21 rule vreplace_lane{C : context, sh : shape, i : laneidx}: `%|-%:%`(C, VREPLACE_LANE_instr(sh, i), `%->_%%`_instrtype(`%`_resulttype([V128_valtype ($unpackshape(sh) : numtype <: valtype)],), [], `%`_resulttype([V128_valtype],))) -- if (i!`%`_laneidx.0 < $dim(sh)!`%`_dim.0) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:595.1-596.50 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:601.1-602.50 rule vextunop{C : context, sh_1 : ishape, sh_2 : ishape, vextunop : vextunop__(sh_2, sh_1)}: `%|-%:%`(C, VEXTUNOP_instr(sh_1, sh_2, vextunop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:598.1-599.57 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:604.1-605.57 rule vextbinop{C : context, sh_1 : ishape, sh_2 : ishape, vextbinop : vextbinop__(sh_2, sh_1)}: `%|-%:%`(C, VEXTBINOP_instr(sh_1, sh_2, vextbinop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:601.1-602.64 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:607.1-608.64 rule vextternop{C : context, sh_1 : ishape, sh_2 : ishape, vextternop : vextternop__(sh_2, sh_1)}: `%|-%:%`(C, VEXTTERNOP_instr(sh_1, sh_2, vextternop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:604.1-605.48 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:610.1-611.48 rule vnarrow{C : context, sh_1 : ishape, sh_2 : ishape, sx : sx}: `%|-%:%`(C, VNARROW_instr(sh_1, sh_2, sx), `%->_%%`_instrtype(`%`_resulttype([V128_valtype V128_valtype],), [], `%`_resulttype([V128_valtype],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:607.1-608.46 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:613.1-614.46 rule vcvtop{C : context, sh_1 : shape, sh_2 : shape, vcvtop : vcvtop__(sh_2, sh_1)}: `%|-%:%`(C, VCVTOP_instr(sh_1, sh_2, vcvtop), `%->_%%`_instrtype(`%`_resulttype([V128_valtype],), [], `%`_resulttype([V128_valtype],))) ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:6.1-6.96 relation Instrs_ok: `%|-%:%`(context, instr*, instrtype) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:613.1-614.24 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:619.1-620.24 rule empty{C : context}: `%|-%:%`(C, [], `%->_%%`_instrtype(`%`_resulttype([],), [], `%`_resulttype([],))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:616.1-618.46 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:622.1-624.46 rule instr{C : context, instr : instr, `t_1*` : valtype*, `x*` : idx*, `t_2*` : valtype*}: `%|-%:%`(C, [instr], `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) -- Instr_ok: `%|-%:%`(C, instr, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:621.1-625.82 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:627.1-631.82 rule seq{C : context, `instr_1*` : instr*, `instr_2*` : instr*, `t_1*` : valtype*, `x_1*` : idx*, `x_2*` : idx*, `t_3*` : valtype*, `t_2*` : valtype*, `init*` : init*, `t*` : valtype*}: `%|-%:%`(C, instr_1*{instr_1 <- `instr_1*`} ++ instr_2*{instr_2 <- `instr_2*`}, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x_1*{x_1 <- `x_1*`} ++ x_2*{x_2 <- `x_2*`}, `%`_resulttype(t_3*{t_3 <- `t_3*`},))) -- Instrs_ok: `%|-%:%`(C, instr_1*{instr_1 <- `instr_1*`}, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x_1*{x_1 <- `x_1*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) @@ -27925,14 +28097,14 @@ relation Instrs_ok: `%|-%:%`(context, instr*, instrtype) -- (if (C.LOCALS_context[x_1!`%`_idx.0] = `%%`_localtype(init, t)))*{init <- `init*`, t <- `t*`, x_1 <- `x_1*`} -- Instrs_ok: `%|-%:%`($with_locals(C, x_1*{x_1 <- `x_1*`}, `%%`_localtype(SET_init, t)*{t <- `t*`}), instr_2*{instr_2 <- `instr_2*`}, `%->_%%`_instrtype(`%`_resulttype(t_2*{t_2 <- `t_2*`},), x_2*{x_2 <- `x_2*`}, `%`_resulttype(t_3*{t_3 <- `t_3*`},))) - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:627.1-631.33 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:633.1-637.33 rule sub{C : context, `instr*` : instr*, it' : instrtype, it : instrtype}: `%|-%:%`(C, instr*{instr <- `instr*`}, it') -- Instrs_ok: `%|-%:%`(C, instr*{instr <- `instr*`}, it) -- Instrtype_sub: `%|-%<:%`(C, it, it') -- Instrtype_ok: `%|-%:OK`(C, it') - ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:634.1-637.33 + ;; ../../../../specification/wasm-latest/2.3-validation.instructions.spectec:640.1-643.33 rule frame{C : context, `instr*` : instr*, `t*` : valtype*, `t_1*` : valtype*, `x*` : idx*, `t_2*` : valtype*}: `%|-%:%`(C, instr*{instr <- `instr*`}, `%->_%%`_instrtype(`%`_resulttype(t*{t <- `t*`} ++ t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t*{t <- `t*`} ++ t_2*{t_2 <- `t_2*`},))) -- Instrs_ok: `%|-%:%`(C, instr*{instr <- `instr*`}, `%->_%%`_instrtype(`%`_resulttype(t_1*{t_1 <- `t_1*`},), x*{x <- `x*`}, `%`_resulttype(t_2*{t_2 <- `t_2*`},))) @@ -28913,6 +29085,33 @@ def $cvtop__(numtype_1 : numtype, numtype_2 : numtype, cvtop__ : cvtop__(numtype def $cvtop__{Fnn_1 : Fnn, Inn_2 : Inn, f_1 : num_((Fnn_1 : Fnn <: numtype))}((Fnn_1 : Fnn <: numtype), (Inn_2 : Inn <: numtype), REINTERPRET_cvtop__, f_1) = [$reinterpret__((Fnn_1 : Fnn <: numtype), (Inn_2 : Inn <: numtype), f_1)] -- if ($size((Fnn_1 : Fnn <: numtype)) = $size((Inn_2 : Inn <: numtype))) +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $iconcat_(numtype : numtype, N : N, num_ : num_(numtype), num_ : num_(numtype)) : iN(N) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $iconcat_{Inn : Inn, N : N, i_1 : num_((Inn : Inn <: numtype)), i_2 : num_((Inn : Inn <: numtype))}((Inn : Inn <: numtype), N, i_1, i_2) = $ior_(N, $iextend_(N, $sizenn((Inn : Inn <: numtype)), U_sx, `%`_iN(i_1!`%`_num_.0,)), $ishl_(N, $iextend_(N, $sizenn((Inn : Inn <: numtype)), U_sx, `%`_iN(i_2!`%`_num_.0,)), `%`_u32($sizenn((Inn : Inn <: numtype)),))) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $isplit_(numtype : numtype, N : N, iN : iN(N)) : (num_(numtype), num_(numtype)) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $isplit_{Inn : Inn, N : N, i_1 : iN(N)}((Inn : Inn <: numtype), N, i_1) = ($wrap__(N, $sizenn((Inn : Inn <: numtype)), i_1), $wrap__(N, $sizenn((Inn : Inn <: numtype)), $ishr_(N, U_sx, i_1, `%`_u32($sizenn((Inn : Inn <: numtype)),)))) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $wideop_(numtype : numtype, N : N, wideop_ : wideop_(numtype), iN : iN(N), iN : iN(N)) : iN(N) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $wideop_{Inn : Inn, N : N, i_1 : iN(N), i_2 : iN(N)}((Inn : Inn <: numtype), N, ADD128_wideop_, i_1, i_2) = $iadd_(N, i_1, i_2) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $wideop_{Inn : Inn, N : N, i_1 : iN(N), i_2 : iN(N)}((Inn : Inn <: numtype), N, SUB128_wideop_, i_1, i_2) = $isub_(N, i_1, i_2) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $wideop__(numtype : numtype, wideop_ : wideop_(numtype), num_ : num_(numtype), num_ : num_(numtype), num_ : num_(numtype), num_ : num_(numtype)) : (num_(numtype), num_(numtype)) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $wideop__{Inn : Inn, wideop : wideop_((Inn : Inn <: numtype)), i_1 : num_((Inn : Inn <: numtype)), i_2 : num_((Inn : Inn <: numtype)), i_3 : num_((Inn : Inn <: numtype)), i_4 : num_((Inn : Inn <: numtype))}((Inn : Inn <: numtype), wideop, i_1, i_2, i_3, i_4) = $isplit_((Inn : Inn <: numtype), 128, $wideop_((Inn : Inn <: numtype), 128, wideop, $iconcat_((Inn : Inn <: numtype), 128, i_1, i_2), $iconcat_((Inn : Inn <: numtype), 128, i_3, i_4))) + +;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec +def $extwideop__(numtype : numtype, extwideop_ : extwideop_(numtype), num_ : num_(numtype), num_ : num_(numtype)) : (num_(numtype), num_(numtype)) + ;; ../../../../specification/wasm-latest/3.1-numerics.scalar.spectec + def $extwideop__{Inn : Inn, sx : sx, i_1 : num_((Inn : Inn <: numtype)), i_2 : num_((Inn : Inn <: numtype))}((Inn : Inn <: numtype), MUL_WIDE_extwideop_(sx), i_1, i_2) = $isplit_((Inn : Inn <: numtype), 128, $imul_(128, $iextend_(128, $sizenn((Inn : Inn <: numtype)), sx, `%`_iN(i_1!`%`_num_.0,)), $iextend_(128, $sizenn((Inn : Inn <: numtype)), sx, `%`_iN(i_2!`%`_num_.0,)))) + ;; ../../../../specification/wasm-latest/3.2-numerics.vector.spectec def $lanes_(shape : shape, vec_ : vec_(V128_Vnn)) : lane_($lanetype(shape))* @@ -30242,6 +30441,18 @@ relation Step_pure: `%~>%`(instr*, instr*) `%~>%`([CONST_instr(nt_1, c_1) CVTOP_instr(nt_2, nt_1, cvtop)], [TRAP_instr]) -- if ($cvtop__(nt_1, nt_2, cvtop, c_1) = []) + ;; ../../../../specification/wasm-latest/4.3-execution.instructions.spectec + rule wideop{nt : numtype, c_1 : num_(nt), c_2 : num_(nt), c_3 : num_(nt), c_4 : num_(nt), wideop_nt : wideop_(nt), c_5 : num_(nt), c_6 : num_(nt)}: + `%~>%`([CONST_instr(nt, c_1) CONST_instr(nt, c_2) CONST_instr(nt, c_3) CONST_instr(nt, c_4) WIDEOP_instr(nt, wideop_nt)], [CONST_instr(nt, c_5) CONST_instr(nt, c_6)]) + -- if (|[$wideop__(nt, wideop_nt, c_1, c_2, c_3, c_4)]| > 0) + -- if ((c_5, c_6) <- [$wideop__(nt, wideop_nt, c_1, c_2, c_3, c_4)]) + + ;; ../../../../specification/wasm-latest/4.3-execution.instructions.spectec + rule extwideop{nt : numtype, c_1 : num_(nt), c_2 : num_(nt), extwideop_nt : extwideop_(nt), c_5 : num_(nt), c_6 : num_(nt)}: + `%~>%`([CONST_instr(nt, c_1) CONST_instr(nt, c_2) EXTWIDEOP_instr(nt, extwideop_nt)], [CONST_instr(nt, c_5) CONST_instr(nt, c_6)]) + -- if (|[$extwideop__(nt, extwideop_nt, c_1, c_2)]| > 0) + -- if ((c_5, c_6) <- [$extwideop__(nt, extwideop_nt, c_1, c_2)]) + ;; ../../../../specification/wasm-latest/4.3-execution.instructions.spectec rule vvunop{c_1 : vec_(V128_Vnn), vvunop : vvunop, c : vec_(V128_Vnn)}: `%~>%`([VCONST_instr(V128_vectype, c_1) VVUNOP_instr(V128_vectype, vvunop)], [VCONST_instr(V128_vectype, c)]) @@ -32671,7 +32882,7 @@ grammar Blaneidx : laneidx ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec rec { -;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:793.1-807.71 +;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:800.1-814.71 grammar Binstr : instr ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:8.5-8.24 prod 0x00 => UNREACHABLE_instr @@ -33157,517 +33368,525 @@ grammar Binstr : instr prod {{0xFC} {`%`_u32(6,):Bu32}} => CVTOP_instr(I64_numtype, F64_numtype, TRUNC_SAT_cvtop__(S_sx)) ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:386.5-386.45 prod {{0xFC} {`%`_u32(7,):Bu32}} => CVTOP_instr(I64_numtype, F64_numtype, TRUNC_SAT_cvtop__(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:396.5-396.50 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:390.5-390.38 + prod {{0xFC} {`%`_u32(13,):Bu32}} => WIDEOP_instr(I64_numtype, ADD128_wideop_) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:391.5-391.38 + prod {{0xFC} {`%`_u32(14,):Bu32}} => WIDEOP_instr(I64_numtype, SUB128_wideop_) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:392.5-392.45 + prod {{0xFC} {`%`_u32(15,):Bu32}} => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(S_sx)) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:393.5-393.45 + prod {{0xFC} {`%`_u32(16,):Bu32}} => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(U_sx)) + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:403.5-403.50 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(0,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:397.5-397.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:404.5-404.70 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(1,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(8,), `%`_M(8,), S_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:398.5-398.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:405.5-405.70 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(2,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(8,), `%`_M(8,), U_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:399.5-399.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:406.5-406.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(3,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(16,), `%`_M(4,), S_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:400.5-400.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:407.5-407.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(4,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(16,), `%`_M(4,), U_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:401.5-401.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:408.5-408.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(5,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(32,), `%`_M(2,), S_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:402.5-402.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:409.5-409.71 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(6,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(`SHAPE%X%_%`_vloadop_(`%`_sz(32,), `%`_M(2,), U_sx)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:403.5-403.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:410.5-410.61 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(7,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(8,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:404.5-404.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:411.5-411.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(8,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(16,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:405.5-405.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:412.5-412.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(9,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(32,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:406.5-406.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:413.5-413.63 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(10,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(SPLAT_vloadop_(`%`_sz(64,))), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:407.5-407.52 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:414.5-414.52 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(11,):Bu32} {(x, ao):Bmemarg}} => VSTORE_instr(V128_vectype, x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:408.5-408.72 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:415.5-415.72 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(84,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(8,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:409.5-409.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:416.5-416.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(85,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(16,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:410.5-410.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:417.5-417.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(86,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(32,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:411.5-411.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:418.5-418.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(87,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VLOAD_LANE_instr(V128_vectype, `%`_sz(64,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:412.5-412.73 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:419.5-419.73 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(88,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(8,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:413.5-413.74 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:420.5-420.74 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(89,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(16,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:414.5-414.74 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:421.5-421.74 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(90,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(32,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:415.5-415.74 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:422.5-422.74 prod{x : idx, ao : memarg, i : laneidx} {{0xFD} {`%`_u32(91,):Bu32} {(x, ao):Bmemarg} {i:Blaneidx}} => VSTORE_LANE_instr(V128_vectype, `%`_sz(64,), x, ao, i) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:416.5-416.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:423.5-423.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(92,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(ZERO_vloadop_(`%`_sz(32,),)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:417.5-417.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:424.5-424.62 prod{x : idx, ao : memarg} {{0xFD} {`%`_u32(93,):Bu32} {(x, ao):Bmemarg}} => VLOAD_instr(V128_vectype, ?(ZERO_vloadop_(`%`_sz(64,),)), x, ao) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:421.5-421.72 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:428.5-428.72 prod{`b*` : byte*} {{0xFD} {`%`_u32(12,):Bu32} {b:Bbyte^16{b <- `b*`}}} => VCONST_instr(V128_vectype, $inv_ibytes_(128, b^16{b <- `b*`})) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:425.5-425.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:432.5-432.61 prod{`l*` : labelidx*} {{0xFD} {`%`_u32(13,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx^16{l <- `l*`}}} => VSHUFFLE_instr(`%`_bshape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), `%`_laneidx(l!`%`_labelidx.0,)^16{l <- `l*`}) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:426.5-426.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:433.5-433.49 prod {{0xFD} {`%`_u32(14,):Bu32}} => VSWIZZLOP_instr(`%`_bshape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SWIZZLE_vswizzlop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:427.5-427.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:434.5-434.58 prod {{0xFD} {`%`_u32(256,):Bu32}} => VSWIZZLOP_instr(`%`_bshape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), RELAXED_SWIZZLE_vswizzlop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:431.5-431.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:438.5-438.38 prod {{0xFD} {`%`_u32(15,):Bu32}} => VSPLAT_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:432.5-432.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:439.5-439.38 prod {{0xFD} {`%`_u32(16,):Bu32}} => VSPLAT_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:433.5-433.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:440.5-440.38 prod {{0xFD} {`%`_u32(17,):Bu32}} => VSPLAT_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:434.5-434.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:441.5-441.38 prod {{0xFD} {`%`_u32(18,):Bu32}} => VSPLAT_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:435.5-435.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:442.5-442.38 prod {{0xFD} {`%`_u32(19,):Bu32}} => VSPLAT_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:436.5-436.38 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:443.5-443.38 prod {{0xFD} {`%`_u32(20,):Bu32}} => VSPLAT_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:440.5-440.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:447.5-447.60 prod{l : labelidx} {{0xFD} {`%`_u32(21,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ?(S_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:441.5-441.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:448.5-448.60 prod{l : labelidx} {{0xFD} {`%`_u32(22,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ?(U_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:442.5-442.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:449.5-449.58 prod{l : labelidx} {{0xFD} {`%`_u32(23,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:443.5-443.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:450.5-450.60 prod{l : labelidx} {{0xFD} {`%`_u32(24,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ?(S_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:444.5-444.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:451.5-451.60 prod{l : labelidx} {{0xFD} {`%`_u32(25,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ?(U_sx), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:445.5-445.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:452.5-452.58 prod{l : labelidx} {{0xFD} {`%`_u32(26,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:446.5-446.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:453.5-453.58 prod{l : labelidx} {{0xFD} {`%`_u32(27,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:447.5-447.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:454.5-454.58 prod{l : labelidx} {{0xFD} {`%`_u32(28,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:448.5-448.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:455.5-455.58 prod{l : labelidx} {{0xFD} {`%`_u32(29,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:449.5-449.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:456.5-456.58 prod{l : labelidx} {{0xFD} {`%`_u32(30,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:450.5-450.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:457.5-457.58 prod{l : labelidx} {{0xFD} {`%`_u32(31,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:451.5-451.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:458.5-458.58 prod{l : labelidx} {{0xFD} {`%`_u32(32,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:452.5-452.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:459.5-459.58 prod{l : labelidx} {{0xFD} {`%`_u32(33,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VEXTRACT_LANE_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), ?(), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:453.5-453.58 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:460.5-460.58 prod{l : labelidx} {{0xFD} {`%`_u32(34,):Bu32} {`%`_laneidx(l!`%`_labelidx.0,):Blaneidx}} => VREPLACE_LANE_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%`_laneidx(l!`%`_labelidx.0,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:457.5-457.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:464.5-464.41 prod {{0xFD} {`%`_u32(35,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:458.5-458.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:465.5-465.41 prod {{0xFD} {`%`_u32(36,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:459.5-459.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:466.5-466.43 prod {{0xFD} {`%`_u32(37,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:460.5-460.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:467.5-467.43 prod {{0xFD} {`%`_u32(38,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:461.5-461.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:468.5-468.43 prod {{0xFD} {`%`_u32(39,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:462.5-462.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:469.5-469.43 prod {{0xFD} {`%`_u32(40,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:463.5-463.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:470.5-470.43 prod {{0xFD} {`%`_u32(41,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:464.5-464.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:471.5-471.43 prod {{0xFD} {`%`_u32(42,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), LE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:465.5-465.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:472.5-472.43 prod {{0xFD} {`%`_u32(43,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:466.5-466.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:473.5-473.43 prod {{0xFD} {`%`_u32(44,):Bu32}} => VRELOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), GE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:470.5-470.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:477.5-477.41 prod {{0xFD} {`%`_u32(45,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:471.5-471.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:478.5-478.41 prod {{0xFD} {`%`_u32(46,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:472.5-472.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:479.5-479.43 prod {{0xFD} {`%`_u32(47,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:473.5-473.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:480.5-480.43 prod {{0xFD} {`%`_u32(48,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:474.5-474.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:481.5-481.43 prod {{0xFD} {`%`_u32(49,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:475.5-475.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:482.5-482.43 prod {{0xFD} {`%`_u32(50,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:476.5-476.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:483.5-483.43 prod {{0xFD} {`%`_u32(51,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:477.5-477.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:484.5-484.43 prod {{0xFD} {`%`_u32(52,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), LE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:478.5-478.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:485.5-485.43 prod {{0xFD} {`%`_u32(53,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:479.5-479.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:486.5-486.43 prod {{0xFD} {`%`_u32(54,):Bu32}} => VRELOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), GE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:483.5-483.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:490.5-490.41 prod {{0xFD} {`%`_u32(55,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:484.5-484.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:491.5-491.41 prod {{0xFD} {`%`_u32(56,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:485.5-485.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:492.5-492.43 prod {{0xFD} {`%`_u32(57,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:486.5-486.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:493.5-493.43 prod {{0xFD} {`%`_u32(58,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:487.5-487.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:494.5-494.43 prod {{0xFD} {`%`_u32(59,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:488.5-488.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:495.5-495.43 prod {{0xFD} {`%`_u32(60,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GT_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:489.5-489.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:496.5-496.43 prod {{0xFD} {`%`_u32(61,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:490.5-490.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:497.5-497.43 prod {{0xFD} {`%`_u32(62,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), LE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:491.5-491.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:498.5-498.43 prod {{0xFD} {`%`_u32(63,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:492.5-492.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:499.5-499.43 prod {{0xFD} {`%`_u32(64,):Bu32}} => VRELOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), GE_vrelop_(U_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:496.5-496.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:503.5-503.41 prod {{0xFD} {`%`_u32(65,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:497.5-497.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:504.5-504.41 prod {{0xFD} {`%`_u32(66,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:498.5-498.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:505.5-505.41 prod {{0xFD} {`%`_u32(67,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), LT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:499.5-499.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:506.5-506.41 prod {{0xFD} {`%`_u32(68,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), GT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:500.5-500.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:507.5-507.41 prod {{0xFD} {`%`_u32(69,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), LE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:501.5-501.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:508.5-508.41 prod {{0xFD} {`%`_u32(70,):Bu32}} => VRELOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), GE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:505.5-505.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:512.5-512.41 prod {{0xFD} {`%`_u32(71,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:506.5-506.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:513.5-513.41 prod {{0xFD} {`%`_u32(72,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:507.5-507.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:514.5-514.41 prod {{0xFD} {`%`_u32(73,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), LT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:508.5-508.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:515.5-515.41 prod {{0xFD} {`%`_u32(74,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), GT_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:509.5-509.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:516.5-516.41 prod {{0xFD} {`%`_u32(75,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), LE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:510.5-510.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:517.5-517.41 prod {{0xFD} {`%`_u32(76,):Bu32}} => VRELOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), GE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:514.5-514.36 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:521.5-521.36 prod {{0xFD} {`%`_u32(77,):Bu32}} => VVUNOP_instr(V128_vectype, NOT_vvunop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:518.5-518.37 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:525.5-525.37 prod {{0xFD} {`%`_u32(78,):Bu32}} => VVBINOP_instr(V128_vectype, AND_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:519.5-519.40 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:526.5-526.40 prod {{0xFD} {`%`_u32(79,):Bu32}} => VVBINOP_instr(V128_vectype, ANDNOT_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:520.5-520.36 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:527.5-527.36 prod {{0xFD} {`%`_u32(80,):Bu32}} => VVBINOP_instr(V128_vectype, OR_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:521.5-521.37 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:528.5-528.37 prod {{0xFD} {`%`_u32(81,):Bu32}} => VVBINOP_instr(V128_vectype, XOR_vvbinop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:525.5-525.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:532.5-532.44 prod {{0xFD} {`%`_u32(82,):Bu32}} => VVTERNOP_instr(V128_vectype, BITSELECT_vvternop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:529.5-529.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:536.5-536.43 prod {{0xFD} {`%`_u32(83,):Bu32}} => VVTESTOP_instr(V128_vectype, ANY_TRUE_vvtestop) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:533.5-533.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:540.5-540.41 prod {{0xFD} {`%`_u32(96,):Bu32}} => VUNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:534.5-534.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:541.5-541.41 prod {{0xFD} {`%`_u32(97,):Bu32}} => VUNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:535.5-535.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:542.5-542.44 prod {{0xFD} {`%`_u32(98,):Bu32}} => VUNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), POPCNT_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:539.5-539.48 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:546.5-546.48 prod {{0xFD} {`%`_u32(99,):Bu32}} => VTESTOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:543.5-543.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:550.5-550.41 prod {{0xFD} {`%`_u32(100,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:547.5-547.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:554.5-554.53 prod {{0xFD} {`%`_u32(101,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), S_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:548.5-548.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:555.5-555.53 prod {{0xFD} {`%`_u32(102,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), U_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:552.5-552.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:559.5-559.45 prod {{0xFD} {`%`_u32(107,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:553.5-553.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:560.5-560.47 prod {{0xFD} {`%`_u32(108,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:554.5-554.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:561.5-561.47 prod {{0xFD} {`%`_u32(109,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:558.5-558.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:565.5-565.43 prod {{0xFD} {`%`_u32(110,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:559.5-559.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:566.5-566.49 prod {{0xFD} {`%`_u32(111,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ADD_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:560.5-560.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:567.5-567.49 prod {{0xFD} {`%`_u32(112,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), ADD_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:561.5-561.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:568.5-568.43 prod {{0xFD} {`%`_u32(113,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:562.5-562.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:569.5-569.49 prod {{0xFD} {`%`_u32(114,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), SUB_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:563.5-563.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:570.5-570.49 prod {{0xFD} {`%`_u32(115,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), SUB_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:564.5-564.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:571.5-571.45 prod {{0xFD} {`%`_u32(118,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MIN_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:565.5-565.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:572.5-572.45 prod {{0xFD} {`%`_u32(119,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MIN_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:566.5-566.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:573.5-573.45 prod {{0xFD} {`%`_u32(120,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MAX_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:567.5-567.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:574.5-574.45 prod {{0xFD} {`%`_u32(121,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), MAX_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:568.5-568.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:575.5-575.46 prod {{0xFD} {`%`_u32(123,):Bu32}} => VBINOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), AVGRU_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:572.5-572.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:579.5-579.70 prod {{0xFD} {`%`_u32(124,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTADD_PAIRWISE_vextunop__(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:573.5-573.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:580.5-580.70 prod {{0xFD} {`%`_u32(125,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTADD_PAIRWISE_vextunop__(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:577.5-577.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:584.5-584.42 prod {{0xFD} {`%`_u32(128,):Bu32}} => VUNOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:578.5-578.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:585.5-585.42 prod {{0xFD} {`%`_u32(129,):Bu32}} => VUNOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:582.5-582.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:589.5-589.53 prod {{0xFD} {`%`_u32(130,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), Q15MULR_SATS_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:583.5-583.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:590.5-590.43 prod {{0xFD} {`%`_u32(142,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:584.5-584.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:591.5-591.49 prod {{0xFD} {`%`_u32(143,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ADD_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:585.5-585.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:592.5-592.49 prod {{0xFD} {`%`_u32(144,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ADD_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:586.5-586.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:593.5-593.43 prod {{0xFD} {`%`_u32(145,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:587.5-587.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:594.5-594.49 prod {{0xFD} {`%`_u32(146,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), SUB_SAT_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:588.5-588.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:595.5-595.49 prod {{0xFD} {`%`_u32(147,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), SUB_SAT_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:589.5-589.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:596.5-596.43 prod {{0xFD} {`%`_u32(149,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:590.5-590.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:597.5-597.45 prod {{0xFD} {`%`_u32(150,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MIN_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:591.5-591.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:598.5-598.45 prod {{0xFD} {`%`_u32(151,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MIN_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:592.5-592.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:599.5-599.45 prod {{0xFD} {`%`_u32(152,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MAX_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:593.5-593.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:600.5-600.45 prod {{0xFD} {`%`_u32(153,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), MAX_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:594.5-594.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:601.5-601.46 prod {{0xFD} {`%`_u32(155,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), AVGRU_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:595.5-595.57 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:602.5-602.57 prod {{0xFD} {`%`_u32(273,):Bu32}} => VBINOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), RELAXED_Q15MULRS_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:599.5-599.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:606.5-606.49 prod {{0xFD} {`%`_u32(131,):Bu32}} => VTESTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:603.5-603.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:610.5-610.41 prod {{0xFD} {`%`_u32(132,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:607.5-607.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:614.5-614.53 prod {{0xFD} {`%`_u32(133,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), S_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:608.5-608.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:615.5-615.53 prod {{0xFD} {`%`_u32(134,):Bu32}} => VNARROW_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), U_sx) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:612.5-612.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:619.5-619.63 prod {{0xFD} {`%`_u32(135,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:613.5-613.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:620.5-620.64 prod {{0xFD} {`%`_u32(136,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:614.5-614.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:621.5-621.63 prod {{0xFD} {`%`_u32(137,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:615.5-615.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:622.5-622.64 prod {{0xFD} {`%`_u32(138,):Bu32}} => VCVTOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), `%X%`_shape(I8_lanetype, `%`_dim(16,)), EXTEND_vcvtop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:619.5-619.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:626.5-626.45 prod {{0xFD} {`%`_u32(139,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:620.5-620.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:627.5-627.47 prod {{0xFD} {`%`_u32(140,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:621.5-621.47 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:628.5-628.47 prod {{0xFD} {`%`_u32(141,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:625.5-625.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:632.5-632.66 prod {{0xFD} {`%`_u32(156,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:626.5-626.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:633.5-633.67 prod {{0xFD} {`%`_u32(157,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:627.5-627.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:634.5-634.66 prod {{0xFD} {`%`_u32(158,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:628.5-628.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:635.5-635.67 prod {{0xFD} {`%`_u32(159,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), EXTMUL_vextbinop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:629.5-629.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:636.5-636.67 prod {{0xFD} {`%`_u32(274,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16,)),), RELAXED_DOTS_vextbinop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:633.5-633.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:640.5-640.70 prod {{0xFD} {`%`_u32(126,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTADD_PAIRWISE_vextunop__(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:634.5-634.70 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:641.5-641.70 prod {{0xFD} {`%`_u32(127,):Bu32}} => VEXTUNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTADD_PAIRWISE_vextunop__(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:638.5-638.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:645.5-645.42 prod {{0xFD} {`%`_u32(160,):Bu32}} => VUNOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:639.5-639.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:646.5-646.42 prod {{0xFD} {`%`_u32(161,):Bu32}} => VUNOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:643.5-643.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:650.5-650.49 prod {{0xFD} {`%`_u32(163,):Bu32}} => VTESTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:647.5-647.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:654.5-654.41 prod {{0xFD} {`%`_u32(164,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:651.5-651.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:658.5-658.63 prod {{0xFD} {`%`_u32(167,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:652.5-652.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:659.5-659.64 prod {{0xFD} {`%`_u32(168,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:653.5-653.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:660.5-660.63 prod {{0xFD} {`%`_u32(169,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:654.5-654.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:661.5-661.64 prod {{0xFD} {`%`_u32(170,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(I16_lanetype, `%`_dim(8,)), EXTEND_vcvtop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:658.5-658.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:665.5-665.45 prod {{0xFD} {`%`_u32(171,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:659.5-659.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:666.5-666.49 prod {{0xFD} {`%`_u32(172,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:660.5-660.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:667.5-667.49 prod {{0xFD} {`%`_u32(173,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:664.5-664.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:671.5-671.43 prod {{0xFD} {`%`_u32(174,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:665.5-665.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:672.5-672.43 prod {{0xFD} {`%`_u32(177,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:666.5-666.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:673.5-673.43 prod {{0xFD} {`%`_u32(181,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:667.5-667.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:674.5-674.45 prod {{0xFD} {`%`_u32(182,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MIN_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:668.5-668.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:675.5-675.45 prod {{0xFD} {`%`_u32(183,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MIN_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:669.5-669.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:676.5-676.45 prod {{0xFD} {`%`_u32(184,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MAX_vbinop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:670.5-670.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:677.5-677.45 prod {{0xFD} {`%`_u32(185,):Bu32}} => VBINOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), MAX_vbinop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:674.5-674.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:681.5-681.59 prod {{0xFD} {`%`_u32(186,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), DOTS_vextbinop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:675.5-675.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:682.5-682.66 prod {{0xFD} {`%`_u32(188,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:676.5-676.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:683.5-683.67 prod {{0xFD} {`%`_u32(189,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:677.5-677.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:684.5-684.66 prod {{0xFD} {`%`_u32(190,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:678.5-678.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:685.5-685.67 prod {{0xFD} {`%`_u32(191,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), EXTMUL_vextbinop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:682.5-682.72 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:689.5-689.72 prod {{0xFD} {`%`_u32(275,):Bu32}} => VEXTTERNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8,)),), RELAXED_DOT_ADDS_vextternop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:686.5-686.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:693.5-693.42 prod {{0xFD} {`%`_u32(192,):Bu32}} => VUNOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:687.5-687.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:694.5-694.42 prod {{0xFD} {`%`_u32(193,):Bu32}} => VUNOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:691.5-691.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:698.5-698.49 prod {{0xFD} {`%`_u32(195,):Bu32}} => VTESTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ALL_TRUE_vtestop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:695.5-695.41 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:702.5-702.41 prod {{0xFD} {`%`_u32(196,):Bu32}} => VBITMASK_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:699.5-699.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:706.5-706.63 prod {{0xFD} {`%`_u32(199,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:700.5-700.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:707.5-707.64 prod {{0xFD} {`%`_u32(200,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:701.5-701.63 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:708.5-708.63 prod {{0xFD} {`%`_u32(201,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:702.5-702.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:709.5-709.64 prod {{0xFD} {`%`_u32(202,):Bu32}} => VCVTOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), EXTEND_vcvtop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:706.5-706.45 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:713.5-713.45 prod {{0xFD} {`%`_u32(203,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), SHL_vshiftop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:707.5-707.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:714.5-714.49 prod {{0xFD} {`%`_u32(204,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), SHR_vshiftop_(S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:708.5-708.49 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:715.5-715.49 prod {{0xFD} {`%`_u32(205,):Bu32}} => VSHIFTOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), SHR_vshiftop_(U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:712.5-712.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:719.5-719.43 prod {{0xFD} {`%`_u32(206,):Bu32}} => VBINOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:713.5-713.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:720.5-720.43 prod {{0xFD} {`%`_u32(209,):Bu32}} => VBINOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:714.5-714.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:721.5-721.43 prod {{0xFD} {`%`_u32(213,):Bu32}} => VBINOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:718.5-718.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:725.5-725.42 prod {{0xFD} {`%`_u32(214,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), EQ_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:719.5-719.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:726.5-726.42 prod {{0xFD} {`%`_u32(215,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), NE_vrelop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:720.5-720.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:727.5-727.46 prod {{0xFD} {`%`_u32(216,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), LT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:721.5-721.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:728.5-728.46 prod {{0xFD} {`%`_u32(217,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), GT_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:722.5-722.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:729.5-729.46 prod {{0xFD} {`%`_u32(218,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), LE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:723.5-723.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:730.5-730.46 prod {{0xFD} {`%`_u32(219,):Bu32}} => VRELOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), GE_vrelop_(S_sx,)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:727.5-727.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:734.5-734.66 prod {{0xFD} {`%`_u32(220,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(LOW_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:728.5-728.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:735.5-735.67 prod {{0xFD} {`%`_u32(221,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(HIGH_half, S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:729.5-729.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:736.5-736.66 prod {{0xFD} {`%`_u32(222,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(LOW_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:730.5-730.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:737.5-737.67 prod {{0xFD} {`%`_u32(223,):Bu32}} => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2,)),), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4,)),), EXTMUL_vextbinop__(HIGH_half, U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:734.5-734.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:741.5-741.43 prod {{0xFD} {`%`_u32(103,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), CEIL_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:735.5-735.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:742.5-742.44 prod {{0xFD} {`%`_u32(104,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), FLOOR_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:736.5-736.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:743.5-743.44 prod {{0xFD} {`%`_u32(105,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), TRUNC_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:737.5-737.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:744.5-744.46 prod {{0xFD} {`%`_u32(106,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), NEAREST_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:738.5-738.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:745.5-745.42 prod {{0xFD} {`%`_u32(224,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:739.5-739.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:746.5-746.42 prod {{0xFD} {`%`_u32(225,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:740.5-740.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:747.5-747.43 prod {{0xFD} {`%`_u32(227,):Bu32}} => VUNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), SQRT_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:744.5-744.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:751.5-751.43 prod {{0xFD} {`%`_u32(228,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:745.5-745.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:752.5-752.43 prod {{0xFD} {`%`_u32(229,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:746.5-746.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:753.5-753.43 prod {{0xFD} {`%`_u32(230,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:747.5-747.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:754.5-754.43 prod {{0xFD} {`%`_u32(231,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), DIV_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:748.5-748.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:755.5-755.43 prod {{0xFD} {`%`_u32(232,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:749.5-749.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:756.5-756.43 prod {{0xFD} {`%`_u32(233,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:750.5-750.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:757.5-757.44 prod {{0xFD} {`%`_u32(234,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), PMIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:751.5-751.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:758.5-758.44 prod {{0xFD} {`%`_u32(235,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), PMAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:752.5-752.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:759.5-759.51 prod {{0xFD} {`%`_u32(269,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:753.5-753.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:760.5-760.51 prod {{0xFD} {`%`_u32(270,):Bu32}} => VBINOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:757.5-757.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:764.5-764.53 prod {{0xFD} {`%`_u32(261,):Bu32}} => VTERNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_MADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:758.5-758.54 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:765.5-765.54 prod {{0xFD} {`%`_u32(262,):Bu32}} => VTERNOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_NMADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:762.5-762.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:769.5-769.43 prod {{0xFD} {`%`_u32(116,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), CEIL_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:763.5-763.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:770.5-770.44 prod {{0xFD} {`%`_u32(117,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), FLOOR_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:764.5-764.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:771.5-771.44 prod {{0xFD} {`%`_u32(122,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), TRUNC_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:765.5-765.46 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:772.5-772.46 prod {{0xFD} {`%`_u32(148,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), NEAREST_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:766.5-766.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:773.5-773.42 prod {{0xFD} {`%`_u32(236,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), ABS_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:767.5-767.42 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:774.5-774.42 prod {{0xFD} {`%`_u32(237,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), NEG_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:768.5-768.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:775.5-775.43 prod {{0xFD} {`%`_u32(239,):Bu32}} => VUNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), SQRT_vunop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:772.5-772.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:779.5-779.43 prod {{0xFD} {`%`_u32(240,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), ADD_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:773.5-773.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:780.5-780.43 prod {{0xFD} {`%`_u32(241,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), SUB_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:774.5-774.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:781.5-781.43 prod {{0xFD} {`%`_u32(242,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), MUL_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:775.5-775.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:782.5-782.43 prod {{0xFD} {`%`_u32(243,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), DIV_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:776.5-776.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:783.5-783.43 prod {{0xFD} {`%`_u32(244,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:777.5-777.43 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:784.5-784.43 prod {{0xFD} {`%`_u32(245,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:778.5-778.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:785.5-785.44 prod {{0xFD} {`%`_u32(246,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), PMIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:779.5-779.44 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:786.5-786.44 prod {{0xFD} {`%`_u32(247,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), PMAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:780.5-780.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:787.5-787.51 prod {{0xFD} {`%`_u32(271,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_MIN_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:781.5-781.51 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:788.5-788.51 prod {{0xFD} {`%`_u32(272,):Bu32}} => VBINOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_MAX_vbinop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:785.5-785.53 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:792.5-792.53 prod {{0xFD} {`%`_u32(263,):Bu32}} => VTERNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_MADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:786.5-786.54 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:793.5-793.54 prod {{0xFD} {`%`_u32(264,):Bu32}} => VTERNOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_NMADD_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:787.5-787.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:794.5-794.59 prod {{0xFD} {`%`_u32(265,):Bu32}} => VTERNOP_instr(`%X%`_shape(I8_lanetype, `%`_dim(16,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:788.5-788.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:795.5-795.59 prod {{0xFD} {`%`_u32(266,):Bu32}} => VTERNOP_instr(`%X%`_shape(I16_lanetype, `%`_dim(8,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:789.5-789.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:796.5-796.59 prod {{0xFD} {`%`_u32(267,):Bu32}} => VTERNOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:790.5-790.59 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:797.5-797.59 prod {{0xFD} {`%`_u32(268,):Bu32}} => VTERNOP_instr(`%X%`_shape(I64_lanetype, `%`_dim(2,)), RELAXED_LANESELECT_vternop_) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:794.5-794.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:801.5-801.61 prod {{0xFD} {`%`_u32(94,):Bu32}} => VCVTOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), DEMOTE_vcvtop__(ZERO_zero)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:795.5-795.61 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:802.5-802.61 prod {{0xFD} {`%`_u32(95,):Bu32}} => VCVTOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), PROMOTELOW_vcvtop__) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:796.5-796.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:803.5-803.62 prod {{0xFD} {`%`_u32(248,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), TRUNC_SAT_vcvtop__(S_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:797.5-797.62 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:804.5-804.62 prod {{0xFD} {`%`_u32(249,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), TRUNC_SAT_vcvtop__(U_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:798.5-798.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:805.5-805.60 prod {{0xFD} {`%`_u32(250,):Bu32}} => VCVTOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(), S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:799.5-799.60 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:806.5-806.60 prod {{0xFD} {`%`_u32(251,):Bu32}} => VCVTOP_instr(`%X%`_shape(F32_lanetype, `%`_dim(4,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(), U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:800.5-800.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:807.5-807.67 prod {{0xFD} {`%`_u32(252,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), TRUNC_SAT_vcvtop__(S_sx, ?(ZERO_zero))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:801.5-801.67 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:808.5-808.67 prod {{0xFD} {`%`_u32(253,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), TRUNC_SAT_vcvtop__(U_sx, ?(ZERO_zero))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:802.5-802.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:809.5-809.64 prod {{0xFD} {`%`_u32(254,):Bu32}} => VCVTOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(LOW_half), S_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:803.5-803.64 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:810.5-810.64 prod {{0xFD} {`%`_u32(255,):Bu32}} => VCVTOP_instr(`%X%`_shape(F64_lanetype, `%`_dim(2,)), `%X%`_shape(I32_lanetype, `%`_dim(4,)), CONVERT_vcvtop__(?(LOW_half), U_sx)) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:804.5-804.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:811.5-811.66 prod {{0xFD} {`%`_u32(257,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_TRUNC_vcvtop__(S_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:805.5-805.66 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:812.5-812.66 prod {{0xFD} {`%`_u32(258,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F32_lanetype, `%`_dim(4,)), RELAXED_TRUNC_vcvtop__(U_sx, ?())) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:806.5-806.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:813.5-813.71 prod {{0xFD} {`%`_u32(259,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_TRUNC_vcvtop__(S_sx, ?(ZERO_zero))) - ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:807.5-807.71 + ;; ../../../../specification/wasm-latest/5.3-binary.instructions.spectec:814.5-814.71 prod {{0xFD} {`%`_u32(260,):Bu32}} => VCVTOP_instr(`%X%`_shape(I32_lanetype, `%`_dim(4,)), `%X%`_shape(F64_lanetype, `%`_dim(2,)), RELAXED_TRUNC_vcvtop__(U_sx, ?(ZERO_zero))) } @@ -35192,6 +35411,14 @@ grammar Tplaininstr_(I : I) : instr ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec prod "f64.reinterpret_i64" => CVTOP_instr(F64_numtype, I64_numtype, REINTERPRET_cvtop__) ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.add128" => WIDEOP_instr(I64_numtype, ADD128_wideop_) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.sub128" => WIDEOP_instr(I64_numtype, SUB128_wideop_) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.mul_wide_s" => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(S_sx)) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec + prod "i64.mul_wide_u" => EXTWIDEOP_instr(I64_numtype, MUL_WIDE_extwideop_(U_sx)) + ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec prod{`c*` : u8*} {{"v128.const"} {"i8x16"} {c*{c <- `c*`}:Ti8^16{}}} => VCONST_instr(V128_vectype, $inv_ibytes_(128, $concat_(syntax byte, $ibytes_(8, c)*{c <- `c*`}))) ;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec prod{`c*` : u16*} {{"v128.const"} {"i16x8"} {c*{c <- `c*`}:Ti16^8{}}} => VCONST_instr(V128_vectype, $inv_ibytes_(128, $concat_(syntax byte, $ibytes_(16, c)*{c <- `c*`}))) diff --git a/spectec/test-splice/TEST.md b/spectec/test-splice/TEST.md index 15420bc04d..15b63195f1 100644 --- a/spectec/test-splice/TEST.md +++ b/spectec/test-splice/TEST.md @@ -70,6 +70,8 @@ $$ & & | & {\mathit{numtype}} {.} {{\mathit{testop}}}_{{\mathit{numtype}}} \\ & & | & {\mathit{numtype}} {.} {{\mathit{relop}}}_{{\mathit{numtype}}} \\ & & | & {\mathit{numtype}}_1 {.} {{{\mathit{cvtop}}}_{{\mathit{numtype}}_2, {\mathit{numtype}}_1}}{\mathsf{\_}}{{\mathit{numtype}}_2} \\ +& & | & {\mathit{numtype}} {.} {{\mathit{wideop}}}_{{\mathit{numtype}}} \\ +& & | & {\mathit{numtype}} {.} {{\mathit{extwideop}}}_{{\mathit{numtype}}} \\ & & | & \mathsf{local{.}get}~{\mathit{localidx}} \\ & & | & \mathsf{local{.}set}~{\mathit{localidx}} \\ & & | & \mathsf{local{.}tee}~{\mathit{localidx}} \\ @@ -338,6 +340,7 @@ warning: syntax `export` was never spliced warning: syntax `exportinst` was never spliced warning: syntax `externaddr` was never spliced warning: syntax `externidx` was never spliced +warning: syntax `extwideop_` was never spliced warning: syntax `f32` was never spliced warning: syntax `f64` was never spliced warning: syntax `fN` was never spliced @@ -512,6 +515,7 @@ warning: syntax `vvbinop` was never spliced warning: syntax `vvternop` was never spliced warning: syntax `vvtestop` was never spliced warning: syntax `vvunop` was never spliced +warning: syntax `wideop_` was never spliced warning: syntax `zero` was never spliced warning: grammar `Babsheaptype` was never spliced warning: grammar `Bblocktype` was never spliced @@ -586,6 +590,7 @@ warning: grammar `Binstr/num-un-f64` was never spliced warning: grammar `Binstr/num-bin-f64` was never spliced warning: grammar `Binstr/num-cvt` was never spliced warning: grammar `Binstr/num-cvt-sat` was never spliced +warning: grammar `Binstr/num-wide` was never spliced warning: grammar `Binstr/vec-memory` was never spliced warning: grammar `Binstr/vec-const` was never spliced warning: grammar `Binstr/vec-shuffle` was never spliced @@ -847,6 +852,7 @@ warning: grammar `Tplaininstr_/num-cvt-i64` was never spliced warning: grammar `Tplaininstr_/num-cvt-f32` was never spliced warning: grammar `Tplaininstr_/num-cvt-f64` was never spliced warning: grammar `Tplaininstr_/num-cvt-reinterpret` was never spliced +warning: grammar `Tplaininstr_/num-wide` was never spliced warning: grammar `Tplaininstr_/vec-const` was never spliced warning: grammar `Tplaininstr_/vec-shuffle` was never spliced warning: grammar `Tplaininstr_/vec-splat` was never spliced @@ -1162,6 +1168,8 @@ warning: rule `Instr_ok/binop` was never spliced warning: rule `Instr_ok/testop` was never spliced warning: rule `Instr_ok/relop` was never spliced warning: rule `Instr_ok/cvtop` was never spliced +warning: rule `Instr_ok/wideop` was never spliced +warning: rule `Instr_ok/extwideop` was never spliced warning: rule `Instr_ok/vconst` was never spliced warning: rule `Instr_ok/vvunop` was never spliced warning: rule `Instr_ok/vvbinop` was never spliced @@ -1340,6 +1348,8 @@ warning: rule `Step_pure/testop` was never spliced warning: rule `Step_pure/relop` was never spliced warning: rule `Step_pure/cvtop-val` was never spliced warning: rule `Step_pure/cvtop-trap` was never spliced +warning: rule `Step_pure/wideop` was never spliced +warning: rule `Step_pure/extwideop` was never spliced warning: rule `Step_pure/vvunop` was never spliced warning: rule `Step_pure/vvbinop` was never spliced warning: rule `Step_pure/vvternop` was never spliced @@ -1601,6 +1611,7 @@ warning: definition `exninst` was never spliced warning: definition `expon` was never spliced warning: definition `exportsd` was never spliced warning: definition `extend__` was never spliced +warning: definition `extwideop__` was never spliced warning: definition `fabs_` was never spliced warning: definition `fadd_` was never spliced warning: definition `fbits_` was never spliced @@ -1727,6 +1738,7 @@ warning: definition `ibits_` was never spliced warning: definition `ibitselect_` was never spliced warning: definition `ibytes_` was never spliced warning: definition `iclz_` was never spliced +warning: definition `iconcat_` was never spliced warning: definition `ictz_` was never spliced warning: definition `idiv_` was never spliced warning: definition `ieee_` was never spliced @@ -1783,6 +1795,7 @@ warning: definition `is_packtype` was never spliced warning: definition `ishl_` was never spliced warning: definition `ishr_` was never spliced warning: definition `isize` was never spliced +warning: definition `isplit_` was never spliced warning: definition `isub_` was never spliced warning: definition `isub_sat_` was never spliced warning: definition `iswizzle_lane_` was never spliced @@ -1947,6 +1960,8 @@ warning: definition `vunpack` was never spliced warning: definition `vvbinop_` was never spliced warning: definition `vvternop_` was never spliced warning: definition `vvunop_` was never spliced +warning: definition `wideop_` was never spliced +warning: definition `wideop__` was never spliced warning: definition `with_array` was never spliced warning: definition `with_data` was never spliced warning: definition `with_elem` was never spliced @@ -2121,6 +2136,7 @@ warning: rule prose `Instr_ok/data.drop` was never spliced warning: rule prose `Instr_ok/drop` was never spliced warning: rule prose `Instr_ok/elem.drop` was never spliced warning: rule prose `Instr_ok/extern.convert_any` was never spliced +warning: rule prose `Instr_ok/extwideop` was never spliced warning: rule prose `Instr_ok/global.get` was never spliced warning: rule prose `Instr_ok/global.set` was never spliced warning: rule prose `Instr_ok/i31.get` was never spliced @@ -2204,6 +2220,7 @@ warning: rule prose `Instr_ok/vvbinop` was never spliced warning: rule prose `Instr_ok/vvternop` was never spliced warning: rule prose `Instr_ok/vvtestop` was never spliced warning: rule prose `Instr_ok/vvunop` was never spliced +warning: rule prose `Instr_ok/wideop` was never spliced warning: rule prose `Instr_ok2` was never spliced warning: rule prose `Instr_ok2/call_ref` was never spliced warning: rule prose `Instr_ok2/frame` was never spliced @@ -2312,6 +2329,7 @@ warning: rule prose `Step_pure/call_indirect` was never spliced warning: rule prose `Step_pure/cvtop` was never spliced warning: rule prose `Step_pure/drop` was never spliced warning: rule prose `Step_pure/extern.convert_any` was never spliced +warning: rule prose `Step_pure/extwideop` was never spliced warning: rule prose `Step_pure/frame` was never spliced warning: rule prose `Step_pure/handler` was never spliced warning: rule prose `Step_pure/i31.get` was never spliced @@ -2351,6 +2369,7 @@ warning: rule prose `Step_pure/vvbinop` was never spliced warning: rule prose `Step_pure/vvternop` was never spliced warning: rule prose `Step_pure/vvtestop` was never spliced warning: rule prose `Step_pure/vvunop` was never spliced +warning: rule prose `Step_pure/wideop` was never spliced warning: rule prose `Step_read/array.copy` was never spliced warning: rule prose `Step_read/array.fill` was never spliced warning: rule prose `Step_read/array.get` was never spliced @@ -2525,6 +2544,7 @@ warning: definition prose `evalglobals` was never spliced warning: definition prose `exninst` was never spliced warning: definition prose `expon` was never spliced warning: definition prose `exportsd` was never spliced +warning: definition prose `extwideop__` was never spliced warning: definition prose `fnat` was never spliced warning: definition prose `fof` was never spliced warning: definition prose `fone` was never spliced @@ -2617,6 +2637,7 @@ warning: definition prose `halfop` was never spliced warning: definition prose `iabs_` was never spliced warning: definition prose `iadd_` was never spliced warning: definition prose `iadd_sat_` was never spliced +warning: definition prose `iconcat_` was never spliced warning: definition prose `idiv_` was never spliced warning: definition prose `ieq_` was never spliced warning: definition prose `ieqz_` was never spliced @@ -2648,6 +2669,7 @@ warning: definition prose `irelaxed_swizzle_lane_` was never spliced warning: definition prose `irem_` was never spliced warning: definition prose `is_packtype` was never spliced warning: definition prose `isize` was never spliced +warning: definition prose `isplit_` was never spliced warning: definition prose `isub_` was never spliced warning: definition prose `isub_sat_` was never spliced warning: definition prose `iswizzle_lane_` was never spliced @@ -2801,6 +2823,8 @@ warning: definition prose `vunpack` was never spliced warning: definition prose `vvbinop_` was never spliced warning: definition prose `vvternop_` was never spliced warning: definition prose `vvunop_` was never spliced +warning: definition prose `wideop_` was never spliced +warning: definition prose `wideop__` was never spliced warning: definition prose `with_array` was never spliced warning: definition prose `with_data` was never spliced warning: definition prose `with_elem` was never spliced diff --git a/test/core/wide-arithmetic.wast b/test/core/wide-arithmetic.wast new file mode 100644 index 0000000000..bc6bb2aeea --- /dev/null +++ b/test/core/wide-arithmetic.wast @@ -0,0 +1,470 @@ +(module + (func (export "i64.add128") (param i64 i64 i64 i64) (result i64 i64) + local.get 0 + local.get 1 + local.get 2 + local.get 3 + i64.add128) + (func (export "i64.sub128") (param i64 i64 i64 i64) (result i64 i64) + local.get 0 + local.get 1 + local.get 2 + local.get 3 + i64.sub128) + (func (export "i64.mul_wide_s") (param i64 i64) (result i64 i64) + local.get 0 + local.get 1 + i64.mul_wide_s) + (func (export "i64.mul_wide_u") (param i64 i64) (result i64 i64) + local.get 0 + local.get 1 + i64.mul_wide_u) +) + +;; simple addition +(assert_return (invoke "i64.add128" + (i64.const 0) (i64.const 0) + (i64.const 0) (i64.const 0)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.add128" + (i64.const 0) (i64.const 1) + (i64.const 1) (i64.const 0)) + (i64.const 1) (i64.const 1)) +(assert_return (invoke "i64.add128" + (i64.const 1) (i64.const 0) + (i64.const -1) (i64.const 0)) + (i64.const 0) (i64.const 1)) +(assert_return (invoke "i64.add128" + (i64.const 1) (i64.const 1) + (i64.const -1) (i64.const -1)) + (i64.const 0) (i64.const 1)) + +;; simple subtraction +(assert_return (invoke "i64.sub128" + (i64.const 0) (i64.const 0) + (i64.const 0) (i64.const 0)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.sub128" + (i64.const 0) (i64.const 0) + (i64.const 1) (i64.const 0)) + (i64.const -1) (i64.const -1)) +(assert_return (invoke "i64.sub128" + (i64.const 0) (i64.const 1) + (i64.const 1) (i64.const 1)) + (i64.const -1) (i64.const -1)) +(assert_return (invoke "i64.sub128" + (i64.const 0) (i64.const 0) + (i64.const 1) (i64.const 1)) + (i64.const -1) (i64.const -2)) + +;; simple mul_wide +(assert_return (invoke "i64.mul_wide_s" (i64.const 0) (i64.const 0)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 0) (i64.const 0)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const 1) (i64.const 1)) + (i64.const 1) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 1) (i64.const 1)) + (i64.const 1) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const -1) (i64.const -1)) + (i64.const 1) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const -1) (i64.const 1)) + (i64.const -1) (i64.const -1)) +(assert_return (invoke "i64.mul_wide_u" (i64.const -1) (i64.const 1)) + (i64.const -1) (i64.const 0)) + +;; 20 randomly generated test cases for i64.add128 +(assert_return (invoke "i64.add128" + (i64.const -2418420703207364752) (i64.const -1) + (i64.const -1) (i64.const -1)) + (i64.const -2418420703207364753) (i64.const -1)) +(assert_return (invoke "i64.add128" + (i64.const 0) (i64.const 0) + (i64.const -4579433644172935106) (i64.const -1)) + (i64.const -4579433644172935106) (i64.const -1)) +(assert_return (invoke "i64.add128" + (i64.const 0) (i64.const 0) + (i64.const 1) (i64.const -1)) + (i64.const 1) (i64.const -1)) +(assert_return (invoke "i64.add128" + (i64.const 1) (i64.const 0) + (i64.const 1) (i64.const 0)) + (i64.const 2) (i64.const 0)) +(assert_return (invoke "i64.add128" + (i64.const -1) (i64.const -1) + (i64.const -1) (i64.const -1)) + (i64.const -2) (i64.const -1)) +(assert_return (invoke "i64.add128" + (i64.const 0) (i64.const -1) + (i64.const 1) (i64.const 0)) + (i64.const 1) (i64.const -1)) +(assert_return (invoke "i64.add128" + (i64.const 0) (i64.const 0) + (i64.const 0) (i64.const -1)) + (i64.const 0) (i64.const -1)) +(assert_return (invoke "i64.add128" + (i64.const 1) (i64.const 0) + (i64.const -1) (i64.const -1)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.add128" + (i64.const 0) (i64.const 6184727276166606191) + (i64.const 0) (i64.const 1)) + (i64.const 0) (i64.const 6184727276166606192)) +(assert_return (invoke "i64.add128" + (i64.const -8434911321912688222) (i64.const -1) + (i64.const 1) (i64.const -1)) + (i64.const -8434911321912688221) (i64.const -2)) +(assert_return (invoke "i64.add128" + (i64.const 1) (i64.const -1) + (i64.const 0) (i64.const -1)) + (i64.const 1) (i64.const -2)) +(assert_return (invoke "i64.add128" + (i64.const 1) (i64.const -5148941131328838092) + (i64.const 0) (i64.const 0)) + (i64.const 1) (i64.const -5148941131328838092)) +(assert_return (invoke "i64.add128" + (i64.const 1) (i64.const 1) + (i64.const 1) (i64.const 0)) + (i64.const 2) (i64.const 1)) +(assert_return (invoke "i64.add128" + (i64.const -1) (i64.const -1) + (i64.const -3636740005180858631) (i64.const -1)) + (i64.const -3636740005180858632) (i64.const -1)) +(assert_return (invoke "i64.add128" + (i64.const -5529682780229988275) (i64.const -1) + (i64.const 0) (i64.const 0)) + (i64.const -5529682780229988275) (i64.const -1)) +(assert_return (invoke "i64.add128" + (i64.const 1) (i64.const -5381447440966559717) + (i64.const 1020031372481336745) (i64.const 1)) + (i64.const 1020031372481336746) (i64.const -5381447440966559716)) +(assert_return (invoke "i64.add128" + (i64.const 1) (i64.const 1) + (i64.const 0) (i64.const 0)) + (i64.const 1) (i64.const 1)) +(assert_return (invoke "i64.add128" + (i64.const -9133888546939907356) (i64.const -1) + (i64.const 1) (i64.const 1)) + (i64.const -9133888546939907355) (i64.const 0)) +(assert_return (invoke "i64.add128" + (i64.const -4612047512704241719) (i64.const -1) + (i64.const 0) (i64.const -1)) + (i64.const -4612047512704241719) (i64.const -2)) +(assert_return (invoke "i64.add128" + (i64.const 414720966820876428) (i64.const -1) + (i64.const 1) (i64.const 0)) + (i64.const 414720966820876429) (i64.const -1)) + + +;; 20 randomly generated test cases for i64.sub128 +(assert_return (invoke "i64.sub128" + (i64.const 0) (i64.const -2459085471354756766) + (i64.const -9151153060221070927) (i64.const -1)) + (i64.const 9151153060221070927) (i64.const -2459085471354756766)) +(assert_return (invoke "i64.sub128" + (i64.const 4566502638724063423) (i64.const -4282658540409485563) + (i64.const -6884077310018979971) (i64.const -1)) + (i64.const -6996164124966508222) (i64.const -4282658540409485563)) +(assert_return (invoke "i64.sub128" + (i64.const 1) (i64.const 3118380319444903041) + (i64.const 0) (i64.const 3283115686417695443)) + (i64.const 1) (i64.const -164735366972792402)) +(assert_return (invoke "i64.sub128" + (i64.const -7208415241680161810) (i64.const -1) + (i64.const 1) (i64.const 0)) + (i64.const -7208415241680161811) (i64.const -1)) +(assert_return (invoke "i64.sub128" + (i64.const 0) (i64.const 3944850126731328706) + (i64.const 1) (i64.const 1)) + (i64.const -1) (i64.const 3944850126731328704)) +(assert_return (invoke "i64.sub128" + (i64.const 1) (i64.const -1) + (i64.const -1) (i64.const -1)) + (i64.const 2) (i64.const -1)) +(assert_return (invoke "i64.sub128" + (i64.const -1) (i64.const -1) + (i64.const 4855833073346115923) (i64.const -6826437637438999645)) + (i64.const -4855833073346115924) (i64.const 6826437637438999644)) +(assert_return (invoke "i64.sub128" + (i64.const 1) (i64.const 0) + (i64.const -1) (i64.const -1)) + (i64.const 2) (i64.const 0)) +(assert_return (invoke "i64.sub128" + (i64.const 1) (i64.const 0) + (i64.const 1) (i64.const 0)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.sub128" + (i64.const -1) (i64.const -1) + (i64.const 0) (i64.const 0)) + (i64.const -1) (i64.const -1)) +(assert_return (invoke "i64.sub128" + (i64.const 1) (i64.const -1) + (i64.const -6365475388498096428) (i64.const -1)) + (i64.const 6365475388498096429) (i64.const -1)) +(assert_return (invoke "i64.sub128" + (i64.const 6804238617560992346) (i64.const -1) + (i64.const 0) (i64.const -1)) + (i64.const 6804238617560992346) (i64.const 0)) +(assert_return (invoke "i64.sub128" + (i64.const 0) (i64.const 1) + (i64.const 1) (i64.const -7756145513466453619)) + (i64.const -1) (i64.const 7756145513466453619)) +(assert_return (invoke "i64.sub128" + (i64.const 1) (i64.const -1) + (i64.const 1) (i64.const 1)) + (i64.const 0) (i64.const -2)) +(assert_return (invoke "i64.sub128" + (i64.const 0) (i64.const 1) + (i64.const 1) (i64.const 0)) + (i64.const -1) (i64.const 0)) +(assert_return (invoke "i64.sub128" + (i64.const 1) (i64.const 5602881641763648953) + (i64.const -2110589244314239080) (i64.const -1)) + (i64.const 2110589244314239081) (i64.const 5602881641763648953)) +(assert_return (invoke "i64.sub128" + (i64.const 0) (i64.const 1) + (i64.const -1) (i64.const -1)) + (i64.const 1) (i64.const 1)) +(assert_return (invoke "i64.sub128" + (i64.const 0) (i64.const -1) + (i64.const 3553816990259121806) (i64.const -2105235417856431622)) + (i64.const -3553816990259121806) (i64.const 2105235417856431620)) +(assert_return (invoke "i64.sub128" + (i64.const 1861102705894987245) (i64.const 1) + (i64.const 3713781778534059871) (i64.const 1)) + (i64.const -1852679072639072626) (i64.const -1)) +(assert_return (invoke "i64.sub128" + (i64.const 0) (i64.const -1) + (i64.const 1) (i64.const 1832524486821761762)) + (i64.const -1) (i64.const -1832524486821761764)) + +;; 20 randomly generated test cases for i64.mul_wide_s +(assert_return (invoke "i64.mul_wide_s" (i64.const 1) (i64.const 1)) + (i64.const 1) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const 0) (i64.const 6287758211025156705)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const -6643537319803451357) (i64.const 1)) + (i64.const -6643537319803451357) (i64.const -1)) +(assert_return (invoke "i64.mul_wide_s" (i64.const -2483565146858803428) (i64.const 0)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const 1) (i64.const 1)) + (i64.const 1) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const -3838951433439430085) (i64.const 3471602925362676030)) + (i64.const 5186941893001237834) (i64.const -722475195264825124)) +(assert_return (invoke "i64.mul_wide_s" (i64.const -8262495286814853129) (i64.const 7883241869666573970)) + (i64.const -8557189786755031842) (i64.const -3530988912334554469)) +(assert_return (invoke "i64.mul_wide_s" (i64.const 4278371902407959701) (i64.const 1)) + (i64.const 4278371902407959701) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const -8852706149487089182) (i64.const -1)) + (i64.const 8852706149487089182) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const 1) (i64.const -1)) + (i64.const -1) (i64.const -1)) +(assert_return (invoke "i64.mul_wide_s" (i64.const -1) (i64.const -4329244561838653387)) + (i64.const 4329244561838653387) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const -1) (i64.const -1)) + (i64.const 1) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const 697896157315764057) (i64.const 1)) + (i64.const 697896157315764057) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const 1) (i64.const 1)) + (i64.const 1) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const -1) (i64.const 0)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const 0) (i64.const -3769664482072947073)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const 1) (i64.const 8414291037346403854)) + (i64.const 8414291037346403854) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_s" (i64.const 1) (i64.const -1)) + (i64.const -1) (i64.const -1)) +(assert_return (invoke "i64.mul_wide_s" (i64.const 5014655679779318485) (i64.const -5080037812563681985)) + (i64.const 2842857627777395563) (i64.const -1380983027057486843)) +(assert_return (invoke "i64.mul_wide_s" (i64.const 0) (i64.const 1)) + (i64.const 0) (i64.const 0)) + +;; 20 randomly generated test cases for i64.mul_wide_u +(assert_return (invoke "i64.mul_wide_u" (i64.const -4734436040338162711) (i64.const 0)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 1) (i64.const 0)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 3270597527173764279) (i64.const 6636648075495406358)) + (i64.const -5430303818902260550) (i64.const 1176674035141685826)) +(assert_return (invoke "i64.mul_wide_u" (i64.const -7771814344630108151) (i64.const 1)) + (i64.const -7771814344630108151) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 1) (i64.const 0)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 1) (i64.const -7864138787704962081)) + (i64.const -7864138787704962081) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 1) (i64.const 518555141550256010)) + (i64.const 518555141550256010) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 1) (i64.const -1)) + (i64.const -1) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 1118900477321231571) (i64.const -1)) + (i64.const -1118900477321231571) (i64.const 1118900477321231570)) +(assert_return (invoke "i64.mul_wide_u" (i64.const -1) (i64.const 0)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const -5586890671027490027) (i64.const 1)) + (i64.const -5586890671027490027) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 0) (i64.const 3603850799751152505)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const -1) (i64.const -1)) + (i64.const 1) (i64.const 18446744073709551614)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 0) (i64.const 1)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const -7344082851774441644) (i64.const 3896439839137544024)) + (i64.const 5738542512914895072) (i64.const 2345175459296971666)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 0) (i64.const 0)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 616395976148874061) (i64.const 0)) + (i64.const 0) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 2810729703362889816) (i64.const -1)) + (i64.const -2810729703362889816) (i64.const 2810729703362889815)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 1) (i64.const -1)) + (i64.const -1) (i64.const 0)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 1) (i64.const 0)) + (i64.const 0) (i64.const 0)) + +;; assert overlong encodings for each instruction's binary encoding are accepted +(module binary + "\00asm" "\01\00\00\00" + + "\01\11" ;; type section, 17 bytes + "\02" ;; 2 count + "\60" ;; type0 = function + "\04\7e\7e\7e\7e" ;; 4 params - all i64 + "\02\7e\7e" ;; 2 results - both i64 + "\60" ;; type1 = function + "\02\7e\7e" ;; 2 params - both i64 + "\02\7e\7e" ;; 2 results - both i64 + + "\03\05" ;; function section, 5 byte + "\04" ;; 4 count + "\00\00\01\01" ;; types of each function (0, 0, 1, 1) + + "\07\3d" ;; export section 0x3d bytes + "\04" ;; 4 count + "\0ai64.add128\00\00" ;; "i64.add128" which is function 0 + "\0ai64.sub128\00\01" ;; "i64.add128" which is function 1 + "\0ei64.mul_wide_s\00\02" ;; "i64.mul_wide_s" which is function 2 + "\0ei64.mul_wide_u\00\03" ;; "i64.mul_wide_s" which is function 3 + + "\0a\37" ;; code section + byte length + "\04" ;; 4 count + + "\0e" ;; byte length + "\00" ;; no locals + "\20\00" ;; local.get 0 + "\20\01" ;; local.get 1 + "\20\02" ;; local.get 2 + "\20\03" ;; local.get 3 + "\fc\93\80\00" ;; i64.add128 (overlong) + "\0b" ;; end + + "\0d" ;; byte length + "\00" ;; no locals + "\20\00" ;; local.get 0 + "\20\01" ;; local.get 1 + "\20\02" ;; local.get 2 + "\20\03" ;; local.get 3 + "\fc\94\00" ;; i64.sub128 (overlong) + "\0b" ;; end + + "\0c" ;; byte length + "\00" ;; no locals + "\20\00" ;; local.get 0 + "\20\01" ;; local.get 1 + "\fc\95\80\80\80\00" ;; i64.mul_wide_s (overlong) + "\0b" ;; end + + "\0b" ;; byte length + "\00" ;; no locals + "\20\00" ;; local.get 0 + "\20\01" ;; local.get 1 + "\fc\96\80\80\00" ;; i64.mul_wide_u (overlong) + "\0b" ;; end +) + +(assert_return (invoke "i64.add128" + (i64.const 1) (i64.const 2) + (i64.const 3) (i64.const 4)) + (i64.const 4) (i64.const 6)) +(assert_return (invoke "i64.sub128" + (i64.const 2) (i64.const 5) + (i64.const 1) (i64.const 2)) + (i64.const 1) (i64.const 3)) +(assert_return (invoke "i64.mul_wide_s" (i64.const 1) (i64.const -2)) + (i64.const -2) (i64.const -1)) +(assert_return (invoke "i64.mul_wide_u" (i64.const 3) (i64.const 2)) + (i64.const 6) (i64.const 0)) + +;; some invalid types for these instructions + +(assert_invalid + (module + (func (param i64 i64 i64 i64) (result i64) + local.get 0 + local.get 1 + local.get 2 + local.get 3 + i64.add128) + ) + "type mismatch") +(assert_invalid + (module + (func (param i64 i64 i64) (result i64 i64) + local.get 0 + local.get 1 + local.get 2 + i64.add128) + ) + "type mismatch") + +(assert_invalid + (module + (func (param i64 i64 i64 i64) (result i64) + local.get 0 + local.get 1 + local.get 2 + local.get 3 + i64.sub128) + ) + "type mismatch") +(assert_invalid + (module + (func (param i64 i64 i64) (result i64 i64) + local.get 0 + local.get 1 + local.get 2 + i64.sub128) + ) + "type mismatch") + +(assert_invalid + (module + (func (param i64 i64) (result i64) + local.get 0 + local.get 1 + i64.mul_wide_s) + ) + "type mismatch") +(assert_invalid + (module + (func (param i64) (result i64 i64) + local.get 0 + i64.mul_wide_s) + ) + "type mismatch") + +(assert_invalid + (module + (func (param i64 i64) (result i64) + local.get 0 + local.get 1 + i64.mul_wide_u) + ) + "type mismatch") +(assert_invalid + (module + (func (param i64) (result i64 i64) + local.get 0 + i64.mul_wide_u) + ) + "type mismatch")