From 7cc20056e0ae5139e2fcdc4be5c520e287e60783 Mon Sep 17 00:00:00 2001
From: by <by965738071@163.com>
Date: Wed, 15 Jul 2026 07:21:26 +0800
Subject: [PATCH] fix(riscv32): correct wfe() CSR address from 0x810 to 0x300

---
 core/src/cpus/riscv32.zig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/core/src/cpus/riscv32.zig b/core/src/cpus/riscv32.zig
index 10aa6794b..b4b81268a 100644
--- a/core/src/cpus/riscv32.zig
+++ b/core/src/cpus/riscv32.zig
@@ -9,9 +9,9 @@ pub const nop = riscv32_common.nop;
 pub const wfi = riscv32_common.wfi;
 
 pub fn wfe() void {
-    asm volatile ("csrs 0x810, 0x1");
+    asm volatile ("csrs 0x300, 0x1");
     wfi();
-    asm volatile ("csrs 0x810, 0x1");
+    asm volatile ("csrs 0x300, 0x1");
 }
 
 pub const startup_logic = struct {