Skip to content

Latest commit

 

History

History
18 lines (10 loc) · 924 Bytes

File metadata and controls

18 lines (10 loc) · 924 Bytes

About this project

This repository contains a completed 8-bit CPU adhering to Von Neumann architecture and built in Logisim as a .circ file. The project was challenging because getting the ALU, registers, RAM, main bus, and control logic to work together required careful debugging and attention to timing.

I’m publishing this design so other students and self-learners have a working example to study. When I built it, I found that many resources explained theory but didn’t show a full, functioning CPU in Logisim. This file is meant to close that gap and make the learning process easier. This is a vital resource for any computer architecture course that requires logism circuitry. .

Features

8-bit data bus and registers

Arithmetic Logic Unit (ALU) with basic operations

Main system bus and control signals

On-chip RAM module for instruction/data storage

Logisim .circ file ready to open and simulate