From 5f0582329c1e0b9b20179b5edbdbec6cfe7fb862 Mon Sep 17 00:00:00 2001 From: Diego Martin Date: Wed, 29 Oct 2025 10:14:48 -0500 Subject: [PATCH 01/13] [openquantumhardware/qick_internal#22] Added RB_tProc_v1_experiment notebook --- .../qick_rb/RB_tProc_v1_experiment.ipynb | 638 ++++++++++++++++++ 1 file changed, 638 insertions(+) create mode 100644 firmware/testbench/testbench_notebooks/qick_rb/RB_tProc_v1_experiment.ipynb diff --git a/firmware/testbench/testbench_notebooks/qick_rb/RB_tProc_v1_experiment.ipynb b/firmware/testbench/testbench_notebooks/qick_rb/RB_tProc_v1_experiment.ipynb new file mode 100644 index 00000000..fd67c079 --- /dev/null +++ b/firmware/testbench/testbench_notebooks/qick_rb/RB_tProc_v1_experiment.ipynb @@ -0,0 +1,638 @@ +{ + "cells": [ + { + "cell_type": "markdown", + "id": "e369c3a6", + "metadata": {}, + "source": [ + "# Randomized Benchmarking experiment for tProc_v1\n", + "\n", + "This notebook runs the experiment used in the QICK paper for randomized benchmarking (devForLBNL/RB_code_demo/qsystem2_paper_data-Ankur-final.ipynb) ported to run on the current tProc_v1 firmware (original code ran on something called qsystem, previous version of tProc_v1) It was created to measure the runtime of the algorithm and compare it with the implementation on the tProc_v2 firmware." + ] + }, + { + "cell_type": "code", + "execution_count": 1, + "id": "f2d666f1", + "metadata": {}, + "outputs": [ + { + "data": { + "application/javascript": "\ntry {\nrequire(['notebook/js/codecell'], function(codecell) {\n codecell.CodeCell.options_default.highlight_modes[\n 'magic_text/x-csrc'] = {'reg':[/^%%microblaze/]};\n Jupyter.notebook.events.one('kernel_ready.Kernel', function(){\n Jupyter.notebook.get_cells().map(function(cell){\n if (cell.cell_type == 'code'){ cell.auto_highlight(); } }) ;\n });\n});\n} catch (e) {};\n" + }, + "metadata": {}, + "output_type": "display_data" + }, + { + "data": { + "application/javascript": "\ntry {\nrequire(['notebook/js/codecell'], function(codecell) {\n codecell.CodeCell.options_default.highlight_modes[\n 'magic_text/x-csrc'] = {'reg':[/^%%pybind11/]};\n Jupyter.notebook.events.one('kernel_ready.Kernel', function(){\n Jupyter.notebook.get_cells().map(function(cell){\n if (cell.cell_type == 'code'){ cell.auto_highlight(); } }) ;\n });\n});\n} catch (e) {};\n" + }, + "metadata": {}, + "output_type": "display_data" + }, + { + "name": "stdout", + "output_type": "stream", + "text": [ + "QICK running on ZCU111, software version 0.2.370\n", + "\n", + "Firmware configuration (built Wed Aug 16 13:39:03 2023):\n", + "\n", + "\tGlobal clocks (MHz): tProc dispatcher timing 384.000, RF reference 204.800\n", + "\tGroups of related clocks: [tProc clock, DAC tile 0], [DAC tile 1], [ADC tile 0]\n", + "\n", + "\t7 signal generator channels:\n", + "\t0:\taxis_signal_gen_v6 - fs=6144.000 Msps, fabric=384.000 MHz\n", + "\t\tenvelope memory: 65536 complex samples (10.667 us)\n", + "\t\t32-bit DDS, range=6144.000 MHz\n", + "\t\tDAC tile 0, blk 0 is DAC228_T0_CH0, or RF board DAC port 0\n", + "\t1:\taxis_signal_gen_v6 - fs=6144.000 Msps, fabric=384.000 MHz\n", + "\t\tenvelope memory: 65536 complex samples (10.667 us)\n", + "\t\t32-bit DDS, range=6144.000 MHz\n", + "\t\tDAC tile 0, blk 1 is DAC228_T0_CH1, or RF board DAC port 1\n", + "\t2:\taxis_signal_gen_v6 - fs=6144.000 Msps, fabric=384.000 MHz\n", + "\t\tenvelope memory: 65536 complex samples (10.667 us)\n", + "\t\t32-bit DDS, range=6144.000 MHz\n", + "\t\tDAC tile 0, blk 2 is DAC228_T0_CH2, or RF board DAC port 2\n", + "\t3:\taxis_signal_gen_v6 - fs=6144.000 Msps, fabric=384.000 MHz\n", + "\t\tenvelope memory: 65536 complex samples (10.667 us)\n", + "\t\t32-bit DDS, range=6144.000 MHz\n", + "\t\tDAC tile 1, blk 0 is DAC229_T1_CH0, or RF board DAC port 4\n", + "\t4:\taxis_signal_gen_v6 - fs=6144.000 Msps, fabric=384.000 MHz\n", + "\t\tenvelope memory: 65536 complex samples (10.667 us)\n", + "\t\t32-bit DDS, range=6144.000 MHz\n", + "\t\tDAC tile 1, blk 1 is DAC229_T1_CH1, or RF board DAC port 5\n", + "\t5:\taxis_signal_gen_v6 - fs=6144.000 Msps, fabric=384.000 MHz\n", + "\t\tenvelope memory: 65536 complex samples (10.667 us)\n", + "\t\t32-bit DDS, range=6144.000 MHz\n", + "\t\tDAC tile 1, blk 2 is DAC229_T1_CH2, or RF board DAC port 6\n", + "\t6:\taxis_signal_gen_v6 - fs=6144.000 Msps, fabric=384.000 MHz\n", + "\t\tenvelope memory: 65536 complex samples (10.667 us)\n", + "\t\t32-bit DDS, range=6144.000 MHz\n", + "\t\tDAC tile 1, blk 3 is DAC229_T1_CH3, or RF board DAC port 7\n", + "\n", + "\t2 readout channels:\n", + "\t0:\taxis_readout_v2 - configured by PYNQ\n", + "\t\tfs=4096.000 Msps, decimated=512.000 MHz, 32-bit DDS, range=4096.000 MHz\n", + "\t\taxis_avg_buffer v1.0 (no edge counter, no weights)\n", + "\t\tmemory 16384 accumulated, 1024 decimated (2.000 us)\n", + "\t\ttriggered by output 0, pin 14, feedback to tProc input 0\n", + "\t\tADC tile 0, blk 0 is ADC224_T0_CH0, or RF board ADC AC port 0\n", + "\t1:\taxis_readout_v2 - configured by PYNQ\n", + "\t\tfs=4096.000 Msps, decimated=512.000 MHz, 32-bit DDS, range=4096.000 MHz\n", + "\t\taxis_avg_buffer v1.0 (no edge counter, no weights)\n", + "\t\tmemory 16384 accumulated, 1024 decimated (2.000 us)\n", + "\t\ttriggered by output 0, pin 15, feedback to tProc input 1\n", + "\t\tADC tile 0, blk 2 is ADC224_T0_CH1, or RF board ADC AC port 1\n", + "\n", + "\t8 digital output pins:\n", + "\t0:\tPMOD0_0_LS\n", + "\t1:\tPMOD0_1_LS\n", + "\t2:\tPMOD0_2_LS\n", + "\t3:\tPMOD0_3_LS\n", + "\t4:\tPMOD0_4_LS\n", + "\t5:\tPMOD0_5_LS\n", + "\t6:\tPMOD0_6_LS\n", + "\t7:\tPMOD0_7_LS\n", + "\n", + "\ttProc: axis_tproc64x32_x8 (\"v1\") rev 4, program memory 8192 words, data memory 4096 words\n", + "\t\texternal start pin: PMOD1_0_LS\n", + "\n", + "\tDDR4 memory buffer: 1073741824 samples (2.097 sec), 256 samples/transfer\n", + "\t\twired to readouts [0, 1]\n", + "\n", + "\tMR buffer: 8192 samples (2.000 us), wired to readouts [0, 1]\n" + ] + } + ], + "source": [ + "%matplotlib inline\n", + "\n", + "import numpy as np\n", + "import matplotlib.pyplot as plt\n", + "import pandas as pd\n", + "from scipy.optimize import curve_fit\n", + "from datetime import datetime\n", + "\n", + "# Import the QICK drivers and auxiliary libraries\n", + "from qick import *\n", + "\n", + "# Load bitstream with custom overlay\n", + "soc = QickSoc()\n", + "soccfg = soc\n", + "print(soccfg)\n" + ] + }, + { + "cell_type": "markdown", + "id": "7a1dc341", + "metadata": {}, + "source": [ + "## RB sequence generator" + ] + }, + { + "cell_type": "code", + "execution_count": 2, + "id": "a8e30449", + "metadata": {}, + "outputs": [], + "source": [ + "\"\"\"Writing the sequences in terms of Clifford group algebra\n", + " The Clifford gate set forms a closed group => \n", + " 1. Multiplication of any two gates results in a gate part of the group \n", + " 2. Each gate has an inverse\n", + " 3. The inverse of a product of multiple Clifford gates is unique\n", + "\"\"\"\n", + "def generate_rbsequence(depth):\n", + " \n", + " \"\"\"Single qubit RB program to generate a sequence of 'd' gates followed \n", + " by an inverse gate to bring the qubit back in 'g' state\n", + " \"\"\"\n", + "\n", + " gate_symbol = ['I', 'Z', 'X', 'Y', 'Z/2', 'X/2', 'Y/2', '-Z/2', '-X/2', '-Y/2']\n", + " inverse_gate_symbol = ['I', '-Y/2', 'X/2', 'X', 'Y/2', '-X/2']\n", + "\n", + " \"\"\"Modeled the bloch sphere as 6-node graph, each rotation in the RB sequence is effectively\n", + " exchanging the node label on the bloch sphere.\n", + " For example: Z rotation is doing this: (+Z->+Z, -Z->-Z, +X->+Y, +Y->-X, -X->-Y, -Y->+X)\n", + " \"\"\"\n", + " matrix_ref = {}\n", + " \"\"\"Matrix columns are [Z, X, Y, -Z, -X, -Y]\"\"\"\n", + "\n", + " matrix_ref['0'] = np.matrix([[1, 0, 0, 0, 0, 0],\n", + " [0, 1, 0, 0, 0, 0],\n", + " [0, 0, 1, 0, 0, 0],\n", + " [0, 0, 0, 1, 0, 0],\n", + " [0, 0, 0, 0, 1, 0],\n", + " [0, 0, 0, 0, 0, 1]])\n", + " matrix_ref['1'] = np.matrix([[1, 0, 0, 0, 0, 0],\n", + " [0, 0, 0, 0, 1, 0],\n", + " [0, 0, 0, 0, 0, 1],\n", + " [0, 0, 0, 1, 0, 0],\n", + " [0, 1, 0, 0, 0, 0],\n", + " [0, 0, 1, 0, 0, 0]])\n", + " matrix_ref['2'] = np.matrix([[0, 0, 0, 1, 0, 0],\n", + " [0, 1, 0, 0, 0, 0],\n", + " [0, 0, 0, 0, 0, 1],\n", + " [1, 0, 0, 0, 0, 0],\n", + " [0, 0, 0, 0, 1, 0],\n", + " [0, 0, 1, 0, 0, 0]])\n", + " matrix_ref['3'] = np.matrix([[0, 0, 0, 1, 0, 0],\n", + " [0, 0, 0, 0, 1, 0],\n", + " [0, 0, 1, 0, 0, 0],\n", + " [1, 0, 0, 0, 0, 0],\n", + " [0, 1, 0, 0, 0, 0],\n", + " [0, 0, 0, 0, 0, 1]])\n", + " matrix_ref['4'] = np.matrix([[1, 0, 0, 0, 0, 0],\n", + " [0, 0, 0, 0, 0, 1],\n", + " [0, 1, 0, 0, 0, 0],\n", + " [0, 0, 0, 1, 0, 0],\n", + " [0, 0, 1, 0, 0, 0],\n", + " [0, 0, 0, 0, 1, 0]])\n", + " matrix_ref['5'] = np.matrix([[0, 0, 1, 0, 0, 0],\n", + " [0, 1, 0, 0, 0, 0],\n", + " [0, 0, 0, 1, 0, 0],\n", + " [0, 0, 0, 0, 0, 1],\n", + " [0, 0, 0, 0, 1, 0],\n", + " [1, 0, 0, 0, 0, 0]])\n", + " matrix_ref['6'] = np.matrix([[0, 0, 0, 0, 1, 0],\n", + " [1, 0, 0, 0, 0, 0],\n", + " [0, 0, 1, 0, 0, 0],\n", + " [0, 1, 0, 0, 0, 0],\n", + " [0, 0, 0, 1, 0, 0],\n", + " [0, 0, 0, 0, 0, 1]])\n", + " matrix_ref['7'] = np.matrix([[1, 0, 0, 0, 0, 0],\n", + " [0, 0, 1, 0, 0, 0],\n", + " [0, 0, 0, 0, 1, 0],\n", + " [0, 0, 0, 1, 0, 0],\n", + " [0, 0, 0, 0, 0, 1],\n", + " [0, 1, 0, 0, 0, 0]])\n", + " matrix_ref['8'] = np.matrix([[0, 0, 0, 0, 0, 1],\n", + " [0, 1, 0, 0, 0, 0],\n", + " [1, 0, 0, 0, 0, 0],\n", + " [0, 0, 1, 0, 0, 0],\n", + " [0, 0, 0, 0, 1, 0],\n", + " [0, 0, 0, 1, 0, 0]])\n", + " matrix_ref['9'] = np.matrix([[0, 1, 0, 0, 0, 0],\n", + " [0, 0, 0, 1, 0, 0],\n", + " [0, 0, 1, 0, 0, 0],\n", + " [0, 0, 0, 0, 1, 0],\n", + " [1, 0, 0, 0, 0, 0],\n", + " [0, 0, 0, 0, 0, 1]])\n", + " \n", + " \"\"\"Generate a random gate sequence of a certain depth 'd'\"\"\"\n", + " gate_seq = []\n", + " for ii in range(depth):\n", + " gate_seq.append(np.random.randint(0, 9))\n", + " \"\"\"Initial node\"\"\"\n", + " a0 = np.matrix([[1], [0], [0], [0], [0], [0]])\n", + " anow = a0\n", + " for i in gate_seq:\n", + " anow = np.dot(matrix_ref[str(i)], anow)\n", + " anow1 = np.matrix.tolist(anow.T)[0]\n", + " \"\"\"Returns the \"\"\"\n", + " max_index = anow1.index(max(anow1))\n", + " symbol_seq = [gate_symbol[i] for i in gate_seq ]\n", + " symbol_seq.append(inverse_gate_symbol[max_index])\n", + " return symbol_seq" + ] + }, + { + "cell_type": "code", + "execution_count": 3, + "id": "cc9aee50", + "metadata": {}, + "outputs": [ + { + "data": { + "text/plain": [ + "['Z/2', 'Y', '-Z/2', 'X']" + ] + }, + "execution_count": 3, + "metadata": {}, + "output_type": "execute_result" + } + ], + "source": [ + "generate_rbsequence(3)" + ] + }, + { + "cell_type": "code", + "execution_count": 3, + "id": "39bf0f0f", + "metadata": {}, + "outputs": [], + "source": [ + "class RBSequenceProgram(AveragerProgram):\n", + " def __init__(self,soccfg, cfg):\n", + " super().__init__(soccfg, cfg)\n", + "\n", + " def initialize(self):\n", + " cfg = self.cfg\n", + "\n", + " self.gate_seq = cfg['gate_seq']\n", + " self.gate_set = cfg['gate_set']\n", + "\n", + "# r_freq=self.sreg(cfg[\"rr_ch\"], \"freq\") #Get frequency register for res_ch\n", + "# f_res=freq2reg(adcfreq(cfg[\"rr_freq\"])) # convert frequency to dac frequency (ensuring it is an available adc frequency)\n", + "\n", + "# # rr_freq = self.sreg(self.device_cfg[\"rr_ch\"], self.device_cfg[\"rr_freq\"]) #Get frequency register for res_ch\n", + "# self.cfg[\"adc_lengths\"]=[self.cfg[\"rr_length\"]]*2 #add length of adc acquisition to config\n", + "# self.cfg[\"adc_freqs\"]=[adcfreq(self.cfg[\"rr_freq\"])]*2 #add frequency of adc ddc to config\n", + "# self.f_ge=freq2reg(cfg[\"qubit_freq\"])\n", + "\n", + " pulse_length = self.us2cycles(0.025)\n", + "\n", + " ro_chs = cfg['ro_chs']\n", + " gen_ch = cfg['qubit_ch']\n", + "\n", + " # configure the readout lengths and downconversion frequencies\n", + " for ro_ch in ro_chs:\n", + " self.declare_readout(ch=ro_ch, \n", + " length=self.us2cycles(cfg['rr_length']),\n", + " freq=self.cfg['rr_freq'],\n", + " gen_ch=cfg['rr_ch'])\n", + "\n", + " self.declare_gen(ch=cfg[\"rr_ch\"], nqz=1) #Readout\n", + "\n", + " \"\"\"Add a sequence of fixed number of gates, analytically compute\n", + " the inverse operation after the final gate to bring the qubit back\n", + " to |g> state (minimizes errors due to readout) before reading out the state.\n", + " Repeat this experiment several times with the fixed number of gates.\n", + " \"\"\"\n", + "# self.add_pulse(ch=self.cfg[\"qubit_ch\"], name=\"qubit\", style=\"arb\", idata=gauss(mu=cfg[\"pi_sigma\"]*16*5/2,si=cfg[\"pi_sigma\"]*16, length=5*cfg[\"pi_sigma\"]*16, maxv=32000))\n", + "\n", + " \n", + " \"\"\"This adds the different types of pulses to the pulse library which can be played on demand later\"\"\"\n", + " for name, ginfo in self.gate_set.items():\n", + " self.add_pulse(ch=self.cfg[\"qubit_ch\"], name=name, \n", + " idata=ginfo[\"idata\"],\n", + " qdata=ginfo[\"qdata\"],\n", + " # style=ginfo[\"style\"]\n", + " )\n", + "\n", + "\n", + " # self.add_pulse(ch=self.cfg[\"rr_ch\"], name=\"measure\",\n", + " # # style=\"const\", \n", + " # length=self.cfg[\"rr_length\"]\n", + " # ) #add a constant pulse to the pulse library of res_ch\n", + "\n", + " # \"\"\"Pre-initialze the pulse (not necessary)\"\"\"\n", + " # self.pulse(ch=self.cfg[\"rr_ch\"], name=\"measure\", freq=f_res, \n", + " # phase=self.cfg[\"rr_phase\"], gain=self.cfg[\"rr_gain\"],\n", + " # length=self.cfg['rr_length'] , t=0, play=False) # pre-configure readout pulse\n", + "\n", + " idata = 30000*np.ones(16*cfg[\"rr_length\"])\n", + " self.add_pulse(ch=cfg['rr_ch'], name=\"measure\", idata=idata)\n", + "\n", + " self.set_pulse_registers(ch=cfg[\"rr_ch\"], \n", + " style=\"const\", \n", + " freq=cfg[\"rr_freq\"], \n", + " phase=0, \n", + " gain=cfg[\"rr_gain\"],\n", + " length=cfg[\"rr_length\"])\n", + "\n", + "\n", + " self.sync_all(1000) # give processor some time to configure pulses\n", + " \n", + " def body(self):\n", + " self.phase_ref=0\n", + " for g in self.gate_seq:\n", + " ginfo=self.cfg[\"gate_set\"][g]\n", + " \"\"\"For the Z gates (virtual rotation), we need to advance the phase of all the pulses which follows afterwards\"\"\"\n", + " if g==\"Z\":\n", + " self.phase_ref+=180\n", + " elif g==\"Z/2\":\n", + " self.phase_ref+=90\n", + " elif g==\"-Z/2\":\n", + " self.phase_ref+=-90\n", + " else:\n", + " # self.pulse(ch=self.cfg[\"qubit_ch\"], name=g, phase=deg2reg(self.phase_ref+ginfo[\"phase\"]), gain=ginfo[\"gain\"], play=True)\n", + " pass\n", + " self.setup_and_pulse(ch=self.cfg[\"qubit_ch\"], \n", + " waveform=g, \n", + " phase=self.deg2reg(self.phase_ref+ginfo[\"phase\"]), \n", + " gain=ginfo[\"gain\"], \n", + " style=ginfo[\"style\"],\n", + " freq=self.cfg[\"qubit_freq\"],\n", + " )\n", + "\n", + " self.sync_all(self.us2cycles(0.01)) # align channels and wait 10ns\n", + " # self.trigger_adc(adc1=1, adc2=1, adc_trig_offset=self.cfg[\"adc_trig_offset\"]) # trigger the adc acquisition\n", + " self.trigger(adcs=self.cfg['ro_chs'],\n", + " pins=[0], \n", + " adc_trig_offset=self.cfg[\"adc_trig_offset\"])\n", + " # self.pulse(ch=self.cfg[\"rr_ch\"], length = self.cfg[\"rr_length\"], play=True) # play readout pulse\n", + " self.pulse(ch=self.cfg['rr_ch'], t=0) # play readout pulse\n", + " self.sync_all(self.us2cycles(self.cfg[\"relax_delay\"])) # sync all channels" + ] + }, + { + "cell_type": "code", + "execution_count": 4, + "id": "3da4c2fa", + "metadata": {}, + "outputs": [], + "source": [ + "from qick.helpers import gauss\n", + "\n", + "pi_sigma = 10 # us2cycles(0.025) -> tProc @384MHz -> 10 cycles\n", + "pi_gain = 1\n", + "pi_2_gain = 1\n", + "nu_q_new = 100\n", + "f_res = 100\n", + "rot_angle = 0\n", + "\n", + "qubit_params = {'pi_sigma': pi_sigma, 'pi_gain': pi_gain, 'pi_2_gain': pi_2_gain}\n", + "\n", + "RO_CH = [0,1]\n", + "\n", + "rb_config = {\n", + " \"ro_chs\" : RO_CH, # --Fixed\n", + " 'qubit_freq' : nu_q_new, 'qubit_ch' : 3, \n", + " 'rr_freq' : f_res, 'rr_ch' : 6, \n", + " 'rr_length' : 3, \n", + " 'rr_gain' : 10000,\n", + " 'rr_phase' : rot_angle, \n", + " \"adc_trig_offset\" : 250, 'beta' : 0,\n", + " # 'relax_delay' : 500,\n", + " 'relax_delay' : 1,\n", + " 'reps' : 1000, 'rounds' : 0,\n", + " 'gate_seq' : generate_rbsequence(3), \n", + " 'gate_set' : {\n", + " \"I\": {\n", + " \"idata\": gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000),\n", + " \"qdata\": 0*gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000), \n", + " \"phase\":0, \"gain\":0, \"style\":\"arb\",\n", + " \n", + " },\n", + " \"X\": {\n", + " \"idata\": gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000),\n", + " \"qdata\": 0*gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000), \n", + " \"phase\":0, \"gain\":qubit_params['pi_gain'], \"style\":\"arb\",\n", + " },\n", + " \"Y\": {\n", + " \"idata\": gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000),\n", + " \"qdata\": 0*gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000),\n", + " \"phase\":-90, \"gain\":qubit_params['pi_gain'], \"style\":\"arb\",\n", + " },\n", + " \"Z\": {\n", + " \"idata\": gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000),\n", + " \"qdata\": 0*gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000), \n", + " \"phase\":0, \"gain\":0, \"style\":\"arb\",\n", + " },\n", + " \"X/2\": {\n", + " \"idata\": gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000),\n", + " \"qdata\": 0*gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000), \n", + " \"phase\":0, \"gain\":qubit_params['pi_2_gain'], \"style\":\"arb\",\n", + " },\n", + " \"-X/2\": {\n", + " \"idata\": gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000),\n", + " \"qdata\": 0*gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000), \n", + " \"phase\":180, \"gain\":qubit_params['pi_2_gain'], \"style\":\"arb\",\n", + " },\n", + "\n", + " \"Y/2\": {\n", + " \"idata\": gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000), \n", + " \"qdata\": 0*gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000), \n", + " \"phase\":-90, \"gain\":qubit_params['pi_2_gain'], \"style\":\"arb\",\n", + " },\n", + " \"-Y/2\": {\n", + " \"idata\": gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000), \n", + " \"qdata\": 0*gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000), \n", + " \"phase\":90, \"gain\":qubit_params['pi_2_gain'], \"style\":\"arb\",\n", + " },\n", + " \"Z/2\": {\n", + " \"idata\": gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000),\n", + " \"qdata\": 0*gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000), \n", + " \"phase\":0, \"gain\":0, \"style\":\"arb\",\n", + " },\n", + " \"-Z/2\": {\n", + " \"idata\": gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000),\n", + " \"qdata\": 0*gauss(mu=pi_sigma*16*4/2,si=pi_sigma*16,\n", + " length=4*pi_sigma*16,maxv=32000), \n", + " \"phase\":0, \"gain\":0, \"style\":\"arb\",\n", + " },\n", + "\n", + " } \n", + " }\n", + "\n", + "# \"\"\"Testing if it runs\"\"\"\n", + "# # config['gate_seq'] = generate_rbsequence(10)\n", + "# rb_config['gate_seq'] = ['Y', 'X/2']\n", + "# # rb_config['gate_seq'] = ['Y', 'X/2', 'X/2']\n", + "# rb_config['gate_seq'] = ['X', 'Y/2']\n", + "\n", + "\n", + "# print(rb_config['gate_seq'])\n", + "# rb_config['reps'] = 5000\n", + "# rb=RBSequenceProgram(soccfg, cfg=rb_config)\n", + "# results = rb.acquire(soc, load_pulses=True, progress=True)\n", + "# np.mean(results[3])" + ] + }, + { + "cell_type": "markdown", + "id": "c3ae8bf0", + "metadata": {}, + "source": [ + "## Experiment" + ] + }, + { + "cell_type": "code", + "execution_count": 5, + "id": "80e8b05f", + "metadata": {}, + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "- Experiment Start Time: 1761678244290016903 ns\n", + " - Depth array 1 - time: 1761678244293387583 ns, elapsed: 3370680 ns\n", + " - Sequence run time: (0): 2091 ms (1): 2051 ms (2): 2051 ms (3): 2051 ms (4): 2051 ms (5): 2050 ms (6): 2050 ms (7): 2053 ms (8): 2054 ms (9): 2050 ms (10): 2051 ms (11): 2050 ms (12): 2052 ms (13): 2050 ms (14): 2052 ms (15): 2050 ms (16): 2051 ms (17): 2051 ms (18): 2051 ms (19): 2051 ms (20): 2051 ms (21): 2050 ms (22): 2052 ms (23): 2051 ms (24): 2051 ms (25): 2050 ms (26): 2052 ms (27): 2051 ms (28): 2051 ms (29): 2050 ms (30): 2051 ms (31): 2050 ms (32): 2055 ms (33): 2051 ms (34): 2051 ms (35): 2050 ms (36): 2051 ms (37): 2050 ms (38): 2054 ms (39): 2052 ms \n", + " - Sequence Total time: 82668 ms (Run time: 82109 ms - Overhead time: 559 ms)\n", + " - Depth array 16 - time: 1761678326961805924 ns, elapsed: 82671789021 ns\n", + " - Sequence run time: (0): 2062 ms (1): 2061 ms (2): 2062 ms (3): 2067 ms (4): 2063 ms (5): 2069 ms (6): 2063 ms (7): 2061 ms (8): 2067 ms (9): 2062 ms (10): 2061 ms (11): 2061 ms (12): 2061 ms (13): 2061 ms (14): 2062 ms (15): 2061 ms (16): 2061 ms (17): 2061 ms (18): 2061 ms (19): 2061 ms (20): 2068 ms (21): 2061 ms (22): 2062 ms (23): 2062 ms (24): 2062 ms (25): 2061 ms (26): 2062 ms (27): 2061 ms (28): 2061 ms (29): 2063 ms (30): 2061 ms (31): 2061 ms (32): 2069 ms (33): 2062 ms (34): 2061 ms (35): 2061 ms (36): 2061 ms (37): 2061 ms (38): 2062 ms (39): 2061 ms \n", + " - Sequence Total time: 83443 ms (Run time: 82512 ms - Overhead time: 930 ms)\n", + " - Depth array 64 - time: 1761678410405049753 ns, elapsed: 166115032850 ns\n", + " - Sequence run time: (0): 2082 ms (1): 2081 ms (2): 2090 ms (3): 2083 ms (4): 2082 ms (5): 2082 ms (6): 2082 ms (7): 2081 ms (8): 2082 ms (9): 2081 ms (10): 2095 ms (11): 2082 ms (12): 2082 ms (13): 2082 ms (14): 2082 ms (15): 2082 ms (16): 2081 ms (17): 2081 ms (18): 2081 ms (19): 2082 ms (20): 2082 ms (21): 2082 ms (22): 2082 ms (23): 2082 ms (24): 2081 ms (25): 2082 ms (26): 2081 ms (27): 2097 ms (28): 2082 ms (29): 2082 ms (30): 2082 ms (31): 2082 ms (32): 2082 ms (33): 2081 ms (34): 2082 ms (35): 2082 ms (36): 2081 ms (37): 2082 ms (38): 2082 ms (39): 2083 ms \n", + " - Sequence Total time: 85603 ms (Run time: 83322 ms - Overhead time: 2280 ms)\n", + " - Depth array 128 - time: 1761678496008335304 ns, elapsed: 251718318401 ns\n", + " - Sequence run time: (0): 2108 ms (1): 2108 ms (2): 2108 ms (3): 2108 ms (4): 2108 ms (5): 2108 ms (6): 2108 ms (7): 2109 ms (8): 2109 ms (9): 2109 ms (10): 2108 ms (11): 2121 ms (12): 2108 ms (13): 2108 ms (14): 2108 ms (15): 2108 ms (16): 2109 ms (17): 2108 ms (18): 2109 ms (19): 2108 ms (20): 2121 ms (21): 2108 ms (22): 2108 ms (23): 2108 ms (24): 2109 ms (25): 2109 ms (26): 2109 ms (27): 2109 ms (28): 2109 ms (29): 2122 ms (30): 2109 ms (31): 2108 ms (32): 2108 ms (33): 2108 ms (34): 2108 ms (35): 2108 ms (36): 2108 ms (37): 2108 ms (38): 2122 ms (39): 2109 ms \n", + " - Sequence Total time: 88518 ms (Run time: 84407 ms - Overhead time: 4111 ms)\n", + " - Depth array 512 - time: 1761678584526531991 ns, elapsed: 340236515088 ns\n", + " - Sequence run time: (0): 2280 ms (1): 2269 ms (2): 2270 ms (3): 2270 ms (4): 2270 ms (5): 2270 ms (6): 2270 ms (7): 2270 ms (8): 2270 ms (9): 2270 ms (10): 2270 ms (11): 2270 ms (12): 2269 ms (13): 2270 ms (14): 2269 ms (15): 2270 ms (16): 2269 ms (17): 2270 ms (18): 2270 ms (19): 2270 ms (20): 2270 ms (21): 2269 ms (22): 2270 ms (23): 2270 ms (24): 2270 ms (25): 2270 ms (26): 2270 ms (27): 2270 ms (28): 2269 ms (29): 2270 ms (30): 2270 ms (31): 2270 ms (32): 2270 ms (33): 2269 ms (34): 2269 ms (35): 2269 ms (36): 2269 ms (37): 2270 ms (38): 2270 ms (39): 2270 ms \n", + " - Sequence Total time: 107704 ms (Run time: 90816 ms - Overhead time: 16887 ms)\n", + " - Depth array 768 - time: 1761678692230818292 ns, elapsed: 447940801389 ns\n", + " - Sequence run time: (0): 2378 ms (1): 2378 ms (2): 2378 ms (3): 2377 ms (4): 2377 ms (5): 2378 ms (6): 2377 ms (7): 2377 ms (8): 2377 ms (9): 2377 ms (10): 3050 ms (11): 2379 ms (12): 2383 ms (13): 2378 ms (14): 2382 ms (15): 2377 ms (16): 2382 ms (17): 2377 ms (18): 2382 ms (19): 2377 ms (20): 2382 ms (21): 2377 ms (22): 2378 ms (23): 2378 ms (24): 2378 ms (25): 2377 ms (26): 2378 ms (27): 2378 ms (28): 2378 ms (29): 2377 ms (30): 2377 ms (31): 2377 ms (32): 2377 ms (33): 2378 ms (34): 2378 ms (35): 2377 ms (36): 2378 ms (37): 2378 ms (38): 2377 ms (39): 2377 ms \n", + " - Sequence Total time: 119178 ms (Run time: 95816 ms - Overhead time: 23362 ms)\n", + " - Depth array 1024 - time: 1761678811409119857 ns, elapsed: 567119102954 ns\n", + " - Sequence run time: (0): 2485 ms (1): 2485 ms (2): 2485 ms (3): 2486 ms (4): 2485 ms (5): 2484 ms (6): 2485 ms (7): 2485 ms (8): 2485 ms (9): 2485 ms (10): 2485 ms (11): 2485 ms (12): 2486 ms (13): 2485 ms (14): 2485 ms (15): 2485 ms (16): 2485 ms (17): 2485 ms (18): 2485 ms (19): 2485 ms (20): 2486 ms (21): 2491 ms (22): 2490 ms (23): 2490 ms (24): 2490 ms (25): 2489 ms (26): 2489 ms (27): 2489 ms (28): 2490 ms (29): 2486 ms (30): 2485 ms (31): 2485 ms (32): 2485 ms (33): 2485 ms (34): 2485 ms (35): 2485 ms (36): 2485 ms (37): 2484 ms (38): 2486 ms (39): 2485 ms \n", + " - Sequence Total time: 131964 ms (Run time: 99462 ms - Overhead time: 32502 ms)\n", + "- End Time: 1761678943374441906 - elapsed: 699084425003\n" + ] + } + ], + "source": [ + "# from datetime import datetime\n", + "import time\n", + "\n", + "I2 = []\n", + "I2_err = []\n", + "\n", + "# Original settings\n", + "depth_array = [1, 2, 3, 4, 5, 6, 8, 10, 12, 16, 20, 24, 32, 40, 48, 64, 80, 96, 128, 192, \n", + " 256, 320, 384, 448, 512, 576, 640, 704, 768, 832, 896, 960, 1024, 1088, 1152, 1216, 1280, 1344, 1408,\n", + " 1472, 1536, 1600, 1664, 1728, 1750]\n", + "rb_config['reps'] = 4000\n", + "rb_config['rounds'] = 0\n", + "variety = 40\n", + "\n", + "# # Test settings 1\n", + "# rb_config['reps'] = 4000\n", + "# depth_array = [1, 16, 128, 1024]\n", + "# variety = 2\n", + "\n", + "# # Test settings 2\n", + "# rb_config['relax_delay'] = 100\n", + "# rb_config['reps'] = 4000\n", + "# depth_array = [1, 16, 64, 128, 512, 768, 1024]\n", + "# variety = 3\n", + "\n", + "# # Test settings 3\n", + "# rb_config['relax_delay'] = 500 # us\n", + "# depth_array = [1, 1024]\n", + "# rb_config['reps'] = 4000\n", + "# variety = 5\n", + "\n", + "# Test settings 4\n", + "rb_config['relax_delay'] = 500 # us\n", + "depth_array = [1, 16, 64, 128, 512, 768, 1024]\n", + "reps = 4000\n", + "variety = 40\n", + "\n", + "exp_start_time_ns = time.time_ns()\n", + "print('- Experiment Start Time: %0d ns' % (exp_start_time_ns))\n", + "\n", + "th = -30\n", + "\n", + "# Loop for different lengths\n", + "for d in depth_array:\n", + " sequence_time_ns = time.time_ns()\n", + " print(' - Depth array %0d - time: %0d ns, elapsed: %0d ns' % (d,sequence_time_ns,(sequence_time_ns-exp_start_time_ns)) )\n", + " i2_temp = []\n", + " run_time_total_ns = 0\n", + " # Loop for different random sequences\n", + " print(' - Sequence run time: ', end=\" \")\n", + " for jj in range(variety):\n", + " rb_config['gate_seq'] = generate_rbsequence(d)\n", + " # print(rb_config['gate_seq'])\n", + " rb = RBSequenceProgram(soccfg, cfg=rb_config)\n", + " # avgi0, avgq0, avgi1, avgq1 = rb.acquire(soc, load_pulses=True, progress=False, debug=False, single_shot=True)\n", + " run_time_start_ns = time.time_ns()\n", + " adc1, adc2 = rb.acquire(soc, progress=False)\n", + " run_time_end_ns = time.time_ns()\n", + " run_time_total_ns += (run_time_end_ns-run_time_start_ns)\n", + " print(' (%0d): %0d ms' % (jj, (run_time_end_ns-run_time_start_ns)/1e6), end=\" \")\n", + " avgi0 = adc1[0]\n", + " avgq0 = adc1[1]\n", + " avgi1 = adc2[0]\n", + " avgq1 = adc2[1]\n", + " df = pd.DataFrame(avgi1, columns=['data'])\n", + " g = df['data'].apply(lambda x: 0 if x < th else 1).mean()\n", + " i2_temp.append(g) \n", + " print('')\n", + " I2.append(np.mean(i2_temp))\n", + " I2_err.append(np.std(i2_temp)/np.sqrt(variety))\n", + " seq_end_time_ns = time.time_ns()\n", + " print(' - Sequence Total time: %0d ms (Run time: %0d ms - Overhead time: %0d ms)' % ((seq_end_time_ns - sequence_time_ns)/1e6, run_time_total_ns/1e6, (seq_end_time_ns - sequence_time_ns)/1e6 - run_time_total_ns/1e6))\n", + "\n", + "exp_end_time_ns = int(time.time_ns())\n", + "print('- End Time: %0d - elapsed: %0d' % (exp_end_time_ns, (exp_end_time_ns-exp_start_time_ns)))\n" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "id": "5f90c068", + "metadata": {}, + "outputs": [], + "source": [ + "print(rb)" + ] + } + ], + "metadata": { + "kernelspec": { + "display_name": "Python 3 (ipykernel)", + "language": "python", + "name": "python3" + } + }, + "nbformat": 4, + "nbformat_minor": 5 +} From c4301519483ef624c8b8672c3dd88b34de2157bb Mon Sep 17 00:00:00 2001 From: Diego Martin Date: Wed, 29 Oct 2025 14:38:00 -0500 Subject: [PATCH 02/13] [openquantumhardware/qick_internal#22] Updated test03_random_benchmarking notebook --- .../test03_random_benchmarking.ipynb | 1176 +++++++++++++++-- 1 file changed, 1089 insertions(+), 87 deletions(-) diff --git a/firmware/testbench/testbench_notebooks/test03_random_benchmarking.ipynb b/firmware/testbench/testbench_notebooks/test03_random_benchmarking.ipynb index 7667c3c6..732d6463 100644 --- a/firmware/testbench/testbench_notebooks/test03_random_benchmarking.ipynb +++ b/firmware/testbench/testbench_notebooks/test03_random_benchmarking.ipynb @@ -10,7 +10,7 @@ }, { "cell_type": "code", - "execution_count": null, + "execution_count": 1, "id": "3b5c048a", "metadata": {}, "outputs": [], @@ -32,14 +32,79 @@ }, { "cell_type": "code", - "execution_count": null, + "execution_count": 2, "id": "ab849bc3", "metadata": {}, - "outputs": [], + "outputs": [ + { + "data": { + "application/javascript": "\ntry {\nrequire(['notebook/js/codecell'], function(codecell) {\n codecell.CodeCell.options_default.highlight_modes[\n 'magic_text/x-csrc'] = {'reg':[/^%%microblaze/]};\n Jupyter.notebook.events.one('kernel_ready.Kernel', function(){\n Jupyter.notebook.get_cells().map(function(cell){\n if (cell.cell_type == 'code'){ cell.auto_highlight(); } }) ;\n });\n});\n} catch (e) {};\n" + }, + "metadata": {}, + "output_type": "display_data" + }, + { + "data": { + "application/javascript": "\ntry {\nrequire(['notebook/js/codecell'], function(codecell) {\n codecell.CodeCell.options_default.highlight_modes[\n 'magic_text/x-csrc'] = {'reg':[/^%%pybind11/]};\n Jupyter.notebook.events.one('kernel_ready.Kernel', function(){\n Jupyter.notebook.get_cells().map(function(cell){\n if (cell.cell_type == 'code'){ cell.auto_highlight(); } }) ;\n });\n});\n} catch (e) {};\n" + }, + "metadata": {}, + "output_type": "display_data" + }, + { + "name": "stdout", + "output_type": "stream", + "text": [ + "QICK running on ZCU216, software version 0.2.371\n", + "\n", + "Firmware configuration (built Tue Oct 21 16:43:27 2025):\n", + "\n", + "\tGlobal clocks (MHz): tProc dispatcher timing 430.080, RF reference 245.760\n", + "\tGroups of related clocks: [tProc timing clock, DAC tile 1, DAC tile 2, DAC tile 3], [DAC tile 0], [ADC tile 2]\n", + "\n", + "\t1 signal generator channels:\n", + "\t0:\taxis_signal_gen_v6 - fs=9584.640 Msps, fabric=599.040 MHz\n", + "\t\tenvelope memory: 65536 complex samples (6.838 us)\n", + "\t\t32-bit DDS, range=9584.640 MHz\n", + "\t\tDAC tile 0, blk 0 is 0_228 on JHC1, or QICK box DAC port 0\n", + "\n", + "\t1 readout channels:\n", + "\t0:\taxis_dyn_readout_v1 - configured by tProc output 4\n", + "\t\tfs=2457.600 Msps, decimated=307.200 MHz, 32-bit DDS, range=2457.600 MHz\n", + "\t\taxis_avg_buffer v1.2 (has edge counter, no weights)\n", + "\t\tmemory 8192 accumulated, 4096 decimated (13.333 us)\n", + "\t\ttriggered by tport 10, pin 0, feedback to tProc input 0\n", + "\t\tADC tile 2, blk 0 is 0_226 on JHC7, or QICK box ADC port 4\n", + "\n", + "\t8 digital output pins:\n", + "\t0:\tPMOD0_0_LS\n", + "\t1:\tPMOD0_1_LS\n", + "\t2:\tPMOD0_2_LS\n", + "\t3:\tPMOD0_3_LS\n", + "\t4:\tPMOD0_4_LS\n", + "\t5:\tPMOD0_5_LS\n", + "\t6:\tPMOD0_6_LS\n", + "\t7:\tPMOD0_7_LS\n", + "\n", + "\ttProc: qick_processor (\"v2\") rev 27, core execution clock 200.000 MHz\n", + "\t\tmemories (words): program 16384, data 16384, waveform 1024\n", + "\t\texternal start pin: None\n", + "\t\texternal stop pin: None\n", + "\n", + "\tDDR4 memory buffer: 1073741824 samples (3.495 sec), 128 samples/transfer\n", + "\t\twired to readouts [0]\n", + "\n", + "\tMR buffer: 8192 samples (3.333 us), wired to readouts [0]\n" + ] + } + ], "source": [ "# soc = QickSoc('/home/xilinx/jupyter_notebooks/fw/2025-06-15_216_tprocv2r24_standard/qick_216.bit')\n", "# soc = QickSoc('/home/xilinx/jupyter_notebooks/fw/qick_tprocv2_216_standard_1ch_250828_2/qick_216.bit')\n", - "soc = QickSoc('/home/xilinx/jupyter_notebooks/fw/qick_tprocv2_216_standard_1ch_250829_2/qick_216.bit')\n", + "# soc = QickSoc('/home/xilinx/jupyter_notebooks/fw/qick_tprocv2_216_standard_1ch_250829_2/qick_216.bit')\n", + "soc = QickSoc('/home/xilinx/jupyter_notebooks/fw/qick_tprocv2_216_standard_1ch_251021_1/qick_216.bit')\n", + "\n", + "# soc = QickSoc('/home/xilinx/jupyter_notebooks/fw/qick_tprocv2_111_standard_250801_1/qick_111.bit')\n", + "# soc = QickSoc('/home/xilinx/jupyter_notebooks/fw/qick_tprocv2_111_standard_1ch_251020_1/qick_111.bit')\n", "\n", "soccfg = soc\n", "print(soccfg)" @@ -56,12 +121,12 @@ }, { "cell_type": "code", - "execution_count": null, + "execution_count": 21, "id": "d6a246e2", "metadata": {}, "outputs": [], "source": [ - "import random\n", + "import random, time\n", "from qick.asm_v2 import AcquireProgramV2, AveragerProgramV2, AsmV2, AsmInst\n", "from qick.tprocv2_assembler import LFSR\n", "\n", @@ -69,6 +134,8 @@ "\n", " def _initialize(self, cfg):\n", "\n", + " t=time.time_ns(); dbg_i=0\n", + "\n", " ro_ch = cfg['ro_ch']\n", " gen_ch = cfg['gen_ch']\n", "\n", @@ -81,8 +148,12 @@ "\n", " self.gates_set = cfg['gates_set']\n", "\n", - " # Generate minimum length gaussian pulses\n", - " self.gauss_len = self.cycles2us(20, gen_ch=gen_ch)\n", + " if cfg['pulse_len_us']:\n", + " self.gauss_len = cfg['pulse_len_us']\n", + " else:\n", + " # If None generate minimum length gaussian pulses\n", + " self.gauss_len = self.cycles2us(3, gen_ch=gen_ch)\n", + " # self.gauss_len = self.cycles2us(100, gen_ch=gen_ch)\n", " self.add_gauss(ch=gen_ch, name=\"gauss_env\", sigma=self.gauss_len/10, length=self.gauss_len, even_length=False)\n", " \n", " \"\"\"This adds the different types of pulses to the pulse library which can be played on demand later\"\"\"\n", @@ -98,13 +169,15 @@ " phase = ginfo[\"phase\"],\n", " gain = ginfo[\"gain\"],\n", " )\n", - " print(gates_print)\n", + " if cfg['verbose']:\n", + " print(gates_print)\n", "\n", " # Pulse for Readout\n", " self.add_pulse(ch=gen_ch, name=\"ro_pulse\", ro_ch=ro_ch, \n", " style = \"const\", \n", " freq = cfg['freq'], \n", - " length = 1.0, \n", + " # length = 1.0, \n", + " length = 0.1, \n", " phase = 0,\n", " gain = 0.2,\n", " )\n", @@ -120,7 +193,7 @@ "\n", " # Subroutine to generate random sequence using tProc LFSR\n", " sub_gen_rnd_seq = AsmV2()\n", - " if sub_gen_rnd_seq:\n", + " if sub_gen_rnd_seq and cfg['use_lfsr']:\n", " # Initialize Seed of LFSR (write s1/s_rand with seed literal)\n", " sub_gen_rnd_seq.write_reg(dst='s_rand', src='lfsr_seed')\n", " # Initialize virtual-Z gate phase accumulator (r10)\n", @@ -128,6 +201,9 @@ "\n", " # Get Random Gate index\n", " sub_gen_rnd_seq.label('gen_seq_loop')\n", + "\n", + " sub_gen_rnd_seq.cond_jump(label='gen_seq_end', arg1='seq_length', test='Z', op='-', arg2=0)\n", + "\n", " # Read LFSR (read s1/s_rand) and trunc to 4 lsbs\n", " sub_gen_rnd_seq.append_macro(AsmInst(inst={'CMD':\"REG_WR\", 'DST': 'r4', 'SRC':'op', 'OP': 's1 AND #h0F'}, addr_inc=1))\n", " ## Check if index is within Set Range (r4 - arg2(set_size) < 0)\n", @@ -161,12 +237,15 @@ " ## Update r_wave phase w1 with Z-phase accumulator\n", " sub_gen_rnd_seq.append_macro(AsmInst(inst={'CMD':\"REG_WR\", 'DST': 'w1', 'SRC':'op', 'OP': 'w1 + r10'}, addr_inc=1))\n", " ## Write r_wave to WPORT\n", - " sub_gen_rnd_seq.append_macro(AsmInst(inst={'CMD':\"WPORT_WR\", 'DST': '0', 'SRC':'r_wave'}, addr_inc=1))\n", + " sub_gen_rnd_seq.append_macro(AsmInst(inst={'CMD':\"WPORT_WR\", 'DST': str(cfg['gen_ch']), 'SRC':'r_wave'}, addr_inc=1))\n", "\n", " # Repeat L times\n", " sub_gen_rnd_seq.label('gen_seq_next_gate')\n", " sub_gen_rnd_seq.inc_reg(dst='seq_length', src=-1)\n", - " sub_gen_rnd_seq.cond_jump(label='gen_seq_loop', arg1='seq_length', test='NZ', op='-', arg2=0)\n", + " # sub_gen_rnd_seq.cond_jump(label='gen_seq_loop', arg1='seq_length', test='NZ', op='-', arg2=0)\n", + " sub_gen_rnd_seq.jump(label='gen_seq_loop')\n", + "\n", + " sub_gen_rnd_seq.label('gen_seq_end')\n", "\n", " # End of subroutine\n", " self.add_subroutine(\"gen_rnd_seq\", sub_gen_rnd_seq)\n", @@ -174,7 +253,16 @@ " # Configure Readout\n", " self.add_readoutconfig(ch=ro_ch, name=\"measure\", freq=cfg['freq'], gen_ch=gen_ch)\n", "\n", + " # send the config to the dynamic RO\n", + " self.send_readoutconfig(ch=cfg['ro_ch'], name=\"measure\", t=0.0)\n", + "\n", + " t=time.time_ns(); \n", + " # print(' // DBG RB initialize(): %0d - %0d ns' % (dbg_i, time.time_ns()-t)); t=time.time_ns(); dbg_i+=1\n", + "\n", + "\n", " def _body(self, cfg):\n", + " t=time.time_ns(); dbg_i=0\n", + " # print(' // DBG RB body() start: %0d - %0d ns' % (dbg_i, time.time_ns()-t)); t=time.time_ns(); dbg_i+=1\n", "\n", " ## N_G: number of different gates sequences: e.g.: 5\n", " N_G = cfg['N_G']\n", @@ -185,9 +273,6 @@ " ## N_E: number of times the same sequence is applied\n", " N_E = cfg['N_E']\n", "\n", - " # # send the config to the dynamic RO\n", - " # self.send_readoutconfig(ch=cfg['ro_ch'], name=\"measure\", t=0.0)\n", - "\n", " # Initialize total iterations counter (for debug)\n", " self.write_reg(dst='r8', src=0)\n", " # Convert 90deg to phase representation value in r9\n", @@ -201,36 +286,45 @@ "\n", " # Iterate over different sequences\n", " for n_g in range(0, N_G):\n", - "\n", + " \n", " # Iterate over different lengths\n", " for n_l in range(0, N_L):\n", - "\n", + " dbg_i=0\n", " # Generate a random sequence of length l\n", " if cfg['lfsr_seed']:\n", " seed = cfg['lfsr_seed']\n", " else:\n", " seed = np.random.randint(123456789,987654321)\n", - " print('Sequence Seed: %0d' % (seed))\n", - " self.gate_seq = self.generate_rbsequence(depth=L[n_l], gates_set=self.gates_set, use_lfsr=cfg['use_lfsr'], lfsr_seed=seed)\n", + " # print('Sequence Seed: %0d' % (seed))\n", "\n", - " if cfg['test_seq'] and not cfg['use_lfsr']:\n", + " t=time.time_ns(); \n", + " if cfg['test_seq']:\n", + " depth = len(cfg['test_seq'])\n", " self.gate_seq = cfg['test_seq']\n", + " else:\n", + " depth = L[n_l]\n", + " self.gate_seq = self.generate_rbsequence(depth=depth, gates_set=self.gates_set, use_lfsr=cfg['use_lfsr'], lfsr_seed=seed)\n", + " # print(' // DBG generate_rbsequence: %0d - %0d ns' % (dbg_i, time.time_ns()-t)); t=time.time_ns(); dbg_i+=1\n", + "\n", "\n", " self.seq_load_time = len(self.gate_seq) * 40 * 0.005\n", " self.seq_play_time = len(self.gate_seq) * self.gauss_len\n", "\n", - " for n_e in range(0, N_E):\n", + " # for n_e in range(0, N_E):\n", + " for n_e in range(0, 1):\n", " # self.open_loop(n=N_E, name='N_E_loop_%0d'%(n_g*N_L+n_l))\n", " # if (True): # just to indent\n", "\n", - " print(self.gate_seq) # for debug\n", - " print('Sequence Load Time: %0.3f us'%(self.seq_load_time))\n", - " print('Sequence Play Time: %0.3f us'%(self.seq_play_time))\n", + " if cfg['verbose']:\n", + " print(self.gate_seq) # for debug\n", + " print('Sequence Load Time: %0.3f us'%(self.seq_load_time))\n", + " print('Sequence Play Time: %0.3f us'%(self.seq_play_time))\n", "\n", - " # Delay start of play sequence\n", - " ## Increase reference_time in delay time (delay should be the estimated time in takes to write the full sequence in the dispatcher)\n", - " self.delay(self.seq_load_time, tag='pre_seq_delay_%0d%0d%0d'%(n_g,n_l,n_e))\n", - " # self.delay(self.seq_load_time, tag='pre_seq_delay_%0d%0d%0d'%(n_g,n_l,0))\n", + " if cfg['use_lfsr']:\n", + " # Delay start of play sequence\n", + " ## Increase reference_time in delay time (delay should be the estimated time in takes to write the full sequence in the dispatcher)\n", + " self.delay(self.seq_load_time, tag='pre_seq_delay_%0d%0d%0d'%(n_g,n_l,n_e))\n", + " # self.delay(self.seq_load_time, tag='pre_seq_delay_%0d%0d%0d'%(n_g,n_l,0))\n", "\n", " if not cfg['use_lfsr']:\n", " self.phase_ref = 0\n", @@ -263,12 +357,15 @@ " ## Update r_wave phase w1 with Z-phase accumulator\n", " self.append_macro(AsmInst(inst={'CMD':\"REG_WR\", 'DST': 'w1', 'SRC':'op', 'OP': 'w1 + r10'}, addr_inc=1))\n", " ## Write r_wave to WPORT\n", - " self.append_macro(AsmInst(inst={'CMD':\"WPORT_WR\", 'DST': '0', 'SRC':'r_wave'}, addr_inc=1))\n", + " self.append_macro(AsmInst(inst={'CMD':\"WPORT_WR\", 'DST': str(cfg['gen_ch']), 'SRC':'r_wave'}, addr_inc=1))\n", + "\n", + " # print(' // DBG RB gate_seq code NO_LFSR: %0d - %0d ns' % (dbg_i, time.time_ns()-t)); t=time.time_ns(); dbg_i+=1\n", + "\n", " else:\n", " # Initialize tProc LFSR, Configure LFSR seed in lfsr_seed\n", " self.write_reg(dst='lfsr_seed', src=seed)\n", " # Configure Random Sequence Length in seq_length\n", - " self.write_reg(dst='seq_length', src=L[n_l]-1)\n", + " self.write_reg(dst='seq_length', src=depth-1)\n", " # Generate Random Sequence - will generate the same sequence as python generate_rbsequence()\n", " self.call(\"gen_rnd_seq\")\n", " # Add last gate (taken from the python generated sequence)\n", @@ -281,12 +378,14 @@ " ## Update r_wave phase w1 with Z-phase accumulator\n", " self.append_macro(AsmInst(inst={'CMD':\"REG_WR\", 'DST': 'w1', 'SRC':'op', 'OP': 'w1 + r10'}, addr_inc=1))\n", " ## Write r_wave to WPORT\n", - " self.append_macro(AsmInst(inst={'CMD':\"WPORT_WR\", 'DST': '0', 'SRC':'r_wave'}, addr_inc=1))\n", + " self.append_macro(AsmInst(inst={'CMD':\"WPORT_WR\", 'DST': str(cfg['gen_ch']), 'SRC':'r_wave'}, addr_inc=1))\n", + "\n", + " # print(' // DBG RB gate_seq code LFSR: %0d - %0d ns' % (dbg_i, time.time_ns()-t)); t=time.time_ns(); dbg_i+=1\n", "\n", "\n", " if cfg['acquire_mode'] == 'DEC':\n", " # Generate readout pulse\n", - " self.send_readoutconfig(ch=cfg['ro_ch'], name=\"measure\", t=0.0)\n", + " # self.send_readoutconfig(ch=cfg['ro_ch'], name=\"measure\", t=0.0)\n", "\n", " # Send Readout Pulse\n", " self.pulse(ch=cfg[\"gen_ch\"], name='ro_pulse', t=0.0)\n", @@ -300,7 +399,7 @@ "\n", " if cfg['acquire_mode'] == 'AVG':\n", " # Generate readout pulse\n", - " self.send_readoutconfig(ch=cfg['ro_ch'], name=\"measure\", t=0.0)\n", + " # self.send_readoutconfig(ch=cfg['ro_ch'], name=\"measure\", t=0.0)\n", "\n", " # Send Readout Pulse\n", " self.pulse(ch=cfg[\"gen_ch\"], name='ro_pulse', t=0.0)\n", @@ -322,6 +421,7 @@ "\n", " # self.close_loop()\n", "\n", + " # print(' // DBG RB N_E Loop: %0d - %0d ns' % (dbg_i, time.time_ns()-t)); t=time.time_ns(); dbg_i+=1\n", "\n", " def generate_rbsequence(self, depth, gates_set, use_lfsr=False, lfsr_seed=0):\n", " \"\"\"Single qubit RB program to generate a sequence of 'd' gates followed \n", @@ -380,21 +480,80 @@ }, { "cell_type": "code", - "execution_count": null, + "execution_count": 22, "id": "a8b9a691", "metadata": {}, - "outputs": [], + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "0: I ; 1: Z ; 2: X ; 3: Y ; 4: Z/2 ; 5: X/2 ; 6: Y/2 ; 7: -Z/2 ; 8: -X/2 ; 9: -Y/2 ; \n", + "['X/2', '-X/2']\n", + "Sequence Load Time: 0.400 us\n", + "Sequence Play Time: 0.200 us\n", + "['X/2', 'X/2', '-Z/2', '-Y/2', '-Y/2']\n", + "Sequence Load Time: 1.000 us\n", + "Sequence Play Time: 0.500 us\n", + "['X/2', '-X/2']\n", + "Sequence Load Time: 0.400 us\n", + "Sequence Play Time: 0.200 us\n", + "['X/2', 'X/2', '-Z/2', '-Y/2', '-Y/2']\n", + "Sequence Load Time: 1.000 us\n", + "Sequence Play Time: 0.500 us\n" + ] + }, + { + "data": { + "application/vnd.jupyter.widget-view+json": { + "model_id": "a4b53aea6d7b4601821f95c4216036c8", + "version_major": 2, + "version_minor": 0 + }, + "text/plain": [ + " 0%| | 0/1 [00:00" + ] + }, + "metadata": { + "needs_background": "light" + }, + "output_type": "display_data" + } + ], "source": [ - "GEN_CH = 0\n", - "RO_CH = 0\n", - "TRIG_TIME = 0.1\n", + "SIM = True\n", + "TRIG_TIME = 0.2\n", "FREQ = 500\n", "RO_LEN = 2.0\n", "USE_LFSR = True\n", "LFSR_SEED = 123456789\n", "# LFSR_SEED = None # use None to randomize the seed from python\n", "ACQUIRE_MODE = 'AVG' # AVG, DEC\n", + "# ACQUIRE_MODE = 'DEC' # AVG, DEC\n", "\n", + "if SIM:\n", + " GEN_CH = 0 # DAC228_T0_CH0\n", + " RO_CH = 0 # ADC224_T0_CH0\n", + "else:\n", + " GEN_CH = 7 # DAC229_T1_CH3\n", + " RO_CH = 1 # ADC224_T0_CH1\n", "\n", "qubit_params = {'pi_gain': 1.0, 'pi_2_gain': 0.5, 'freq': FREQ, 'z_gain': 0.2}\n", "\n", @@ -607,58 +766,87 @@ " 'freq' : FREQ,\n", " 'trig_time' : TRIG_TIME,\n", " 'acquire_mode' : ACQUIRE_MODE,\n", - " 'relax_delay' : 0,\n", - " 'reps' : 1,\n", - " 'rounds' : 1,\n", + " 'relax_delay' : 1,\n", + " # 'rounds' : 1,\n", " 'gates_set' : GATES_SET,\n", + " 'pulse_len_us' : 0.01,\n", " 'test_seq' : None,\n", " 'use_lfsr' : USE_LFSR,\n", " 'lfsr_seed' : LFSR_SEED,\n", - " 'N_G': 1,\n", - " 'N_L': 3,\n", - " 'L': np.array([5, 15, 30]).dot(1),\n", - " 'N_E': 3\n", + " 'N_G' : 1,\n", + " 'N_L' : 3,\n", + " 'L' : np.array([1, 3, 5]).dot(1),\n", + " 'N_E' : 1\n", " }\n", "\n", - "# rb_config = {\n", - "# 'gen_ch': GEN_CH,\n", - "# 'ro_ch': RO_CH,\n", - "# 'ro_len': RO_LEN,\n", - "# 'freq': FREQ,\n", - "# 'trig_time': TRIG_TIME,\n", - "# 'acquire_mode' : ACQUIRE_MODE,\n", - "# 'relax_delay':0,\n", - "# 'reps':1, 'rounds':1,\n", - "# 'gates_set': GATES_SET,\n", - "# 'test_seq': ['X','Z/2','X','Z/2','X','Z/2','X','Z/2','X','Z/2','Y','-Z/2','Y','-Z/2','Y','-Z/2','Y','-Z/2','Y','-Z/2'],\n", - "# 'use_lfsr': False, 'lfsr_seed': 0,\n", - "# 'N_G': 2, 'N_L': 1, 'L': [5], 'N_E': 1,\n", - "# }\n", - "\n", - "# rb_config = {\n", - "# 'gen_ch' : GEN_CH,\n", - "# 'ro_ch' : RO_CH,\n", - "# 'ro_len' : RO_LEN,\n", - "# 'freq' : FREQ,\n", - "# 'trig_time' : TRIG_TIME,\n", - "# 'acquire_mode' : ACQUIRE_MODE,\n", - "# 'relax_delay' : 0,\n", - "# 'reps' : 1,\n", - "# 'rounds' : 1,\n", - "# 'gates_set' : GATES_SET,\n", - "# 'test_seq' : None,\n", - "# 'use_lfsr' : True, \n", - "# 'lfsr_seed' : 0,\n", - "# 'N_G': 5, 'N_L': 2, 'L': [1000, 2000], 'N_E': 5,\n", - "# }\n", - "\n", - "\n", - "prog = RBSequenceProgram(soccfg, reps=1, final_delay=0, cfg=rb_config)\n", - "\n", - "if (ACQUIRE_MODE == 'DEC'):\n", + "\n", + "# # Experiment Settings\n", + "# rb_config['L'] = [1, 2, 3, 4, 5, 6, 8, 10, 12, 16, 20, 24, 32, 40, 48, 64, 80, 96, 128, 192, \n", + "# 256, 320, 384, 448, 512, 576, 640, 704, 768, 832, 896, 960, 1024, 1088, 1152, 1216, 1280, 1344, 1408,\n", + "# 1472, 1536, 1600, 1664, 1728, 1750]\n", + "# rb_config['N_L'] = len(rb_config['L'])\n", + "# rb_config['N_G'] = 40\n", + "# rb_config['N_E'] = 4000\n", + "\n", + "# # Test settings 1a - Averaged Acquire - NO LSFR\n", + "# rb_config['acquire_mode'] = 'AVG'\n", + "# rb_config['use_lfsr'] = False\n", + "# rb_config['L'] = [1, 16, 64, 128, 512, 768, 1024]\n", + "# # rb_config['L'] = [1, 16, 64]\n", + "# rb_config['L'] = [768, 16, 1]\n", + "# # rb_config['L'] = [2, 3]\n", + "# rb_config['N_L'] = len(rb_config['L'])\n", + "# rb_config['N_G'] = 1 # a.k.a: rounds\n", + "# rb_config['N_E'] = 1 # a.k.a: reps\n", + "# rb_config['verbose'] = True\n", + "\n", + "# # Test settings 1b - Averaged Acquire - LSFR\n", + "# rb_config['acquire_mode'] = 'AVG'\n", + "# rb_config['use_lfsr'] = True\n", + "# rb_config['L'] = [1, 16, 64, 128, 512, 768, 1024]\n", + "# # rb_config['L'] = [1, 16, 64]\n", + "# rb_config['L'] = [768, 16, 1]\n", + "# # rb_config['L'] = [2, 3]\n", + "# rb_config['N_L'] = len(rb_config['L'])\n", + "# rb_config['N_G'] = 1 # a.k.a: rounds\n", + "# rb_config['N_E'] = 1 # a.k.a: reps\n", + "# rb_config['verbose'] = True\n", + "\n", + "# Test settings 2a - Decimation Acquire - NO LFSR\n", + "rb_config['acquire_mode'] = 'DEC'\n", + "rb_config['ro_len'] = 1.0\n", + "rb_config['pulse_len_us'] = 0.1\n", + "rb_config['use_lfsr'] = False\n", + "rb_config['L'] = [2, 5]\n", + "rb_config['N_L'] = len(rb_config['L'])\n", + "rb_config['N_G'] = 2 # a.k.a: rounds\n", + "rb_config['N_E'] = 1 # a.k.a: reps\n", + "rb_config['verbose'] = True\n", + "\n", + "# Test settings 2b - Decimation Acquire - LFSR\n", + "rb_config['acquire_mode'] = 'DEC'\n", + "rb_config['ro_len'] = 1.0\n", + "rb_config['pulse_len_us'] = 0.1\n", + "rb_config['use_lfsr'] = True\n", + "rb_config['L'] = [2, 5]\n", + "rb_config['N_L'] = len(rb_config['L'])\n", + "rb_config['N_G'] = 2 # a.k.a: rounds\n", + "rb_config['N_E'] = 1 # a.k.a: reps\n", + "rb_config['verbose'] = True\n", + "\n", + "\n", + "prog = RBSequenceProgram(soccfg, reps=rb_config['N_E'], final_delay=rb_config['relax_delay'], cfg=rb_config)\n", + "\n", + "\n", + "if (rb_config['acquire_mode'] == 'DEC'):\n", " iq_list = prog.acquire_decimated(soc, rounds=1)\n", " t = prog.get_time_axis(ro_index=0)\n", "\n", + " if rb_config['N_E'] > 1:\n", + " iq_list = iq_list[0]\n", + "\n", + " print(iq_list[0].shape)\n", + "\n", " plt.figure(figsize=[20,15])\n", " N = len(iq_list[0])\n", " for trig, iq in enumerate(iq_list[0]):\n", @@ -670,9 +858,12 @@ " plt.ylabel(\"a.u.\")\n", " plt.xlabel(\"us\")\n", "\n", - "if (ACQUIRE_MODE == 'AVG'):\n", - " # prog = RBSequenceProgram(soccfg, reps=1, final_delay=0.0, cfg=rb_config)\n", + "\n", + "if (rb_config['acquire_mode'] == 'AVG'):\n", " iq_list = prog.acquire(soc, rounds=1)\n", + " # iq_list = prog.acquire(soc, rounds=rb_config['N_G'])\n", + "\n", + " print(iq_list[0].shape)\n", "\n", " plt.figure(figsize=[20,10])\n", " plt.plot(np.abs(iq_list[0].dot([1,1j])), label=\"magnitude\", ls='--', marker='x')\n", @@ -683,10 +874,325 @@ }, { "cell_type": "code", - "execution_count": null, - "id": "43667010", + "execution_count": 10, + "id": "1512a77e", "metadata": {}, - "outputs": [], + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "macros:\n", + "\tWriteReg(dst='s_core_w1', src=0)\n", + "\tConfigReadout(ch=0, name='measure', t=0.0, tag=None, t_params={'t': }, t_regs={'t': 0})\n", + "\tDelay(t=1.0, auto=True, gens=True, ros=True, tag=None, t_params={'t': }, t_regs={'t': 430})\n", + "\tOpenLoop(n=1, name='reps')\n", + "\tWriteReg(dst='r8', src=0)\n", + "\tWriteReg(dst='r9', src=1073741824)\n", + "\tDelay(t=1.0, auto=False, tag=None, t_params={'t': }, t_regs={'t': 430})\n", + "\tWait(t=0.0, auto=False, tag=None, no_warn=False, t_params={'t': }, t_regs={'t': 0})\n", + "\tDelay(t=2.0, auto=False, tag='pre_seq_delay_000', t_params={'t': }, t_regs={'t': 860})\n", + "\tWriteReg(dst='lfsr_seed', src=123456789)\n", + "\tWriteReg(dst='seq_length', src=9)\n", + "\tCall(label='gen_rnd_seq')\n", + "\tWriteReg(dst='r4', src=2)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'r_wave', 'SRC': 'wmem', 'ADDR': 'r4'}, addr_inc=1)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'w1', 'SRC': 'op', 'OP': 'w1 + r10'}, addr_inc=1)\n", + "\tAsmInst(inst={'CMD': 'WPORT_WR', 'DST': '0', 'SRC': 'r_wave'}, addr_inc=1)\n", + "\tPulse(ch=0, name='ro_pulse', t=0.0, tag=None, t_params={'t': }, t_regs={'t': 0})\n", + "\tTrigger(ros=[0], tts=[], pins=[0], t=0.2, width=0.023251488095238096, ddr4=True, mr=False, tag=None, t_params={'t': , 'width': }, t_regs={'t': 86, 'width': 10}, outdict=defaultdict(, {}), trigset={0, 9, 10})\n", + "\tDelay(t=1.0, auto=False, tag='post_seq_delay_000', t_params={'t': }, t_regs={'t': 430})\n", + "\tDelay(t=1.0, auto=False, tag=None, t_params={'t': }, t_regs={'t': 430})\n", + "\tWait(t=0.0, auto=False, tag=None, no_warn=False, t_params={'t': }, t_regs={'t': 0})\n", + "\tIncReg(dst='r8', src=1)\n", + "\tDelay(t=2.0, auto=False, tag='pre_seq_delay_100', t_params={'t': }, t_regs={'t': 860})\n", + "\tWriteReg(dst='lfsr_seed', src=123456789)\n", + "\tWriteReg(dst='seq_length', src=9)\n", + "\tCall(label='gen_rnd_seq')\n", + "\tWriteReg(dst='r4', src=2)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'r_wave', 'SRC': 'wmem', 'ADDR': 'r4'}, addr_inc=1)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'w1', 'SRC': 'op', 'OP': 'w1 + r10'}, addr_inc=1)\n", + "\tAsmInst(inst={'CMD': 'WPORT_WR', 'DST': '0', 'SRC': 'r_wave'}, addr_inc=1)\n", + "\tPulse(ch=0, name='ro_pulse', t=0.0, tag=None, t_params={'t': }, t_regs={'t': 0})\n", + "\tTrigger(ros=[0], tts=[], pins=[0], t=0.2, width=0.023251488095238096, ddr4=True, mr=False, tag=None, t_params={'t': , 'width': }, t_regs={'t': 86, 'width': 10}, outdict=defaultdict(, {}), trigset={0, 9, 10})\n", + "\tDelay(t=1.0, auto=False, tag='post_seq_delay_100', t_params={'t': }, t_regs={'t': 430})\n", + "\tDelay(t=1.0, auto=False, tag=None, t_params={'t': }, t_regs={'t': 430})\n", + "\tWait(t=0.0, auto=False, tag=None, no_warn=False, t_params={'t': }, t_regs={'t': 0})\n", + "\tIncReg(dst='r8', src=1)\n", + "\tWait(t=0, auto=True, gens=False, ros=True, tag=None, no_warn=True, t_params={'t': }, t_regs={'t': 0})\n", + "\tDelay(t=1, auto=True, gens=True, ros=True, tag=None, t_params={'t': }, t_regs={'t': 430})\n", + "\tIncReg(dst='s_core_w1', src=1)\n", + "\tCloseLoop()\n", + "\tEnd()\n", + "\tLabel(label='gen_rnd_seq')\n", + "\tWriteReg(dst='s_rand', src='lfsr_seed')\n", + "\tWriteReg(dst='r10', src=0)\n", + "\tLabel(label='gen_seq_loop')\n", + "\tCondJump(label='gen_seq_end', arg1='seq_length', test='Z', op='-', arg2=0)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'r4', 'SRC': 'op', 'OP': 's1 AND #h0F'}, addr_inc=1)\n", + "\tCondJump(label='gen_seq_loop', arg1='r4', test='NS', op='-', arg2=10)\n", + "\tLabel(label='gen_seq_checkZ')\n", + "\tCondJump(label='gen_seq_checkZov2', arg1='r4', test='NZ', op='-', arg2=1)\n", + "\tIncReg(dst='r10', src='r9')\n", + "\tIncReg(dst='r10', src='r9')\n", + "\tJump(label='gen_seq_pulse')\n", + "\tLabel(label='gen_seq_checkZov2')\n", + "\tCondJump(label='gen_seq_check-Zov2', arg1='r4', test='NZ', op='-', arg2=4)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'r10', 'SRC': 'op', 'OP': 'r10 + r9'}, addr_inc=1)\n", + "\tJump(label='gen_seq_pulse')\n", + "\tLabel(label='gen_seq_check-Zov2')\n", + "\tCondJump(label='gen_seq_pulse', arg1='r4', test='NZ', op='-', arg2=7)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'r10', 'SRC': 'op', 'OP': 'r10 - r9'}, addr_inc=1)\n", + "\tLabel(label='gen_seq_pulse')\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'r_wave', 'SRC': 'wmem', 'ADDR': 'r4'}, addr_inc=1)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'w1', 'SRC': 'op', 'OP': 'w1 + r10'}, addr_inc=1)\n", + "\tAsmInst(inst={'CMD': 'WPORT_WR', 'DST': '0', 'SRC': 'r_wave'}, addr_inc=1)\n", + "\tLabel(label='gen_seq_next_gate')\n", + "\tIncReg(dst='seq_length', src=-1)\n", + "\tJump(label='gen_seq_loop')\n", + "\tLabel(label='gen_seq_end')\n", + "\tAsmInst(inst={'CMD': 'RET'}, addr_inc=1)\n", + "registers:\n", + "\tlfsr_seed: QickRegisterV2(addr=0, init=None)\n", + "\tseq_length: QickRegisterV2(addr=1, init=None)\n", + "\treps: QickRegisterV2(addr=2, init=None)\n", + "pulses:\n", + "\tI: QickPulse(waveforms=[Waveform(name='I_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=3276, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tZ: QickPulse(waveforms=[Waveform(name='Z_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=6553, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tX: QickPulse(waveforms=[Waveform(name='X_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=32766, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tY: QickPulse(waveforms=[Waveform(name='Y_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=-1073741824, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=32766, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tZ/2: QickPulse(waveforms=[Waveform(name='Z/2_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=6553, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tX/2: QickPulse(waveforms=[Waveform(name='X/2_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=16383, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tY/2: QickPulse(waveforms=[Waveform(name='Y/2_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=-1073741824, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=16383, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\t-Z/2: QickPulse(waveforms=[Waveform(name='-Z/2_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=6553, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\t-X/2: QickPulse(waveforms=[Waveform(name='-X/2_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=2147483648, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=16383, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\t-Y/2: QickPulse(waveforms=[Waveform(name='-Y/2_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=1073741824, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=16383, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tro_pulse: QickPulse(waveforms=[Waveform(name='ro_pulse_w0', freq=QickRawParam(par='freq', start=224054700, spans={}, quantize=10, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=6553, spans={}, quantize=1, steps={}), length=QickRawParam(par='length', start=60, spans={}, quantize=1, steps={}), conf=9)])\n", + "\tend_seq_pulse: QickPulse(waveforms=[Waveform(name='end_seq_pulse_w0', freq=QickRawParam(par='freq', start=224054700, spans={}, quantize=10, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=6553, spans={}, quantize=1, steps={}), length=QickRawParam(par='length', start=60, spans={}, quantize=1, steps={}), conf=9)])\n", + "\tmeasure: QickPulse(waveforms=[Waveform(name='measure_w0', freq=QickRawParam(par='freq', start=-873813330, spans={}, quantize=-39, steps={}), phase=0, env=0, gain=0, length=3, conf=264)])\n", + "expanded ASM:\n", + "\t NOP \n", + "\t REG_WR s12 imm #0 \n", + "\t WPORT_WR p4 wmem [&12] @0 \n", + "\t TIME #430 inc_ref \n", + "\t REG_WR r2 imm #0 \n", + "\treps:\n", + "\t REG_WR r8 imm #0 \n", + "\t REG_WR r9 imm #1073741824 \n", + "\t TIME #430 inc_ref \n", + "\t REG_WR s15 imm #10 \n", + "\t WAIT [s15] @0 time \n", + "\t TIME #860 inc_ref \n", + "\t REG_WR r0 imm #123456789 \n", + "\t REG_WR r1 imm #9 \n", + "\t REG_WR s15 label gen_rnd_seq \n", + "\t CALL [s15] \n", + "\t REG_WR r4 imm #2 \n", + "\t REG_WR r_wave wmem [r4] \n", + "\t REG_WR w1 op -op(w1 + r10) \n", + "\t WPORT_WR p0 r_wave \n", + "\t WPORT_WR p0 wmem [&10] @0 \n", + "\t TRIG p0 set @86 \n", + "\t TRIG p9 set @86 \n", + "\t TRIG p10 set @86 \n", + "\t TRIG p0 clr @96 \n", + "\t TRIG p9 clr @96 \n", + "\t TRIG p10 clr @96 \n", + "\t TIME #430 inc_ref \n", + "\t TIME #430 inc_ref \n", + "\t REG_WR s15 imm #31 \n", + "\t WAIT [s15] @0 time \n", + "\t REG_WR r8 op -op(r8 + #1) \n", + "\t TIME #860 inc_ref \n", + "\t REG_WR r0 imm #123456789 \n", + "\t REG_WR r1 imm #9 \n", + "\t REG_WR s15 label gen_rnd_seq \n", + "\t CALL [s15] \n", + "\t REG_WR r4 imm #2 \n", + "\t REG_WR r_wave wmem [r4] \n", + "\t REG_WR w1 op -op(w1 + r10) \n", + "\t WPORT_WR p0 r_wave \n", + "\t WPORT_WR p0 wmem [&10] @0 \n", + "\t TRIG p0 set @86 \n", + "\t TRIG p9 set @86 \n", + "\t TRIG p10 set @86 \n", + "\t TRIG p0 clr @96 \n", + "\t TRIG p9 clr @96 \n", + "\t TRIG p10 clr @96 \n", + "\t TIME #430 inc_ref \n", + "\t TIME #430 inc_ref \n", + "\t REG_WR s15 imm #53 \n", + "\t WAIT [s15] @0 time \n", + "\t REG_WR r8 op -op(r8 + #1) \n", + "\t REG_WR s15 imm #57 \n", + "\t WAIT [s15] @0 time \n", + "\t TIME #430 inc_ref \n", + "\t REG_WR s12 op -op(s12 + #1) \n", + "\t REG_WR s15 label reps \n", + "\t TEST -op(r2 - #0) \n", + "\t JUMP [s15] -if(NZ) -wr(r2 op) -op(r2 + #1) \n", + "\t REG_WR s15 imm #64 \n", + "\t JUMP [s15] \n", + "\tgen_rnd_seq:\n", + "\t REG_WR s1 op -op(r0) \n", + "\t REG_WR r10 imm #0 \n", + "\tgen_seq_loop:\n", + "\t REG_WR s15 label gen_seq_end \n", + "\t TEST -op(r1 - #0) -uf \n", + "\t JUMP [s15] -if(Z) \n", + "\t REG_WR r4 op -op(s1 AND #h0F) \n", + "\t REG_WR s15 label gen_seq_loop \n", + "\t TEST -op(r4 - #10) -uf \n", + "\t JUMP [s15] -if(NS) \n", + "\tgen_seq_checkZ:\n", + "\t REG_WR s15 label gen_seq_checkZov2 \n", + "\t TEST -op(r4 - #1) -uf \n", + "\t JUMP [s15] -if(NZ) \n", + "\t REG_WR r10 op -op(r10 + r9) \n", + "\t REG_WR r10 op -op(r10 + r9) \n", + "\t REG_WR s15 label gen_seq_pulse \n", + "\t JUMP [s15] \n", + "\tgen_seq_checkZov2:\n", + "\t REG_WR s15 label gen_seq_check-Zov2 \n", + "\t TEST -op(r4 - #4) -uf \n", + "\t JUMP [s15] -if(NZ) \n", + "\t REG_WR r10 op -op(r10 + r9) \n", + "\t REG_WR s15 label gen_seq_pulse \n", + "\t JUMP [s15] \n", + "\tgen_seq_check-Zov2:\n", + "\t REG_WR s15 label gen_seq_pulse \n", + "\t TEST -op(r4 - #7) -uf \n", + "\t JUMP [s15] -if(NZ) \n", + "\t REG_WR r10 op -op(r10 - r9) \n", + "\tgen_seq_pulse:\n", + "\t REG_WR r_wave wmem [r4] \n", + "\t REG_WR w1 op -op(w1 + r10) \n", + "\t WPORT_WR p0 r_wave \n", + "\tgen_seq_next_gate:\n", + "\t REG_WR r1 op -op(r1 + #-1) \n", + "\t REG_WR s15 label gen_seq_loop \n", + "\t JUMP [s15] \n", + "\tgen_seq_end:\n", + "\tRET\n", + "\n", + "// PMEM content\n", + "000000000000000000\n", + "8c600000000000000c\n", + "dce001820000000000\n", + "4c080000000000d700\n", + "8c6000000000000022\n", + "8c6000000000000028\n", + "8c6000002000000029\n", + "4c080000000000d700\n", + "8c600000000000050f\n", + "0811000005fffffb00\n", + "2911000005fffffb00\n", + "4c080000000001ae00\n", + "8c60000003ade68aa0\n", + "8c60000000000004a1\n", + "8c600000000000208f\n", + "2c4000000000000000\n", + "8c6000000000000124\n", + "8c4004800000000000\n", + "840000002095000041\n", + "cdc000000000000000\n", + "dce001400000000000\n", + "dda000300000002b00\n", + "dda000348000002b00\n", + "dda000350000002b00\n", + "dda000100000003000\n", + "dda000148000003000\n", + "dda000150000003000\n", + "4c080000000000d700\n", + "4c080000000000d700\n", + "8c6000000000000f8f\n", + "0811000005fffffb00\n", + "2911000005fffffb00\n", + "8800000014000000a8\n", + "4c080000000001ae00\n", + "8c60000003ade68aa0\n", + "8c60000000000004a1\n", + "8c600000000000208f\n", + "2c4000000000000000\n", + "8c6000000000000124\n", + "8c4004800000000000\n", + "840000002095000041\n", + "cdc000000000000000\n", + "dce001400000000000\n", + "dda000300000002b00\n", + "dda000348000002b00\n", + "dda000350000002b00\n", + "dda000100000003000\n", + "dda000148000003000\n", + "dda000150000003000\n", + "4c080000000000d700\n", + "4c080000000000d700\n", + "8c6000000000001a8f\n", + "0811000005fffffb00\n", + "2911000005fffffb00\n", + "8800000014000000a8\n", + "8c6000000000001c8f\n", + "0811000005fffffb00\n", + "2911000005fffffb00\n", + "4c080000000000d700\n", + "88000000060000008c\n", + "8c600000000000028f\n", + "081100001100000000\n", + "2988000011000000a2\n", + "8c600000000000200f\n", + "2c0000000000000000\n", + "840000001000000001\n", + "8c600000000000002a\n", + "8c600000000000308f\n", + "081100001080000000\n", + "2c8000000000000000\n", + "8804000000800007a4\n", + "8c600000000000218f\n", + "081100001200000500\n", + "2e0000000000000000\n", + "8c600000000000288f\n", + "081100001200000080\n", + "2d8000000000000000\n", + "84000000151480002a\n", + "84000000151480002a\n", + "8c6000000000002d8f\n", + "2c0000000000000000\n", + "8c6000000000002b8f\n", + "081100001200000200\n", + "2d8000000000000000\n", + "84000000151480002a\n", + "8c6000000000002d8f\n", + "2c0000000000000000\n", + "8c6000000000002d8f\n", + "081100001200000380\n", + "2d8000000000000000\n", + "84020000151480002a\n", + "8c4004800000000000\n", + "840000002095000041\n", + "cdc000000000000000\n", + "8800000010ffffffa1\n", + "8c600000000000218f\n", + "2c0000000000000000\n", + "2c6000000000000000\n", + "// WMEM content\n", + "// CONF_ LEN_ GAIN_ ENV_ PHASE_ FREQ\n", + "___0008_0000003c_00000ccc_000000_00000000_0d5acdad\n", + "___0008_0000003c_00001999_000000_00000000_0d5acdad\n", + "___0008_0000003c_00007ffe_000000_00000000_0d5acdad\n", + "___0008_0000003c_00007ffe_000000_c0000000_0d5acdad\n", + "___0008_0000003c_00001999_000000_00000000_0d5acdad\n", + "___0008_0000003c_00003fff_000000_00000000_0d5acdad\n", + "___0008_0000003c_00003fff_000000_c0000000_0d5acdad\n", + "___0008_0000003c_00001999_000000_00000000_0d5acdad\n", + "___0008_0000003c_00003fff_000000_80000000_0d5acdad\n", + "___0008_0000003c_00003fff_000000_40000000_0d5acdad\n", + "___0009_0000003c_00001999_000000_00000000_0d5acdac\n", + "___0009_0000003c_00001999_000000_00000000_0d5acdac\n", + "___0108_00000003_00000000_000000_00000000_cbeaaaae\n", + "Dumped SG envelope table memory to file sg_0.mem\n" + ] + } + ], "source": [ "# print the program\n", "print(prog)\n", @@ -696,6 +1202,502 @@ "prog.print_wmem2hex()\n", "prog.print_sg_mem(sg_idx=0, gen_file=True)" ] + }, + { + "cell_type": "code", + "execution_count": 28, + "id": "da2b8ba0", + "metadata": {}, + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "- Experiment Start Time: 255602 ns\n", + " - Depth array 1 - time elapsed: 3002402 ns\n", + " - Sequence run time: (0): 2023 ms (1): 2021 ms (2): 2021 ms (3): 2021 ms (4): 2021 ms (5): 2021 ms (6): 2025 ms (7): 2021 ms (8): 2021 ms (9): 2021 ms (10): 2021 ms (11): 2021 ms (12): 2025 ms (13): 2021 ms (14): 2021 ms (15): 2021 ms (16): 2021 ms (17): 2021 ms (18): 2025 ms (19): 2021 ms (20): 2021 ms (21): 2021 ms (22): 2021 ms (23): 2021 ms (24): 2025 ms (25): 2021 ms (26): 2021 ms (27): 2021 ms (28): 2021 ms (29): 2021 ms (30): 2025 ms (31): 2021 ms (32): 2021 ms (33): 2021 ms (34): 2021 ms (35): 2021 ms (36): 2025 ms (37): 2021 ms (38): 2021 ms (39): 2021 ms \n", + " - Sequence Total time: 82558 ms (Run time: 80882 ms - Overhead time: 1675 ms)\n", + " - Depth array 16 - time elapsed: 82561095103 ns\n", + " - Sequence run time: (0): 2038 ms (1): 2038 ms (2): 2043 ms (3): 2039 ms (4): 2039 ms (5): 2039 ms (6): 2038 ms (7): 2038 ms (8): 2043 ms (9): 2038 ms (10): 2039 ms (11): 2039 ms (12): 2038 ms (13): 2038 ms (14): 2043 ms (15): 2039 ms (16): 2039 ms (17): 2039 ms (18): 2038 ms (19): 2039 ms (20): 2043 ms (21): 2039 ms (22): 2039 ms (23): 2039 ms (24): 2039 ms (25): 2038 ms (26): 2044 ms (27): 2039 ms (28): 2039 ms (29): 2039 ms (30): 2039 ms (31): 2038 ms (32): 2043 ms (33): 2039 ms (34): 2039 ms (35): 2039 ms (36): 2039 ms (37): 2039 ms (38): 2043 ms (39): 2039 ms \n", + " - Sequence Total time: 83293 ms (Run time: 81595 ms - Overhead time: 1697 ms)\n", + " - Depth array 64 - time elapsed: 165854679625 ns\n", + " - Sequence run time: (0): 2096 ms (1): 2096 ms (2): 2096 ms (3): 2096 ms (4): 2101 ms (5): 2096 ms (6): 2096 ms (7): 2096 ms (8): 2096 ms (9): 2096 ms (10): 2101 ms (11): 2096 ms (12): 2096 ms (13): 2096 ms (14): 2096 ms (15): 2096 ms (16): 2101 ms (17): 2096 ms (18): 2096 ms (19): 2096 ms (20): 2096 ms (21): 2096 ms (22): 2101 ms (23): 2096 ms (24): 2096 ms (25): 2096 ms (26): 2096 ms (27): 2096 ms (28): 2101 ms (29): 2096 ms (30): 2096 ms (31): 2096 ms (32): 2096 ms (33): 2096 ms (34): 2101 ms (35): 2096 ms (36): 2096 ms (37): 2096 ms (38): 2096 ms (39): 2096 ms \n", + " - Sequence Total time: 85653 ms (Run time: 83895 ms - Overhead time: 1757 ms)\n", + " - Depth array 128 - time elapsed: 251508066395 ns\n", + " - Sequence run time: (0): 2178 ms (1): 2174 ms (2): 2173 ms (3): 2173 ms (4): 2173 ms (5): 2173 ms (6): 2178 ms (7): 2174 ms (8): 2173 ms (9): 2173 ms (10): 2173 ms (11): 2173 ms (12): 2178 ms (13): 2173 ms (14): 2173 ms (15): 2173 ms (16): 2173 ms (17): 2173 ms (18): 2178 ms (19): 2173 ms (20): 2173 ms (21): 2173 ms (22): 2173 ms (23): 2173 ms (24): 2178 ms (25): 2173 ms (26): 2173 ms (27): 2173 ms (28): 2173 ms (29): 2173 ms (30): 2178 ms (31): 2173 ms (32): 2173 ms (33): 2173 ms (34): 2173 ms (35): 2173 ms (36): 2178 ms (37): 2173 ms (38): 2173 ms (39): 2173 ms \n", + " - Sequence Total time: 88828 ms (Run time: 86976 ms - Overhead time: 1851 ms)\n", + " - Depth array 512 - time elapsed: 340336535973 ns\n", + " - Sequence run time: (0): 2634 ms (1): 2634 ms (2): 2639 ms (3): 2635 ms (4): 2634 ms (5): 2634 ms (6): 2634 ms (7): 2634 ms (8): 2634 ms (9): 2634 ms (10): 2634 ms (11): 2634 ms (12): 2634 ms (13): 2634 ms (14): 2634 ms (15): 2634 ms (16): 2634 ms (17): 2634 ms (18): 2634 ms (19): 2634 ms (20): 2634 ms (21): 2634 ms (22): 2634 ms (23): 2635 ms (24): 2634 ms (25): 2634 ms (26): 2634 ms (27): 2634 ms (28): 2634 ms (29): 2634 ms (30): 2634 ms (31): 2634 ms (32): 2634 ms (33): 2634 ms (34): 2634 ms (35): 2634 ms (36): 2634 ms (37): 2634 ms (38): 2634 ms (39): 2634 ms \n", + " - Sequence Total time: 109044 ms (Run time: 105378 ms - Overhead time: 3666 ms)\n", + " - Depth array 768 - time elapsed: 449381404075 ns\n", + " - Sequence run time: (0): 2941 ms (1): 2941 ms (2): 2941 ms (3): 2941 ms (4): 2941 ms (5): 2941 ms (6): 2941 ms (7): 2941 ms (8): 2941 ms (9): 2941 ms (10): 2941 ms (11): 2941 ms (12): 2941 ms (13): 2941 ms (14): 2941 ms (15): 2941 ms (16): 2941 ms (17): 2941 ms (18): 2941 ms (19): 2941 ms (20): 2941 ms (21): 2941 ms (22): 2941 ms (23): 2941 ms (24): 2942 ms (25): 2941 ms (26): 2941 ms (27): 2941 ms (28): 2941 ms (29): 2941 ms (30): 2941 ms (31): 2941 ms (32): 2941 ms (33): 2941 ms (34): 2941 ms (35): 2941 ms (36): 2941 ms (37): 2941 ms (38): 2941 ms (39): 2941 ms \n", + " - Sequence Total time: 120182 ms (Run time: 117659 ms - Overhead time: 2523 ms)\n", + " - Depth array 1024 - time elapsed: 569564289222 ns\n", + " - Sequence run time: (0): 3249 ms (1): 3248 ms (2): 3248 ms (3): 3248 ms (4): 3248 ms (5): 3248 ms (6): 3248 ms (7): 3249 ms (8): 3248 ms (9): 3248 ms (10): 3249 ms (11): 3248 ms (12): 3248 ms (13): 3248 ms (14): 3248 ms (15): 3248 ms (16): 3248 ms (17): 3248 ms (18): 3248 ms (19): 3249 ms (20): 3248 ms (21): 3248 ms (22): 3248 ms (23): 3248 ms (24): 3248 ms (25): 3248 ms (26): 3249 ms (27): 3248 ms (28): 3248 ms (29): 3248 ms (30): 3248 ms (31): 3248 ms (32): 3248 ms (33): 3248 ms (34): 3248 ms (35): 3248 ms (36): 3248 ms (37): 3248 ms (38): 3248 ms (39): 3248 ms \n", + " - Sequence Total time: 132758 ms (Run time: 129954 ms - Overhead time: 2804 ms)\n", + "- End Time: 1761689940698562728 - elapsed: 702323504258\n" + ] + } + ], + "source": [ + "# from datetime import datetime\n", + "import time\n", + "import pandas as pd\n", + "\n", + "I2 = []\n", + "I2_err = []\n", + "\n", + "rb_config['L'] = [1]\n", + "rb_config['N_L'] = len(rb_config['L'])\n", + "rb_config['N_G'] = 1 # a.k.a: rounds\n", + "rb_config['N_E'] = 1 # a.k.a: reps\n", + "\n", + "\n", + "# Original Settings\n", + "depth_array = [1, 2, 3, 4, 5, 6, 8, 10, 12, 16, 20, 24, 32, 40, 48, 64, 80, 96, 128, 192, \n", + " 256, 320, 384, 448, 512, 576, 640, 704, 768, 832, 896, 960, 1024, 1088, 1152, 1216, 1280, 1344, 1408,\n", + " 1472, 1536, 1600, 1664, 1728, 1750]\n", + "reps = 4000\n", + "variety = 40\n", + "\n", + "\n", + "rb_config['relax_delay'] = 500 # us\n", + "rb_config['pulse_len_us'] = 0.1\n", + "\n", + "# # Test settings 1\n", + "# depth_array = [1, 16, 128, 1024]\n", + "# rb_config['reps'] = 4000\n", + "# variety = 2\n", + "\n", + "\n", + "# Test settings 2a - NO LFSR\n", + "rb_config['verbose'] = False\n", + "rb_config['use_lfsr'] = False\n", + "depth_array = [1, 16, 64, 128, 512, 768, 1024]\n", + "reps = 4000\n", + "variety = 40\n", + "\n", + "# # Test settings 2b - NO LFSR\n", + "# rb_config['verbose'] = False\n", + "# rb_config['use_lfsr'] = False\n", + "# depth_array = [1, 1024]\n", + "# reps = 4000\n", + "# variety = 5\n", + "\n", + "# Test settings 3a - LFSR\n", + "rb_config['verbose'] = False\n", + "rb_config['use_lfsr'] = True\n", + "depth_array = [1, 16, 64, 128, 512, 768, 1024]\n", + "reps = 4000\n", + "variety = 40\n", + "\n", + "# # Test settings 3b - LFSR\n", + "# rb_config['verbose'] = False\n", + "# rb_config['use_lfsr'] = True\n", + "# depth_array = [1, 1024]\n", + "# reps = 4000\n", + "# variety = 5\n", + "\n", + "# # Test settings 4 - LFSR\n", + "# rb_config['verbose'] = False\n", + "# rb_config['use_lfsr'] = True\n", + "# depth_array = [1, 5000]\n", + "# reps = 4000\n", + "# variety = 5\n", + "\n", + "# # Test settings 4 - LFSR\n", + "# rb_config['verbose'] = False\n", + "# rb_config['use_lfsr'] = True\n", + "# depth_array = [10]\n", + "# reps = 4000\n", + "# variety = 5\n", + "\n", + "# Code\n", + "t_start_ns = time.time_ns()\n", + "print('- Experiment Start Time: %0d ns' % (time.time_ns()-t_start_ns))\n", + "\n", + "th = -30\n", + "\n", + "t=time.time_ns()\n", + "\n", + "# Loop for different lengths\n", + "for d in depth_array:\n", + " dbg_i=0\n", + " t_sequence_start_ns = time.time_ns()\n", + " print(' - Depth array %0d - time elapsed: %0d ns' % (d,t_sequence_start_ns-t_start_ns) )\n", + " i2_temp = []\n", + " t_runtime_total_ns = 0\n", + " # Loop for different random sequences\n", + " print(' - Sequence run time: ', end=\" \")\n", + " for jj in range(variety):\n", + " # print('// DBG start: %0d - %0d ns' % (dbg_i, time.time_ns()-t)); t=time.time_ns(); dbg_i+=1\n", + "\n", + " rb_config['test_seq'] = prog.generate_rbsequence(depth=d, gates_set=rb_config['gates_set'])\n", + " # print('// DBG gen_seq: %0d - %0d ns' % (dbg_i, time.time_ns()-t)); t=time.time_ns(); dbg_i+=1\n", + "\n", + " rb_prog = RBSequenceProgram(soccfg, reps=reps, final_delay=rb_config['relax_delay'], cfg=rb_config)\n", + " # print('// DBG RBSeqProgram: %0d - %0d ns' % (dbg_i, time.time_ns()-t)); t=time.time_ns(); dbg_i+=1\n", + "\n", + " t_runtime_start_ns = time.time_ns()\n", + " # avgi0, avgq0, avgi1, avgq1 = rb_prog.acquire(soc, load_pulses=True, progress=False, debug=False, single_shot=True)\n", + " # adc1, adc2 = rb_prog.acquire(soc, progress=False)\n", + " adc1 = rb_prog.acquire(soc, progress=False)\n", + " t_runtime_end_ns = time.time_ns()\n", + " t_runtime_total_ns += (t_runtime_end_ns-t_runtime_start_ns)\n", + " print(' (%0d): %0d ms' % (jj, (t_runtime_end_ns-t_runtime_start_ns)/1e6), end=\" \")\n", + "\n", + " # print('// DBG acquire: %0d - %0d ns' % (dbg_i, time.time_ns()-t)); t=time.time_ns(); dbg_i+=1\n", + " \n", + " avgi0 = np.array([adc1[0][0][0]])\n", + " avgq0 = np.array([adc1[0][0][1]])\n", + " # avgi1 = adc2[0]\n", + " # avgq1 = adc2[1]\n", + " df = pd.DataFrame(avgi0, columns=['data'])\n", + " g = df['data'].apply(lambda x: 0 if x < th else 1).mean()\n", + " i2_temp.append(g) \n", + " # print('// DBG append: %0d - %0d ns' % (dbg_i, time.time_ns()-t)); t=time.time_ns(); dbg_i+=1\n", + "\n", + " print('')\n", + " I2.append(np.mean(i2_temp))\n", + " I2_err.append(np.std(i2_temp)/np.sqrt(variety))\n", + " t_sequence_end_ns = time.time_ns()\n", + " print(' - Sequence Total time: %0d ms (Run time: %0d ms - Overhead time: %0d ms)' % ((t_sequence_end_ns - t_sequence_start_ns)/1e6, t_runtime_total_ns/1e6, (t_sequence_end_ns - t_sequence_start_ns)/1e6 - t_runtime_total_ns/1e6))\n", + "\n", + "t_end_ns = int(time.time_ns())\n", + "print('- End Time: %0d - elapsed: %0d' % (t_end_ns, (t_end_ns-t_start_ns)))\n" + ] + }, + { + "cell_type": "code", + "execution_count": 26, + "id": "43667010", + "metadata": {}, + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "macros:\n", + "\tWriteReg(dst='s_core_w1', src=0)\n", + "\tConfigReadout(ch=0, name='measure', t=0.0, tag=None, t_params={'t': }, t_regs={'t': 0})\n", + "\tDelay(t=1.0, auto=True, gens=True, ros=True, tag=None, t_params={'t': }, t_regs={'t': 430})\n", + "\tOpenLoop(n=4000, name='reps')\n", + "\tWriteReg(dst='r8', src=0)\n", + "\tWriteReg(dst='r9', src=1073741824)\n", + "\tDelay(t=1.0, auto=False, tag=None, t_params={'t': }, t_regs={'t': 430})\n", + "\tWait(t=0.0, auto=False, tag=None, no_warn=False, t_params={'t': }, t_regs={'t': 0})\n", + "\tDelay(t=204.8, auto=False, tag='pre_seq_delay_000', t_params={'t': }, t_regs={'t': 88080})\n", + "\tWriteReg(dst='lfsr_seed', src=123456789)\n", + "\tWriteReg(dst='seq_length', src=1023)\n", + "\tCall(label='gen_rnd_seq')\n", + "\tWriteReg(dst='r4', src=8)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'r_wave', 'SRC': 'wmem', 'ADDR': 'r4'}, addr_inc=1)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'w1', 'SRC': 'op', 'OP': 'w1 + r10'}, addr_inc=1)\n", + "\tAsmInst(inst={'CMD': 'WPORT_WR', 'DST': '0', 'SRC': 'r_wave'}, addr_inc=1)\n", + "\tPulse(ch=0, name='ro_pulse', t=0.0, tag=None, t_params={'t': }, t_regs={'t': 0})\n", + "\tTrigger(ros=[0], tts=[], pins=[0], t=0.2, width=0.023251488095238096, ddr4=True, mr=False, tag=None, t_params={'t': , 'width': }, t_regs={'t': 86, 'width': 10}, outdict=defaultdict(, {}), trigset={0, 9, 10})\n", + "\tDelay(t=102.4, auto=False, tag='post_seq_delay_000', t_params={'t': }, t_regs={'t': 44040})\n", + "\tDelay(t=1.0, auto=False, tag=None, t_params={'t': }, t_regs={'t': 430})\n", + "\tWait(t=0.0, auto=False, tag=None, no_warn=False, t_params={'t': }, t_regs={'t': 0})\n", + "\tIncReg(dst='r8', src=1)\n", + "\tWait(t=0, auto=True, gens=False, ros=True, tag=None, no_warn=True, t_params={'t': }, t_regs={'t': 0})\n", + "\tDelay(t=500, auto=True, gens=True, ros=True, tag=None, t_params={'t': }, t_regs={'t': 215040})\n", + "\tIncReg(dst='s_core_w1', src=1)\n", + "\tCloseLoop()\n", + "\tEnd()\n", + "\tLabel(label='gen_rnd_seq')\n", + "\tWriteReg(dst='s_rand', src='lfsr_seed')\n", + "\tWriteReg(dst='r10', src=0)\n", + "\tLabel(label='gen_seq_loop')\n", + "\tCondJump(label='gen_seq_end', arg1='seq_length', test='Z', op='-', arg2=0)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'r4', 'SRC': 'op', 'OP': 's1 AND #h0F'}, addr_inc=1)\n", + "\tCondJump(label='gen_seq_loop', arg1='r4', test='NS', op='-', arg2=10)\n", + "\tLabel(label='gen_seq_checkZ')\n", + "\tCondJump(label='gen_seq_checkZov2', arg1='r4', test='NZ', op='-', arg2=1)\n", + "\tIncReg(dst='r10', src='r9')\n", + "\tIncReg(dst='r10', src='r9')\n", + "\tJump(label='gen_seq_pulse')\n", + "\tLabel(label='gen_seq_checkZov2')\n", + "\tCondJump(label='gen_seq_check-Zov2', arg1='r4', test='NZ', op='-', arg2=4)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'r10', 'SRC': 'op', 'OP': 'r10 + r9'}, addr_inc=1)\n", + "\tJump(label='gen_seq_pulse')\n", + "\tLabel(label='gen_seq_check-Zov2')\n", + "\tCondJump(label='gen_seq_pulse', arg1='r4', test='NZ', op='-', arg2=7)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'r10', 'SRC': 'op', 'OP': 'r10 - r9'}, addr_inc=1)\n", + "\tLabel(label='gen_seq_pulse')\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'r_wave', 'SRC': 'wmem', 'ADDR': 'r4'}, addr_inc=1)\n", + "\tAsmInst(inst={'CMD': 'REG_WR', 'DST': 'w1', 'SRC': 'op', 'OP': 'w1 + r10'}, addr_inc=1)\n", + "\tAsmInst(inst={'CMD': 'WPORT_WR', 'DST': '0', 'SRC': 'r_wave'}, addr_inc=1)\n", + "\tLabel(label='gen_seq_next_gate')\n", + "\tIncReg(dst='seq_length', src=-1)\n", + "\tJump(label='gen_seq_loop')\n", + "\tLabel(label='gen_seq_end')\n", + "\tAsmInst(inst={'CMD': 'RET'}, addr_inc=1)\n", + "registers:\n", + "\tlfsr_seed: QickRegisterV2(addr=0, init=None)\n", + "\tseq_length: QickRegisterV2(addr=1, init=None)\n", + "\treps: QickRegisterV2(addr=2, init=None)\n", + "pulses:\n", + "\tI: QickPulse(waveforms=[Waveform(name='I_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=3276, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tZ: QickPulse(waveforms=[Waveform(name='Z_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=6553, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tX: QickPulse(waveforms=[Waveform(name='X_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=32766, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tY: QickPulse(waveforms=[Waveform(name='Y_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=-1073741824, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=32766, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tZ/2: QickPulse(waveforms=[Waveform(name='Z/2_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=6553, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tX/2: QickPulse(waveforms=[Waveform(name='X/2_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=16383, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tY/2: QickPulse(waveforms=[Waveform(name='Y/2_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=-1073741824, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=16383, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\t-Z/2: QickPulse(waveforms=[Waveform(name='-Z/2_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=6553, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\t-X/2: QickPulse(waveforms=[Waveform(name='-X/2_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=2147483648, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=16383, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\t-Y/2: QickPulse(waveforms=[Waveform(name='-Y/2_w0', freq=QickRawParam(par='freq', start=224054701, spans={}, quantize=1, steps={}), phase=QickRawParam(par='phase', start=1073741824, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=16383, spans={}, quantize=1, steps={}), length=60, conf=8)])\n", + "\tro_pulse: QickPulse(waveforms=[Waveform(name='ro_pulse_w0', freq=QickRawParam(par='freq', start=224054700, spans={}, quantize=10, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=6553, spans={}, quantize=1, steps={}), length=QickRawParam(par='length', start=60, spans={}, quantize=1, steps={}), conf=9)])\n", + "\tend_seq_pulse: QickPulse(waveforms=[Waveform(name='end_seq_pulse_w0', freq=QickRawParam(par='freq', start=224054700, spans={}, quantize=10, steps={}), phase=QickRawParam(par='phase', start=0, spans={}, quantize=1, steps={}), env=0, gain=QickRawParam(par='gain', start=6553, spans={}, quantize=1, steps={}), length=QickRawParam(par='length', start=60, spans={}, quantize=1, steps={}), conf=9)])\n", + "\tmeasure: QickPulse(waveforms=[Waveform(name='measure_w0', freq=QickRawParam(par='freq', start=-873813330, spans={}, quantize=-39, steps={}), phase=0, env=0, gain=0, length=3, conf=264)])\n", + "expanded ASM:\n", + "\t NOP \n", + "\t REG_WR s12 imm #0 \n", + "\t WPORT_WR p4 wmem [&12] @0 \n", + "\t TIME #430 inc_ref \n", + "\t REG_WR r2 imm #0 \n", + "\treps:\n", + "\t REG_WR r8 imm #0 \n", + "\t REG_WR r9 imm #1073741824 \n", + "\t TIME #430 inc_ref \n", + "\t REG_WR s15 imm #10 \n", + "\t WAIT [s15] @0 time \n", + "\t TIME #88080 inc_ref \n", + "\t REG_WR r0 imm #123456789 \n", + "\t REG_WR r1 imm #1023 \n", + "\t REG_WR s15 label gen_rnd_seq \n", + "\t CALL [s15] \n", + "\t REG_WR r4 imm #8 \n", + "\t REG_WR r_wave wmem [r4] \n", + "\t REG_WR w1 op -op(w1 + r10) \n", + "\t WPORT_WR p0 r_wave \n", + "\t WPORT_WR p0 wmem [&10] @0 \n", + "\t TRIG p0 set @86 \n", + "\t TRIG p9 set @86 \n", + "\t TRIG p10 set @86 \n", + "\t TRIG p0 clr @96 \n", + "\t TRIG p9 clr @96 \n", + "\t TRIG p10 clr @96 \n", + "\t TIME #44040 inc_ref \n", + "\t TIME #430 inc_ref \n", + "\t REG_WR s15 imm #31 \n", + "\t WAIT [s15] @0 time \n", + "\t REG_WR r8 op -op(r8 + #1) \n", + "\t REG_WR s15 imm #35 \n", + "\t WAIT [s15] @0 time \n", + "\t TIME #215040 inc_ref \n", + "\t REG_WR s12 op -op(s12 + #1) \n", + "\t REG_WR s15 label reps \n", + "\t TEST -op(r2 - #3999) \n", + "\t JUMP [s15] -if(NZ) -wr(r2 op) -op(r2 + #1) \n", + "\t REG_WR s15 imm #42 \n", + "\t JUMP [s15] \n", + "\tgen_rnd_seq:\n", + "\t REG_WR s1 op -op(r0) \n", + "\t REG_WR r10 imm #0 \n", + "\tgen_seq_loop:\n", + "\t REG_WR s15 label gen_seq_end \n", + "\t TEST -op(r1 - #0) -uf \n", + "\t JUMP [s15] -if(Z) \n", + "\t REG_WR r4 op -op(s1 AND #h0F) \n", + "\t REG_WR s15 label gen_seq_loop \n", + "\t TEST -op(r4 - #10) -uf \n", + "\t JUMP [s15] -if(NS) \n", + "\tgen_seq_checkZ:\n", + "\t REG_WR s15 label gen_seq_checkZov2 \n", + "\t TEST -op(r4 - #1) -uf \n", + "\t JUMP [s15] -if(NZ) \n", + "\t REG_WR r10 op -op(r10 + r9) \n", + "\t REG_WR r10 op -op(r10 + r9) \n", + "\t REG_WR s15 label gen_seq_pulse \n", + "\t JUMP [s15] \n", + "\tgen_seq_checkZov2:\n", + "\t REG_WR s15 label gen_seq_check-Zov2 \n", + "\t TEST -op(r4 - #4) -uf \n", + "\t JUMP [s15] -if(NZ) \n", + "\t REG_WR r10 op -op(r10 + r9) \n", + "\t REG_WR s15 label gen_seq_pulse \n", + "\t JUMP [s15] \n", + "\tgen_seq_check-Zov2:\n", + "\t REG_WR s15 label gen_seq_pulse \n", + "\t TEST -op(r4 - #7) -uf \n", + "\t JUMP [s15] -if(NZ) \n", + "\t REG_WR r10 op -op(r10 - r9) \n", + "\tgen_seq_pulse:\n", + "\t REG_WR r_wave wmem [r4] \n", + "\t REG_WR w1 op -op(w1 + r10) \n", + "\t WPORT_WR p0 r_wave \n", + "\tgen_seq_next_gate:\n", + "\t REG_WR r1 op -op(r1 + #-1) \n", + "\t REG_WR s15 label gen_seq_loop \n", + "\t JUMP [s15] \n", + "\tgen_seq_end:\n", + "\tRET\n", + "\n", + "// PMEM content\n", + "000000000000000000\n", + "8c600000000000000c\n", + "dce001820000000000\n", + "4c080000000000d700\n", + "8c6000000000000022\n", + "8c6000000000000028\n", + "8c6000002000000029\n", + "4c080000000000d700\n", + "8c600000000000050f\n", + "0811000005fffffb00\n", + "2911000005fffffb00\n", + "4c0800000000ac0800\n", + "8c60000003ade68aa0\n", + "8c600000000001ffa1\n", + "8c600000000000158f\n", + "2c4000000000000000\n", + "8c6000000000000424\n", + "8c4004800000000000\n", + "840000002095000041\n", + "cdc000000000000000\n", + "dce001400000000000\n", + "dda000300000002b00\n", + "dda000348000002b00\n", + "dda000350000002b00\n", + "dda000100000003000\n", + "dda000148000003000\n", + "dda000150000003000\n", + "4c0800000000560400\n", + "4c080000000000d700\n", + "8c6000000000000f8f\n", + "0811000005fffffb00\n", + "2911000005fffffb00\n", + "8800000014000000a8\n", + "8c600000000000118f\n", + "0811000005fffffb00\n", + "2911000005fffffb00\n", + "4c0800000001a40000\n", + "88000000060000008c\n", + "8c600000000000028f\n", + "08110000110007cf80\n", + "2988000011000000a2\n", + "8c600000000000150f\n", + "2c0000000000000000\n", + "840000001000000001\n", + "8c600000000000002a\n", + "8c600000000000258f\n", + "081100001080000000\n", + "2c8000000000000000\n", + "8804000000800007a4\n", + "8c600000000000168f\n", + "081100001200000500\n", + "2e0000000000000000\n", + "8c6000000000001d8f\n", + "081100001200000080\n", + "2d8000000000000000\n", + "84000000151480002a\n", + "84000000151480002a\n", + "8c600000000000228f\n", + "2c0000000000000000\n", + "8c600000000000208f\n", + "081100001200000200\n", + "2d8000000000000000\n", + "84000000151480002a\n", + "8c600000000000228f\n", + "2c0000000000000000\n", + "8c600000000000228f\n", + "081100001200000380\n", + "2d8000000000000000\n", + "84020000151480002a\n", + "8c4004800000000000\n", + "840000002095000041\n", + "cdc000000000000000\n", + "8800000010ffffffa1\n", + "8c600000000000168f\n", + "2c0000000000000000\n", + "2c6000000000000000\n", + "// WMEM content\n", + "// CONF_ LEN_ GAIN_ ENV_ PHASE_ FREQ\n", + "___0008_0000003c_00000ccc_000000_00000000_0d5acdad\n", + "___0008_0000003c_00001999_000000_00000000_0d5acdad\n", + "___0008_0000003c_00007ffe_000000_00000000_0d5acdad\n", + "___0008_0000003c_00007ffe_000000_c0000000_0d5acdad\n", + "___0008_0000003c_00001999_000000_00000000_0d5acdad\n", + "___0008_0000003c_00003fff_000000_00000000_0d5acdad\n", + "___0008_0000003c_00003fff_000000_c0000000_0d5acdad\n", + "___0008_0000003c_00001999_000000_00000000_0d5acdad\n", + "___0008_0000003c_00003fff_000000_80000000_0d5acdad\n", + "___0008_0000003c_00003fff_000000_40000000_0d5acdad\n", + "___0009_0000003c_00001999_000000_00000000_0d5acdac\n", + "___0009_0000003c_00001999_000000_00000000_0d5acdac\n", + "___0108_00000003_00000000_000000_00000000_cbeaaaae\n", + "Dumped SG envelope table memory to file sg_0.mem\n" + ] + } + ], + "source": [ + "# print the program\n", + "print(rb_prog)\n", + "\n", + "# generate rtl simulation inputs\n", + "rb_prog.print_pmem2hex()\n", + "rb_prog.print_wmem2hex()\n", + "rb_prog.print_sg_mem(sg_idx=0, gen_file=True)\n" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "id": "8838aa9d", + "metadata": {}, + "outputs": [], + "source": [ + "from qick.tprocv2_assembler import Assembler\n", + "\n", + "prog_list = []\n", + "dict_label = { 'r_addr':'s15' }\n", + "\n", + "prog_list.append({'CMD':'REG_WR','DST':'r1','SRC':'op','OP':'MSH s7'})\n", + "prog_list.append({'CMD':'WPORT_WR','DST':'4','SRC':'wmem','ADDR':'r0'})\n", + "prog_list.append({'CMD':'DPORT_WR','DST':'0','SRC':'reg','DATA':'r0'})\n", + "\n", + "dict_label['END'] = '&'+str(len(prog_list)+1)\n", + "prog_list.append({'CMD':'JUMP','LABEL':'END'})\n", + "\n", + "p_bin = Assembler.list2bin(prog_list, dict_label)\n", + "p_asm = Assembler.list2asm(prog_list, dict_label)\n", + "\n", + "print(\"// Assembly Code\")\n", + "print(p_asm)\n", + "\n", + "print(\"// Assembly Binary\")\n", + "for l in p_bin[0]:\n", + " print(l)\n", + "\n" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "id": "6cb27449", + "metadata": {}, + "outputs": [], + "source": [ + "asm = \"\"\"\n", + "// TEST program\n", + "// Write CORE_W_DT SREG\n", + "REG_WR s12 imm #12\n", + "DPORT_WR p0 imm 1\n", + "LABEL_ADDR:\n", + "REG_WR s_addr label LABEL_ADDR // write to s15 the address of label \"LABEL_ADDR\"\n", + ".END // replaced by JUMP HERE\n", + "\"\"\"\n", + "\n", + "p_txt, p_bin = Assembler.str_asm2bin(asm)\n", + "\n", + "print(\"// Assembly Binary\")\n", + "for l in p_txt:\n", + " print(l)\n", + "\n", + "# for l in p_bin:\n", + "# print(l)\n" + ] } ], "metadata": { From cbde8bc4d72c3c890a89d952e49ae3e348ff7831 Mon Sep 17 00:00:00 2001 From: Diego Martin Date: Wed, 29 Oct 2025 14:40:24 -0500 Subject: [PATCH 03/13] [openquantumhardware/qick_internal#22] Renamed test03_random_benchmarking to RB_tProc_v2_experiment --- .../RB_tProc_v2_experiment.ipynb} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename firmware/testbench/testbench_notebooks/{test03_random_benchmarking.ipynb => qick_rb/RB_tProc_v2_experiment.ipynb} (100%) diff --git a/firmware/testbench/testbench_notebooks/test03_random_benchmarking.ipynb b/firmware/testbench/testbench_notebooks/qick_rb/RB_tProc_v2_experiment.ipynb similarity index 100% rename from firmware/testbench/testbench_notebooks/test03_random_benchmarking.ipynb rename to firmware/testbench/testbench_notebooks/qick_rb/RB_tProc_v2_experiment.ipynb From 062db187ffbcd7111dab50d1179d1f6fdcceafc7 Mon Sep 17 00:00:00 2001 From: Diego Martin Date: Thu, 20 Nov 2025 13:01:43 -0600 Subject: [PATCH 04/13] [openquantumhardware/qick_internal#43] Moved testbench_notebooks to firmware/notebooks --- .../qick_rb/RB_tProc_v1_experiment.ipynb | 0 .../qick_rb/RB_tProc_v2_experiment.ipynb | 0 .../qick_testbench}/test01_basic_multipulse.ipynb | 0 .../qick_testbench}/tests_generator.ipynb | 0 4 files changed, 0 insertions(+), 0 deletions(-) rename firmware/{testbench/testbench_notebooks => notebooks}/qick_rb/RB_tProc_v1_experiment.ipynb (100%) rename firmware/{testbench/testbench_notebooks => notebooks}/qick_rb/RB_tProc_v2_experiment.ipynb (100%) rename firmware/{testbench/testbench_notebooks => notebooks/qick_testbench}/test01_basic_multipulse.ipynb (100%) rename firmware/{testbench/testbench_notebooks => notebooks/qick_testbench}/tests_generator.ipynb (100%) diff --git a/firmware/testbench/testbench_notebooks/qick_rb/RB_tProc_v1_experiment.ipynb b/firmware/notebooks/qick_rb/RB_tProc_v1_experiment.ipynb similarity index 100% rename from firmware/testbench/testbench_notebooks/qick_rb/RB_tProc_v1_experiment.ipynb rename to firmware/notebooks/qick_rb/RB_tProc_v1_experiment.ipynb diff --git a/firmware/testbench/testbench_notebooks/qick_rb/RB_tProc_v2_experiment.ipynb b/firmware/notebooks/qick_rb/RB_tProc_v2_experiment.ipynb similarity index 100% rename from firmware/testbench/testbench_notebooks/qick_rb/RB_tProc_v2_experiment.ipynb rename to firmware/notebooks/qick_rb/RB_tProc_v2_experiment.ipynb diff --git a/firmware/testbench/testbench_notebooks/test01_basic_multipulse.ipynb b/firmware/notebooks/qick_testbench/test01_basic_multipulse.ipynb similarity index 100% rename from firmware/testbench/testbench_notebooks/test01_basic_multipulse.ipynb rename to firmware/notebooks/qick_testbench/test01_basic_multipulse.ipynb diff --git a/firmware/testbench/testbench_notebooks/tests_generator.ipynb b/firmware/notebooks/qick_testbench/tests_generator.ipynb similarity index 100% rename from firmware/testbench/testbench_notebooks/tests_generator.ipynb rename to firmware/notebooks/qick_testbench/tests_generator.ipynb From c153651d4fdcc5c0f9b3d301cc2efb7f4108607f Mon Sep 17 00:00:00 2001 From: Diego Martin Date: Thu, 8 Jan 2026 03:17:04 -0600 Subject: [PATCH 05/13] [openquantumhardware/qick_internal#43] moved stimuli and tasks code from tb_qick into separate files --- .../qick_testbench/src/tb/tb_qick.sv | 590 +----------------- .../qick_testbench/src/tb/tb_qick_stimuli.svh | 344 ++++++++++ .../qick_testbench/src/tb/tb_qick_tasks.svh | 247 ++++++++ 3 files changed, 593 insertions(+), 588 deletions(-) create mode 100644 firmware/testbench/qick_testbench/src/tb/tb_qick_stimuli.svh create mode 100644 firmware/testbench/qick_testbench/src/tb/tb_qick_tasks.svh diff --git a/firmware/testbench/qick_testbench/src/tb/tb_qick.sv b/firmware/testbench/qick_testbench/src/tb/tb_qick.sv index f9bb85d1..96aaf526 100644 --- a/firmware/testbench/qick_testbench/src/tb/tb_qick.sv +++ b/firmware/testbench/qick_testbench/src/tb/tb_qick.sv @@ -1357,597 +1357,11 @@ reg qcom_rdy_i, qp2_rdy_i; end end -//-------------------------------------- -// TEST STIMULI -//-------------------------------------- -logic tb_test_run_start; -logic tb_test_run_done; -logic tb_test_read_start; -logic tb_test_read_done; +`include "tb_qick_stimuli.svh" -integer ro_length; -integer ro_decimated_length; -integer ro_average_length; -initial begin - - // Create agents. - axi_mst_tproc_agent = new("axi_mst_tproc VIP Agent",tb_qick.u_axi_mst_tproc_0.inst.IF); - // Set tag for agents. - axi_mst_tproc_agent.set_agent_tag("axi_mst_tproc VIP"); - // Start agents. - axi_mst_tproc_agent.start_master(); - - // Create agents. - axi_mst_sg_agent = new("axi_mst_sg_0 VIP Agent",tb_qick.u_axi_mst_sg_0.inst.IF); - // Set tag for agents. - axi_mst_sg_agent.set_agent_tag("axi_mst_sg_0 VIP"); - // Start agents. - axi_mst_sg_agent.start_master(); - - // Create agents. - axi_mst_avg_agent = new("axi_mst_avg_0 VIP Agent",tb_qick.u_axi_mst_avg_0.inst.IF); - // Set tag for agents. - axi_mst_avg_agent.set_agent_tag("axi_mst_avg_0 VIP"); - // Start agents. - axi_mst_avg_agent.start_master(); - - // Create agents. - axi_mst_qemu_agent = new("axi_mst_qemu_0 VIP Agent",tb_qick.u_axi_mst_qemu_0.inst.IF); - // Set tag for agents. - axi_mst_qemu_agent.set_agent_tag("axi_mst_qemu_0 VIP"); - // Start agents. - axi_mst_qemu_agent.start_master(); - - $display("*** Start Test ***"); - - $display("AXI_WDATA_WIDTH %0d", `AXI_WDATA_WIDTH); - - $display("LFSR %0d", `LFSR); - $display("DIVIDER %0d", `DIVIDER); - $display("ARITH %0d", `ARITH); - $display("TIME_READ %0d", `TIME_READ); - - $display("DMEM_AW %0d", `DMEM_AW); - $display("WMEM_AW %0d", `WMEM_AW); - $display("REG_AW %0d", `REG_AW); - $display("IN_PORT_QTY %0d", `IN_PORT_QTY); - $display("OUT_DPORT_QTY %0d", `OUT_DPORT_QTY); - $display("OUT_WPORT_QTY %0d", `OUT_WPORT_QTY); - - - // Load tProc Memories with Program - tproc_load_mem(TEST_NAME); - - - // INITIAL VALUES - - qnet_dt_i = '{default:'0} ; - rst_ni = 1'b0; - axi_dt = 0 ; - // axis_dma_start = 1'b0; - s1_axis_tvalid = 1'b0 ; - port_1_dt_i = 0; - qcom_rdy_i = 0 ; - qp2_rdy_i = 0 ; - periph_dt_i = {0,0} ; - qnet_rdy_i = 0 ; - qnet_dt_i [2] = {0,0} ; - proc_start_i = 1'b0; - proc_stop_i = 1'b0; - core_start_i = 1'b0; - core_stop_i = 1'b0; - time_rst_i = 1'b0; - time_init_i = 1'b0; - time_updt_i = 1'b0; - offset_dt_i = 0 ; - // periph_vld_i = 1'b0; - - tb_load_mem = 1'b0; - tb_load_mem_done = 1'b0; - - tb_test_run_start = 1'b1; - tb_test_run_done = 1'b0; - tb_test_read_start = 1'b1; - tb_test_read_done = 1'b0; - - ro_length = 0; - ro_decimated_length = 0; - ro_average_length = 0; - - sg_s0_axis_tvalid = 0; - sg_s0_axis_tdata = 0; - - m1_axis_buf_dec_tready = 1'b1; - - m_dma_axis_tready_i = 1'b1; - // max_value = 0; - #10ns; - - // Hold Reset - repeat(16) @ (posedge s_ps_dma_aclk); #0.1ns; - // Release Reset - rst_ni = 1'b1; - - #1us; - - // Load Signal Generator Envelope Table Memory. - sg_load_mem(TEST_NAME); - - #1us; - - // Configure TPROC - // LFSR Enable (1: Free Running, 2: Step on s1 Read, 3: Step on s0 Write) - WRITE_AXI( REG_CORE_CFG , 1); - #100ns; - WRITE_AXI( REG_CORE_CFG , 0); - #100ns; - WRITE_AXI( REG_CORE_CFG , 2); - #100ns; - - - #100ns; - - repeat (REPEAT_EXEC) begin - - config_decimated_readout(0, ro_length); - config_average_readout(0, ro_length); - - wait(tb_test_run_start); - - WRITE_AXI( REG_TPROC_CTRL , 4); //PROC_START - - #(TEST_RUN_TIME); - - - WRITE_AXI( REG_TPROC_CTRL , 8); //PROC_STOP - - tb_test_run_done = 1'b1; - - wait(tb_test_read_start); - - // Read Decimated Buffer - read_decimated_readout(0, ro_decimated_length); - - // Read Averaged Buffer (number of triggers in experiment) - read_average_readout(0, ro_average_length); - - #(TEST_READ_TIME); - - tb_test_read_done = 1'b1; - - end - -// WRITE_AXI( REG_TPROC_CTRL , 16); //CORE_START -// #1000; -// WRITE_AXI( REG_TPROC_CTRL , 128); //PROC_RUN -// #900; - - #1us; - - $display("*** End Test ***"); - $finish(); -end - -initial begin - integer N; - - $display("*** %t - Waiting for general reset to deassert ***", $realtime()); - wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); - - tb_test_run_start = 1'b1; - tb_test_read_start = 1'b1; - - // Default Readout Config - ro_length = 1000.0 / (2.0*T_RO_CLK); - ro_decimated_length = 1000.0 / (2.0*T_RO_CLK); - ro_average_length = 1; - - - if (TEST_NAME == "test_basic_pulses") begin - $display("*** %t - Start test_basic_pulses Test ***", $realtime()); - ro_length = 2000.0 / (2.0*T_RO_CLK); - ro_decimated_length = 2000.0 / (2.0*T_RO_CLK); - ro_average_length = 1; - - TEST_READ_TIME = 10us; - - wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); - #100ns; - - $display("*** %t - End of test_basic_pulses Test ***", $realtime()); - end - - - if (TEST_NAME == "test_many_envelopes") begin - $display("*** %t - Start test_many_envelopes Test ***", $realtime()); - ro_length = 2000.0 / (2.0*T_RO_CLK); - ro_decimated_length = 2000.0 / (2.0*T_RO_CLK); - ro_average_length = 1; - - TEST_READ_TIME = 10us; - - wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); - #100ns; - - $display("*** %t - End of test_many_envelopes Test ***", $realtime()); - end - - - if (TEST_NAME == "test_tproc_basic") begin - TEST_RUN_TIME = 50us; - forever begin - $display("*** %t - Start test_tproc_basic Test ***", $realtime()); - wait (tb_qick.AXIS_QPROC.QPROC.QPROC_CTRL.core_en_o == 1'b1); - N = 11; - wait (tb_qick.AXIS_QPROC.QPROC.time_abs_o > 2**N+100); - fork - begin - while (N < 48) begin - N = N+1; - - // Force time_abs - $display("*** %t - Changing time_abs to get to %0u ***", $realtime(), (2**N)-100); - force tb_qick.AXIS_QPROC.QPROC.QPROC_CTRL.QTIME_CTRL.TIME_ADDER.RESULT = (2**N)-100; - #100ns; - release tb_qick.AXIS_QPROC.QPROC.QPROC_CTRL.QTIME_CTRL.TIME_ADDER.RESULT; - - $display("*** Waiting for trigger ***"); - wait (tb_qick.AXIS_QPROC.trig_0_o); - - $display("*** %t - Waiting for time_abs to get to %0u ***", $realtime(), 2**N+100); - wait (tb_qick.AXIS_QPROC.QPROC.time_abs_o > 2**N+100); - end - end - begin - integer M = 15; - logic [47:0] new_ref_time; - while (M < 48) begin - $display("*** %t - Waiting for r15 == %0d ***", $realtime(), M); - wait (tb_qick.AXIS_QPROC.QPROC.CORE_0.CORE_CPU.reg_bank.dreg_32_dt[15] == M); - new_ref_time = 2**M; - - $display("*** %t - Changing c_time_ref_dt to get to %0u ***", $realtime(), new_ref_time); - force tb_qick.AXIS_QPROC.QPROC.c_time_ref_dt = new_ref_time; - #100ns; - release tb_qick.AXIS_QPROC.QPROC.c_time_ref_dt; - - M = M + 1; - end - end - join - $display("*** %t - End of test_tproc_basic Test ***", $realtime()); - wait (tb_qick.AXIS_QPROC.QPROC.QPROC_CTRL.core_en_o == 1'b0); - end - end - - - if (TEST_NAME == "test_qubit_emulator") begin - $display("*** %t - Start test_qubit_emulator Test ***", $realtime()); - // TEST_OUT_CONNECTION = "TEST_OUT_QEMU"; - TEST_RUN_TIME = 50us; - TEST_READ_TIME = 10us; - REPEAT_EXEC = 1; - - ro_length = 500; - ro_decimated_length = 500; - ro_average_length = 21; - - wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); - #100ns; - qubit_emulator_config(); - #100ns; - // Configure Readout - - $display("*** %t - End of test_qubit_emulator Test ***", $realtime()); - end - - - if (TEST_NAME == "test_randomized_benchmarking") begin - $display("*** %t - Start test_randomized_benchmarking Test ***", $realtime()); - TEST_RUN_TIME = 60us; - REPEAT_EXEC = 1; - - ro_length = 1000.0 / (2.0*T_RO_CLK); - ro_decimated_length = 1000.0 / (2.0*T_RO_CLK); - // ro_average_length = 9 + (9 % 2); - ro_average_length = 9; - - wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); - #100ns; - $display("*** %t - End of test_randomized_benchmarking Test ***", $realtime()); - end - - - if (TEST_NAME == "test_issue361") begin - $display("*** %t - Start test_issue361 Test ***", $realtime()); - TEST_RUN_TIME = 25us; - REPEAT_EXEC = 1; - - ro_length = 200; - ro_decimated_length = 30; - ro_average_length = 5; - - wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); - #100ns; - - wait(tb_test_run_done); - - for (int i=0; i<1000; i++) begin - @(negedge s_ps_dma_aclk); - m1_axis_buf_dec_tready = i[4:0] > 15; - end - - $display("*** %t - End of test_issue361 Test ***", $realtime()); - end - - if (TEST_NAME == "test_issue53") begin - $display("*** %t - Start test_issue53 Test ***", $realtime()); - TEST_RUN_TIME = 10us; - REPEAT_EXEC = 2; - - ro_length = 500; - ro_decimated_length = 50; - ro_average_length = 10; - - wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); - #100ns; - - wait(tb_test_run_done); - - $display("*** %t - End of test_issue53 Test ***", $realtime()); - end - -end - -task WRITE_AXI(integer PORT_AXI, DATA_AXI); - $display("Running WRITE_AXI() Task"); - //$display("PORT %d", PORT_AXI); - //$display("DATA %d", DATA_AXI); - @(posedge s_ps_dma_aclk); #0.1; - axi_mst_tproc_agent.AXI4LITE_WRITE_BURST(PORT_AXI, prot, DATA_AXI, resp); -endtask - -task READ_AXI(integer ADDR_AXI); - integer DATA_RD; - $display("Running READ_AXI() Task"); - @(posedge s_ps_dma_aclk); #0.1; - axi_mst_tproc_agent.AXI4LITE_READ_BURST(ADDR_AXI, 0, DATA_RD, resp); - $display("READ AXI_DATA %d", DATA_RD); -endtask - - -task tproc_load_mem(string test_name); - string pmem_file, wmem_file, dmem_file; - - $display("### Task tproc_load_mem() start ###"); - $display("Loading Test: %s", test_name); - - pmem_file = {"../../../../src/tb/",test_name,"/pmem.mem"}; - wmem_file = {"../../../../src/tb/",test_name,"/wmem.mem"}; - dmem_file = {"../../../../src/tb/",test_name,"/dmem.mem"}; - - $readmemh(pmem_file, AXIS_QPROC.QPROC.CORE_0.CORE_MEM.P_MEM.RAM); - $readmemh(wmem_file, AXIS_QPROC.QPROC.CORE_0.CORE_MEM.W_MEM.RAM); - $readmemh(dmem_file, AXIS_QPROC.QPROC.CORE_0.CORE_MEM.D_MEM.RAM); - - $display("### Task sg_load_mem() end ###"); - -endtask - - -// Load pulse data into memory. -task sg_load_mem(string test_name) /*, input logic tb_load_mem, output logic tb_load_mem_done)*/; - string sg_file; - int fd,vali,valq; - bit signed [15:0] ii,qq; - - $display("### %t - Task sg_load_mem() start ###", $realtime()); - - sg_s0_axis_tvalid = 0; - sg_s0_axis_tdata = 0; - - - $display("################################"); - $display("### Load envelope into Table ###"); - $display("################################"); - $display("t = %0t", $time); - - // start_addr. - data_wr = 0; - axi_mst_sg_agent.AXI4LITE_WRITE_BURST(SG_ADDR_START_ADDR, prot, data_wr, resp); - #100ns; - - // we. - data_wr = 1; - axi_mst_sg_agent.AXI4LITE_WRITE_BURST(SG_ADDR_WE, prot, data_wr, resp); - #100ns; - - // Load Envelope Table Memory. - tb_load_mem = 1; - - // File must be relative to where the simulation is run from (i.e.: xxx.sim/sim_x/behav/xsim) - sg_file = {"../../../../src/tb/",test_name,"/sg_0.mem"}; - fd = $fopen(sg_file,"r"); - - wait (sg_s0_axis_tready); - - while($fscanf(fd,"%d,%d", vali,valq) == 2) begin - // $display("I,Q: %d, %d", vali,valq); - ii = vali; - qq = valq; - @(posedge sg_s0_axis_aclk); - sg_s0_axis_tvalid = 1; - sg_s0_axis_tdata = {qq,ii}; - end - $fclose(fd); - - @(posedge sg_s0_axis_aclk); - sg_s0_axis_tvalid = 0; - - tb_load_mem_done = 1; - - $display("### %t - Task sg_load_mem() end ###", $realtime()); -endtask - -task config_decimated_readout(integer channel, integer length); - - // Stop Decimated Buffer Capture - data_wr = 0; - axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_START_REG, prot, data_wr, resp); - #100ns; - - // Set Decimated Buffer Capture Length - data_wr = length; - axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_LEN_REG, prot, data_wr, resp); - #100ns; - - // Start Decimated Buffer Capture - data_wr = 1; - axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_START_REG, prot, data_wr, resp); - #100ns; - - // // Readout Decimated Buffer Data - // data_wr = 0; - // axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_DR_START_REG, prot, data_wr, resp); - // #100ns; - -endtask - -task config_average_readout(integer channel, integer length); - - // Stop Average Buffer Capture - data_wr = 0; - axi_mst_avg_agent.AXI4LITE_WRITE_BURST(AVG_START_REG, prot, data_wr, resp); - #100ns; - - // Set Average Buffer Capture Length - data_wr = length; - axi_mst_avg_agent.AXI4LITE_WRITE_BURST(AVG_LEN_REG, prot, data_wr, resp); - #100ns; - - // Start Average Buffer Capture - data_wr = 1; - axi_mst_avg_agent.AXI4LITE_WRITE_BURST(AVG_START_REG, prot, data_wr, resp); - #100ns; - -endtask - -task read_decimated_readout(integer channel, integer length); - - // Set Decimated Buffer Read Length - data_wr = length; - axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_DR_LEN_REG, prot, data_wr, resp); - #100ns; - - // Readout Decimated Buffer Data - data_wr = 1; - axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_DR_START_REG, prot, data_wr, resp); - #100ns; - - // Stop Readout Decimated Buffer Data - data_wr = 0; - axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_DR_START_REG, prot, data_wr, resp); - #100ns; - -endtask - -task read_average_readout(integer channel, integer length); - - // Set Average Buffer Capture Length - data_wr = length; - axi_mst_avg_agent.AXI4LITE_WRITE_BURST(AVG_DR_LEN_REG, prot, data_wr, resp); - #100ns; - - // Start Average Buffer Read - data_wr = 1; - axi_mst_avg_agent.AXI4LITE_WRITE_BURST(AVG_DR_START_REG, prot, data_wr, resp); - #100ns; - - // Stop Average Buffer Read - data_wr = 0; - axi_mst_avg_agent.AXI4LITE_WRITE_BURST(AVG_DR_START_REG, prot, data_wr, resp); - #100ns; - -endtask - - - -task qubit_emulator_config(); - - // From https://github.com/openquantumhardware/QCE2024/blob/main/labs_solns/LabDay1_Resonator.ipynb - // soc.config_resonator(c0=0.85, c1=0.8, verbose=True) - // SimuChain: f = 500.0 MHz, fd = -114.39999999999998 MHz, k = 232, fdds = 0.8000000000000114 MHz - // AxisKidsimV3: sel = resonator - // AxisKidsimV3: channel = 232 - // AxisKidsimV3: lane = 0 - // AxisKidsimV3: punct_id = 29 - // AxisKidsimV3: iir_c0 = 0.85 - // AxisKidsimV3: iir_c1 = 0.8 - // AxisKidsimV3: iir_g = 0.9729729729729729 - // AxisKidsimV3: dds_freq = 0.8000000000000114 - // AxisKidsimV3: dds_wait = 95 - // AxisKidsimV3: sweep_freq = 2.0 - // AxisKidsimV3: sweep_time = 10.0 - // AxisKidsimV3: nstep = 1 - // freq = 5461, bval = 13653, slope = 13653, steps = 1, wait = 95 - // c0 = 27853, c1 = 26214, g = 15882 - // sel = 0, punct_id = 29, addr = 0 - // def config_resonator(self, simu_ch=0, q_adc=6, q_dac=0, f=500.0, df=2.0, dt=10.0, c0=0.99, c1=0.8, verbose=False): - // simu.set_resonator(cfg, verbose=verbose) - // kidsim_b.set_resonator(cfg, verbose=verbose) - // self.set_resonator_config(config, verbose) - // self.set_resonator_regs(config, verbose) - - real qemu_f = 100.0; // in MHz - // real qemu_df = 2.0; // in MHz - // real qemu_dt = 10.0; // in us - real qemu_c0 = 0.98; - real qemu_c1 = 0.85; - real qemu_g = 0.9; - integer qemu_sel = 0; // 0: 'resonator', 1: 'dds', 2: 'bypass' - - // xil_axi_ulong QEMU_DDS_BVAL_REG = 4 * 0; - // xil_axi_ulong QEMU_DDS_SLOPE_REG = 4 * 1; - // xil_axi_ulong QEMU_DDS_STEPS_REG = 4 * 2; - // xil_axi_ulong QEMU_DDS_WAIT_REG = 4 * 3; - // xil_axi_ulong QEMU_DDS_FREQ_REG = 4 * 4; - // xil_axi_ulong QEMU_IIR_C0_REG = 4 * 5; - // xil_axi_ulong QEMU_IIR_C1_REG = 4 * 6; - // xil_axi_ulong QEMU_IIR_G_REG = 4 * 7; - // xil_axi_ulong QEMU_OUTSEL_REG = 4 * 8; - // xil_axi_ulong QEMU_PUNCT_ID_REG = 4 * 9; - // xil_axi_ulong QEMU_ADDR_REG = 4 * 10; - // xil_axi_ulong QEMU_WE_REG = 4 * 11; - - // data_wr = qemu_f * 1e6 / (/*f_adc*/ (1/(2.0*T_RO_CLK*1e-9)) / 2.0**16); - data_wr = qemu_f * 1e6 / (/*f_adc*/ (1*8/(2.0*T_RO_CLK*1e-9)) / 2.0**16); - axi_mst_qemu_agent.AXI4LITE_WRITE_BURST(QEMU_DDS_FREQ_REG, prot, data_wr, resp); - #100ns; - - data_wr = qemu_c0 * 2**(16-1); - axi_mst_qemu_agent.AXI4LITE_WRITE_BURST(QEMU_IIR_C0_REG, prot, data_wr, resp); - #100ns; - - data_wr = qemu_c1 * 2**(16-1); - axi_mst_qemu_agent.AXI4LITE_WRITE_BURST(QEMU_IIR_C1_REG, prot, data_wr, resp); - #100ns; - - data_wr = qemu_g * 2**(16-1); - axi_mst_qemu_agent.AXI4LITE_WRITE_BURST(QEMU_IIR_G_REG, prot, data_wr, resp); - #100ns; - - // Write Enable Pulse - data_wr = 1; - axi_mst_qemu_agent.AXI4LITE_WRITE_BURST(QEMU_WE_REG, prot, data_wr, resp); - #100ns; - - data_wr = 0; - axi_mst_qemu_agent.AXI4LITE_WRITE_BURST(QEMU_WE_REG, prot, data_wr, resp); - #100ns; - -endtask +`include "tb_qick_tasks.svh" endmodule diff --git a/firmware/testbench/qick_testbench/src/tb/tb_qick_stimuli.svh b/firmware/testbench/qick_testbench/src/tb/tb_qick_stimuli.svh new file mode 100644 index 00000000..fd5728b6 --- /dev/null +++ b/firmware/testbench/qick_testbench/src/tb/tb_qick_stimuli.svh @@ -0,0 +1,344 @@ +//-------------------------------------- +// TEST STIMULI +//-------------------------------------- + +logic tb_test_run_start; +logic tb_test_run_done; +logic tb_test_read_start; +logic tb_test_read_done; + +integer ro_length; +integer ro_decimated_length; +integer ro_average_length; + +initial begin + + // Create agents. + axi_mst_tproc_agent = new("axi_mst_tproc VIP Agent",tb_qick.u_axi_mst_tproc_0.inst.IF); + // Set tag for agents. + axi_mst_tproc_agent.set_agent_tag("axi_mst_tproc VIP"); + // Start agents. + axi_mst_tproc_agent.start_master(); + + // Create agents. + axi_mst_sg_agent = new("axi_mst_sg_0 VIP Agent",tb_qick.u_axi_mst_sg_0.inst.IF); + // Set tag for agents. + axi_mst_sg_agent.set_agent_tag("axi_mst_sg_0 VIP"); + // Start agents. + axi_mst_sg_agent.start_master(); + + // Create agents. + axi_mst_avg_agent = new("axi_mst_avg_0 VIP Agent",tb_qick.u_axi_mst_avg_0.inst.IF); + // Set tag for agents. + axi_mst_avg_agent.set_agent_tag("axi_mst_avg_0 VIP"); + // Start agents. + axi_mst_avg_agent.start_master(); + + // Create agents. + axi_mst_qemu_agent = new("axi_mst_qemu_0 VIP Agent",tb_qick.u_axi_mst_qemu_0.inst.IF); + // Set tag for agents. + axi_mst_qemu_agent.set_agent_tag("axi_mst_qemu_0 VIP"); + // Start agents. + axi_mst_qemu_agent.start_master(); + + $display("*** Start Test ***"); + + $display("AXI_WDATA_WIDTH %0d", `AXI_WDATA_WIDTH); + + $display("LFSR %0d", `LFSR); + $display("DIVIDER %0d", `DIVIDER); + $display("ARITH %0d", `ARITH); + $display("TIME_READ %0d", `TIME_READ); + + $display("DMEM_AW %0d", `DMEM_AW); + $display("WMEM_AW %0d", `WMEM_AW); + $display("REG_AW %0d", `REG_AW); + $display("IN_PORT_QTY %0d", `IN_PORT_QTY); + $display("OUT_DPORT_QTY %0d", `OUT_DPORT_QTY); + $display("OUT_WPORT_QTY %0d", `OUT_WPORT_QTY); + + + // Load tProc Memories with Program + tproc_load_mem(TEST_NAME); + + + // INITIAL VALUES + + qnet_dt_i = '{default:'0} ; + rst_ni = 1'b0; + axi_dt = 0 ; + // axis_dma_start = 1'b0; + s1_axis_tvalid = 1'b0 ; + port_1_dt_i = 0; + qcom_rdy_i = 0 ; + qp2_rdy_i = 0 ; + periph_dt_i = {0,0} ; + qnet_rdy_i = 0 ; + qnet_dt_i [2] = {0,0} ; + proc_start_i = 1'b0; + proc_stop_i = 1'b0; + core_start_i = 1'b0; + core_stop_i = 1'b0; + time_rst_i = 1'b0; + time_init_i = 1'b0; + time_updt_i = 1'b0; + offset_dt_i = 0 ; + // periph_vld_i = 1'b0; + + tb_load_mem = 1'b0; + tb_load_mem_done = 1'b0; + + tb_test_run_start = 1'b1; + tb_test_run_done = 1'b0; + tb_test_read_start = 1'b1; + tb_test_read_done = 1'b0; + + ro_length = 0; + ro_decimated_length = 0; + ro_average_length = 0; + + sg_s0_axis_tvalid = 0; + sg_s0_axis_tdata = 0; + + m1_axis_buf_dec_tready = 1'b1; + + m_dma_axis_tready_i = 1'b1; + // max_value = 0; + #10ns; + + // Hold Reset + repeat(16) @ (posedge s_ps_dma_aclk); #0.1ns; + // Release Reset + rst_ni = 1'b1; + + #1us; + + // Load Signal Generator Envelope Table Memory. + sg_load_mem(TEST_NAME); + + #1us; + + // Configure TPROC + // LFSR Enable (1: Free Running, 2: Step on s1 Read, 3: Step on s0 Write) + WRITE_AXI( REG_CORE_CFG , 1); + #100ns; + WRITE_AXI( REG_CORE_CFG , 0); + #100ns; + WRITE_AXI( REG_CORE_CFG , 2); + #100ns; + + + #100ns; + + repeat (REPEAT_EXEC) begin + + config_decimated_readout(0, ro_length); + config_average_readout(0, ro_length); + + wait(tb_test_run_start); + + WRITE_AXI( REG_TPROC_CTRL , 4); //PROC_START + + #(TEST_RUN_TIME); + + + WRITE_AXI( REG_TPROC_CTRL , 8); //PROC_STOP + + tb_test_run_done = 1'b1; + + wait(tb_test_read_start); + + // Read Decimated Buffer + read_decimated_readout(0, ro_decimated_length); + + // Read Averaged Buffer (number of triggers in experiment) + read_average_readout(0, ro_average_length); + + #(TEST_READ_TIME); + + tb_test_read_done = 1'b1; + + end + +// WRITE_AXI( REG_TPROC_CTRL , 16); //CORE_START +// #1000; +// WRITE_AXI( REG_TPROC_CTRL , 128); //PROC_RUN +// #900; + + #1us; + + $display("*** End Test ***"); + $finish(); +end + +initial begin + integer N; + + $display("*** %t - Waiting for general reset to deassert ***", $realtime()); + wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); + + tb_test_run_start = 1'b1; + tb_test_read_start = 1'b1; + + // Default Readout Config + ro_length = 1000.0 / (2.0*T_RO_CLK); + ro_decimated_length = 1000.0 / (2.0*T_RO_CLK); + ro_average_length = 1; + + + if (TEST_NAME == "test_basic_pulses") begin + $display("*** %t - Start test_basic_pulses Test ***", $realtime()); + ro_length = 2000.0 / (2.0*T_RO_CLK); + ro_decimated_length = 2000.0 / (2.0*T_RO_CLK); + ro_average_length = 1; + + TEST_READ_TIME = 10us; + + wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); + #100ns; + + $display("*** %t - End of test_basic_pulses Test ***", $realtime()); + end + + + if (TEST_NAME == "test_many_envelopes") begin + $display("*** %t - Start test_many_envelopes Test ***", $realtime()); + ro_length = 2000.0 / (2.0*T_RO_CLK); + ro_decimated_length = 2000.0 / (2.0*T_RO_CLK); + ro_average_length = 1; + + TEST_READ_TIME = 10us; + + wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); + #100ns; + + $display("*** %t - End of test_many_envelopes Test ***", $realtime()); + end + + + if (TEST_NAME == "test_tproc_basic") begin + TEST_RUN_TIME = 50us; + forever begin + $display("*** %t - Start test_tproc_basic Test ***", $realtime()); + wait (tb_qick.AXIS_QPROC.QPROC.QPROC_CTRL.core_en_o == 1'b1); + N = 11; + wait (tb_qick.AXIS_QPROC.QPROC.time_abs_o > 2**N+100); + fork + begin + while (N < 48) begin + N = N+1; + + // Force time_abs + $display("*** %t - Changing time_abs to get to %0u ***", $realtime(), (2**N)-100); + force tb_qick.AXIS_QPROC.QPROC.QPROC_CTRL.QTIME_CTRL.TIME_ADDER.RESULT = (2**N)-100; + #100ns; + release tb_qick.AXIS_QPROC.QPROC.QPROC_CTRL.QTIME_CTRL.TIME_ADDER.RESULT; + + $display("*** Waiting for trigger ***"); + wait (tb_qick.AXIS_QPROC.trig_0_o); + + $display("*** %t - Waiting for time_abs to get to %0u ***", $realtime(), 2**N+100); + wait (tb_qick.AXIS_QPROC.QPROC.time_abs_o > 2**N+100); + end + end + begin + integer M = 15; + logic [47:0] new_ref_time; + while (M < 48) begin + $display("*** %t - Waiting for r15 == %0d ***", $realtime(), M); + wait (tb_qick.AXIS_QPROC.QPROC.CORE_0.CORE_CPU.reg_bank.dreg_32_dt[15] == M); + new_ref_time = 2**M; + + $display("*** %t - Changing c_time_ref_dt to get to %0u ***", $realtime(), new_ref_time); + force tb_qick.AXIS_QPROC.QPROC.c_time_ref_dt = new_ref_time; + #100ns; + release tb_qick.AXIS_QPROC.QPROC.c_time_ref_dt; + + M = M + 1; + end + end + join + $display("*** %t - End of test_tproc_basic Test ***", $realtime()); + wait (tb_qick.AXIS_QPROC.QPROC.QPROC_CTRL.core_en_o == 1'b0); + end + end + + + if (TEST_NAME == "test_qubit_emulator") begin + $display("*** %t - Start test_qubit_emulator Test ***", $realtime()); + // TEST_OUT_CONNECTION = "TEST_OUT_QEMU"; + TEST_RUN_TIME = 50us; + TEST_READ_TIME = 10us; + REPEAT_EXEC = 1; + + ro_length = 500; + ro_decimated_length = 500; + ro_average_length = 21; + + wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); + #100ns; + qubit_emulator_config(); + #100ns; + // Configure Readout + + $display("*** %t - End of test_qubit_emulator Test ***", $realtime()); + end + + + if (TEST_NAME == "test_randomized_benchmarking") begin + $display("*** %t - Start test_randomized_benchmarking Test ***", $realtime()); + TEST_RUN_TIME = 500us; + REPEAT_EXEC = 1; + + ro_length = 1000.0 / (2.0*T_RO_CLK); + ro_decimated_length = 1000.0 / (2.0*T_RO_CLK); + // ro_average_length = 9 + (9 % 2); + ro_average_length = 9; + + wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); + #100ns; + $display("*** %t - End of test_randomized_benchmarking Test ***", $realtime()); + end + + + if (TEST_NAME == "test_issue361") begin + $display("*** %t - Start test_issue361 Test ***", $realtime()); + TEST_RUN_TIME = 25us; + REPEAT_EXEC = 1; + + ro_length = 200; + ro_decimated_length = 30; + ro_average_length = 5; + + wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); + #100ns; + + wait(tb_test_run_done); + + for (int i=0; i<1000; i++) begin + @(negedge s_ps_dma_aclk); + m1_axis_buf_dec_tready = i[4:0] > 15; + end + + $display("*** %t - End of test_issue361 Test ***", $realtime()); + end + + + if (TEST_NAME == "test_issue53") begin + $display("*** %t - Start test_issue53 Test ***", $realtime()); + TEST_RUN_TIME = 10us; + REPEAT_EXEC = 2; + + ro_length = 500; + ro_decimated_length = 50; + ro_average_length = 10; + + wait (tb_qick.AXIS_QPROC.t_resetn == 1'b1); + #100ns; + + wait(tb_test_run_done); + + $display("*** %t - End of test_issue53 Test ***", $realtime()); + end + +end diff --git a/firmware/testbench/qick_testbench/src/tb/tb_qick_tasks.svh b/firmware/testbench/qick_testbench/src/tb/tb_qick_tasks.svh new file mode 100644 index 00000000..b9aa1d08 --- /dev/null +++ b/firmware/testbench/qick_testbench/src/tb/tb_qick_tasks.svh @@ -0,0 +1,247 @@ +task WRITE_AXI(integer PORT_AXI, DATA_AXI); + $display("Running WRITE_AXI() Task"); + //$display("PORT %d", PORT_AXI); + //$display("DATA %d", DATA_AXI); + @(posedge s_ps_dma_aclk); #0.1; + axi_mst_tproc_agent.AXI4LITE_WRITE_BURST(PORT_AXI, prot, DATA_AXI, resp); +endtask + +task READ_AXI(integer ADDR_AXI); + integer DATA_RD; + $display("Running READ_AXI() Task"); + @(posedge s_ps_dma_aclk); #0.1; + axi_mst_tproc_agent.AXI4LITE_READ_BURST(ADDR_AXI, 0, DATA_RD, resp); + $display("READ AXI_DATA %d", DATA_RD); +endtask + + +task tproc_load_mem(string test_name); + string pmem_file, wmem_file, dmem_file; + + $display("### Task tproc_load_mem() start ###"); + $display("Loading Test: %s", test_name); + + pmem_file = {"../../../../src/tb/",test_name,"/pmem.mem"}; + wmem_file = {"../../../../src/tb/",test_name,"/wmem.mem"}; + dmem_file = {"../../../../src/tb/",test_name,"/dmem.mem"}; + + $readmemh(pmem_file, AXIS_QPROC.QPROC.CORE_0.CORE_MEM.P_MEM.RAM); + $readmemh(wmem_file, AXIS_QPROC.QPROC.CORE_0.CORE_MEM.W_MEM.RAM); + $readmemh(dmem_file, AXIS_QPROC.QPROC.CORE_0.CORE_MEM.D_MEM.RAM); + + $display("### Task sg_load_mem() end ###"); + +endtask + + +// Load pulse data into memory. +task sg_load_mem(string test_name) /*, input logic tb_load_mem, output logic tb_load_mem_done)*/; + string sg_file; + int fd,vali,valq; + bit signed [15:0] ii,qq; + + $display("### %t - Task sg_load_mem() start ###", $realtime()); + + sg_s0_axis_tvalid = 0; + sg_s0_axis_tdata = 0; + + + $display("################################"); + $display("### Load envelope into Table ###"); + $display("################################"); + $display("t = %0t", $time); + + // start_addr. + data_wr = 0; + axi_mst_sg_agent.AXI4LITE_WRITE_BURST(SG_ADDR_START_ADDR, prot, data_wr, resp); + #100ns; + + // we. + data_wr = 1; + axi_mst_sg_agent.AXI4LITE_WRITE_BURST(SG_ADDR_WE, prot, data_wr, resp); + #100ns; + + // Load Envelope Table Memory. + tb_load_mem = 1; + + // File must be relative to where the simulation is run from (i.e.: xxx.sim/sim_x/behav/xsim) + sg_file = {"../../../../src/tb/",test_name,"/sg_0.mem"}; + fd = $fopen(sg_file,"r"); + + wait (sg_s0_axis_tready); + + while($fscanf(fd,"%d,%d", vali,valq) == 2) begin + // $display("I,Q: %d, %d", vali,valq); + ii = vali; + qq = valq; + @(posedge sg_s0_axis_aclk); + sg_s0_axis_tvalid = 1; + sg_s0_axis_tdata = {qq,ii}; + end + $fclose(fd); + + @(posedge sg_s0_axis_aclk); + sg_s0_axis_tvalid = 0; + + tb_load_mem_done = 1; + + $display("### %t - Task sg_load_mem() end ###", $realtime()); +endtask + +task config_decimated_readout(integer channel, integer length); + + // Stop Decimated Buffer Capture + data_wr = 0; + axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_START_REG, prot, data_wr, resp); + #100ns; + + // Set Decimated Buffer Capture Length + data_wr = length; + axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_LEN_REG, prot, data_wr, resp); + #100ns; + + // Start Decimated Buffer Capture + data_wr = 1; + axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_START_REG, prot, data_wr, resp); + #100ns; + + // // Readout Decimated Buffer Data + // data_wr = 0; + // axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_DR_START_REG, prot, data_wr, resp); + // #100ns; + +endtask + +task config_average_readout(integer channel, integer length); + + // Stop Average Buffer Capture + data_wr = 0; + axi_mst_avg_agent.AXI4LITE_WRITE_BURST(AVG_START_REG, prot, data_wr, resp); + #100ns; + + // Set Average Buffer Capture Length + data_wr = length; + axi_mst_avg_agent.AXI4LITE_WRITE_BURST(AVG_LEN_REG, prot, data_wr, resp); + #100ns; + + // Start Average Buffer Capture + data_wr = 1; + axi_mst_avg_agent.AXI4LITE_WRITE_BURST(AVG_START_REG, prot, data_wr, resp); + #100ns; + +endtask + +task read_decimated_readout(integer channel, integer length); + + // Set Decimated Buffer Read Length + data_wr = length; + axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_DR_LEN_REG, prot, data_wr, resp); + #100ns; + + // Readout Decimated Buffer Data + data_wr = 1; + axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_DR_START_REG, prot, data_wr, resp); + #100ns; + + // Stop Readout Decimated Buffer Data + data_wr = 0; + axi_mst_avg_agent.AXI4LITE_WRITE_BURST(BUF_DR_START_REG, prot, data_wr, resp); + #100ns; + +endtask + +task read_average_readout(integer channel, integer length); + + // Set Average Buffer Capture Length + data_wr = length; + axi_mst_avg_agent.AXI4LITE_WRITE_BURST(AVG_DR_LEN_REG, prot, data_wr, resp); + #100ns; + + // Start Average Buffer Read + data_wr = 1; + axi_mst_avg_agent.AXI4LITE_WRITE_BURST(AVG_DR_START_REG, prot, data_wr, resp); + #100ns; + + // Stop Average Buffer Read + data_wr = 0; + axi_mst_avg_agent.AXI4LITE_WRITE_BURST(AVG_DR_START_REG, prot, data_wr, resp); + #100ns; + +endtask + + + +task qubit_emulator_config(); + + // From https://github.com/openquantumhardware/QCE2024/blob/main/labs_solns/LabDay1_Resonator.ipynb + // soc.config_resonator(c0=0.85, c1=0.8, verbose=True) + // SimuChain: f = 500.0 MHz, fd = -114.39999999999998 MHz, k = 232, fdds = 0.8000000000000114 MHz + // AxisKidsimV3: sel = resonator + // AxisKidsimV3: channel = 232 + // AxisKidsimV3: lane = 0 + // AxisKidsimV3: punct_id = 29 + // AxisKidsimV3: iir_c0 = 0.85 + // AxisKidsimV3: iir_c1 = 0.8 + // AxisKidsimV3: iir_g = 0.9729729729729729 + // AxisKidsimV3: dds_freq = 0.8000000000000114 + // AxisKidsimV3: dds_wait = 95 + // AxisKidsimV3: sweep_freq = 2.0 + // AxisKidsimV3: sweep_time = 10.0 + // AxisKidsimV3: nstep = 1 + // freq = 5461, bval = 13653, slope = 13653, steps = 1, wait = 95 + // c0 = 27853, c1 = 26214, g = 15882 + // sel = 0, punct_id = 29, addr = 0 + // def config_resonator(self, simu_ch=0, q_adc=6, q_dac=0, f=500.0, df=2.0, dt=10.0, c0=0.99, c1=0.8, verbose=False): + // simu.set_resonator(cfg, verbose=verbose) + // kidsim_b.set_resonator(cfg, verbose=verbose) + // self.set_resonator_config(config, verbose) + // self.set_resonator_regs(config, verbose) + + real qemu_f = 100.0; // in MHz + // real qemu_df = 2.0; // in MHz + // real qemu_dt = 10.0; // in us + real qemu_c0 = 0.98; + real qemu_c1 = 0.85; + real qemu_g = 0.9; + integer qemu_sel = 0; // 0: 'resonator', 1: 'dds', 2: 'bypass' + + // xil_axi_ulong QEMU_DDS_BVAL_REG = 4 * 0; + // xil_axi_ulong QEMU_DDS_SLOPE_REG = 4 * 1; + // xil_axi_ulong QEMU_DDS_STEPS_REG = 4 * 2; + // xil_axi_ulong QEMU_DDS_WAIT_REG = 4 * 3; + // xil_axi_ulong QEMU_DDS_FREQ_REG = 4 * 4; + // xil_axi_ulong QEMU_IIR_C0_REG = 4 * 5; + // xil_axi_ulong QEMU_IIR_C1_REG = 4 * 6; + // xil_axi_ulong QEMU_IIR_G_REG = 4 * 7; + // xil_axi_ulong QEMU_OUTSEL_REG = 4 * 8; + // xil_axi_ulong QEMU_PUNCT_ID_REG = 4 * 9; + // xil_axi_ulong QEMU_ADDR_REG = 4 * 10; + // xil_axi_ulong QEMU_WE_REG = 4 * 11; + + // data_wr = qemu_f * 1e6 / (/*f_adc*/ (1/(2.0*T_RO_CLK*1e-9)) / 2.0**16); + data_wr = qemu_f * 1e6 / (/*f_adc*/ (1*8/(2.0*T_RO_CLK*1e-9)) / 2.0**16); + axi_mst_qemu_agent.AXI4LITE_WRITE_BURST(QEMU_DDS_FREQ_REG, prot, data_wr, resp); + #100ns; + + data_wr = qemu_c0 * 2**(16-1); + axi_mst_qemu_agent.AXI4LITE_WRITE_BURST(QEMU_IIR_C0_REG, prot, data_wr, resp); + #100ns; + + data_wr = qemu_c1 * 2**(16-1); + axi_mst_qemu_agent.AXI4LITE_WRITE_BURST(QEMU_IIR_C1_REG, prot, data_wr, resp); + #100ns; + + data_wr = qemu_g * 2**(16-1); + axi_mst_qemu_agent.AXI4LITE_WRITE_BURST(QEMU_IIR_G_REG, prot, data_wr, resp); + #100ns; + + // Write Enable Pulse + data_wr = 1; + axi_mst_qemu_agent.AXI4LITE_WRITE_BURST(QEMU_WE_REG, prot, data_wr, resp); + #100ns; + + data_wr = 0; + axi_mst_qemu_agent.AXI4LITE_WRITE_BURST(QEMU_WE_REG, prot, data_wr, resp); + #100ns; + +endtask From a838f2880400c27a0c26fe6909f8d6ecd13ae78e Mon Sep 17 00:00:00 2001 From: Diego Martin Date: Thu, 8 Jan 2026 04:15:17 -0600 Subject: [PATCH 06/13] [openquantumhardware/qick_internal#43] created qick_dut and moved tproc blocks inside --- .../qick_testbench/qick_testbench.xpr | 10 +- .../qick_testbench/src/tb/qick_dut.sv | 553 ++++++++++++++++++ .../qick_testbench/src/tb/tb_qick.sv | 117 +--- .../qick_testbench/src/tb/tb_qick_behav.wcfg | 364 ++++++------ .../qick_testbench/src/tb/tb_qick_stimuli.svh | 36 +- .../qick_testbench/src/tb/tb_qick_tasks.svh | 6 +- 6 files changed, 796 insertions(+), 290 deletions(-) create mode 100644 firmware/testbench/qick_testbench/src/tb/qick_dut.sv diff --git a/firmware/testbench/qick_testbench/qick_testbench.xpr b/firmware/testbench/qick_testbench/qick_testbench.xpr index 5df1a5ee..74540fa0 100644 --- a/firmware/testbench/qick_testbench/qick_testbench.xpr +++ b/firmware/testbench/qick_testbench/qick_testbench.xpr @@ -61,7 +61,7 @@