From 80b3f22e20f106db8850b7507f0d5f6b89fa8dae Mon Sep 17 00:00:00 2001
From: Hardik Sharma <hardiksharma@meta.com>
Date: Wed, 25 Mar 2026 20:23:57 -0700
Subject: [PATCH] Add C++ unit tests for cadence::quantized_conv2d_nhwc
 (#18479)

Summary:
Pull Request resolved: https://github.com/pytorch/executorch/pull/18479

Add test_op_quantized_conv2d_nhwc.cpp covering 17 test combinations from the Python test_quantized_conv2d_nhwc_out. Tests cover Conv2d (4D NHWC) and Conv1d (3D NLC) variants including basic, stride, padding, and depthwise cases, using kernel registry dispatch.

Reviewed By: RahulC7

Differential Revision: D96507563
---
 .../generic/operators/op_quantized_conv2d.cpp | 34 +++++++++++++++++++
 .../generic/operators/op_quantized_conv2d.h   | 18 ++++++++++
 2 files changed, 52 insertions(+)

diff --git a/backends/cadence/generic/operators/op_quantized_conv2d.cpp b/backends/cadence/generic/operators/op_quantized_conv2d.cpp
index d12df8a46b4..e7b9bb7289b 100644
--- a/backends/cadence/generic/operators/op_quantized_conv2d.cpp
+++ b/backends/cadence/generic/operators/op_quantized_conv2d.cpp
@@ -953,6 +953,40 @@ Tensor& quantized_conv2d_nhwc_per_tensor_out(
   return out;
 }
 
+Tensor& quantized_conv2d_depthwise_nhwc_out(
+    ET_UNUSED KernelRuntimeContext& ctx,
+    const Tensor& input,
+    const Tensor& weight,
+    const Tensor& bias,
+    IntArrayRef stride,
+    IntArrayRef padding,
+    IntArrayRef dilation,
+    int64_t groups,
+    int64_t in_zero_point,
+    int64_t weight_zero_point,
+    double bias_scale,
+    double output_scale,
+    int64_t output_zero_point,
+    ET_UNUSED int64_t out_multiplier,
+    ET_UNUSED int64_t out_shift,
+    Tensor& out) {
+  quantized_conv2d_nhwc(
+      input,
+      weight,
+      bias,
+      stride,
+      padding,
+      dilation,
+      static_cast<int16_t>(groups),
+      static_cast<int32_t>(in_zero_point),
+      static_cast<int32_t>(weight_zero_point),
+      static_cast<float>(bias_scale),
+      static_cast<float>(output_scale),
+      static_cast<int32_t>(output_zero_point),
+      out);
+  return out;
+}
+
 Tensor& quantized_conv2d_nhwc_asym8sxsym8s_asym8s_per_tensor_out(
     ET_UNUSED KernelRuntimeContext& ctx,
     const Tensor& input,
diff --git a/backends/cadence/generic/operators/op_quantized_conv2d.h b/backends/cadence/generic/operators/op_quantized_conv2d.h
index 07678b0600c..d7ddb21ea4e 100644
--- a/backends/cadence/generic/operators/op_quantized_conv2d.h
+++ b/backends/cadence/generic/operators/op_quantized_conv2d.h
@@ -207,6 +207,24 @@ ::executorch::aten::Tensor& quantized_conv2d_nhwc_per_tensor_out(
     int64_t out_shift,
     Tensor& out);
 
+::executorch::aten::Tensor& quantized_conv2d_depthwise_nhwc_out(
+    KernelRuntimeContext& ctx,
+    const Tensor& input,
+    const Tensor& weight,
+    const Tensor& bias,
+    IntArrayRef stride,
+    IntArrayRef padding,
+    IntArrayRef dilation,
+    int64_t groups,
+    int64_t in_zero_point,
+    int64_t weight_zero_point,
+    double bias_scale,
+    double output_scale,
+    int64_t output_zero_point,
+    int64_t out_multiplier,
+    int64_t out_shift,
+    Tensor& out);
+
 ::executorch::aten::Tensor&
 quantized_conv2d_nhwc_asym8sxsym8s_asym8s_per_tensor_out(
     KernelRuntimeContext& ctx,