diff --git a/crates/core_arch/src/aarch64/neon/generated.rs b/crates/core_arch/src/aarch64/neon/generated.rs index 5a0bbfa095..d8ca95dc21 100644 --- a/crates/core_arch/src/aarch64/neon/generated.rs +++ b/crates/core_arch/src/aarch64/neon/generated.rs @@ -11769,7 +11769,7 @@ pub unsafe fn vld1q_p16(ptr: *const p16) -> poly16x8_t { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub unsafe fn vld1_p64(ptr: *const p64) -> poly64x1_t { @@ -11780,7 +11780,7 @@ pub unsafe fn vld1_p64(ptr: *const p64) -> poly64x1_t { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ldr))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub unsafe fn vld1q_p64(ptr: *const p64) -> poly64x2_t { @@ -11962,7 +11962,7 @@ pub unsafe fn vld2_lane_s64(a: *const i64, b: int64x1x2_t) -> i #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld2, LANE = 0))] #[rustc_legacy_const_generics(2)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -11989,7 +11989,7 @@ pub unsafe fn vld2_lane_u64(a: *const u64, b: uint64x1x2_t) -> #[doc = " * Neon intrinsic unsafe"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(ld2r))] pub unsafe fn vld2q_dup_p64(a: *const p64) -> poly64x2x2_t { @@ -12001,7 +12001,7 @@ pub unsafe fn vld2q_dup_p64(a: *const p64) -> poly64x2x2_t { #[doc = " * Neon intrinsic unsafe"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(ld2r))] pub unsafe fn vld2q_dup_p64(a: *const p64) -> poly64x2x2_t { @@ -12139,7 +12139,7 @@ pub unsafe fn vld2q_lane_s64(a: *const i64, b: int64x2x2_t) -> #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld2, LANE = 0))] #[rustc_legacy_const_generics(2)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12192,7 +12192,7 @@ pub unsafe fn vld2q_lane_p8(a: *const p8, b: poly8x16x2_t) -> p #[doc = " * Neon intrinsic unsafe"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(ld2))] pub unsafe fn vld2q_p64(a: *const p64) -> poly64x2x2_t { @@ -12204,7 +12204,7 @@ pub unsafe fn vld2q_p64(a: *const p64) -> poly64x2x2_t { #[doc = " * Neon intrinsic unsafe"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(ld2))] pub unsafe fn vld2q_p64(a: *const p64) -> poly64x2x2_t { @@ -12320,7 +12320,7 @@ pub unsafe fn vld3_lane_f64(a: *const f64, b: float64x1x3_t) -> #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld3, LANE = 0))] #[rustc_legacy_const_generics(2)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12373,7 +12373,7 @@ pub unsafe fn vld3_lane_u64(a: *const u64, b: uint64x1x3_t) -> #[doc = " * Neon intrinsic unsafe"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(ld3r))] pub unsafe fn vld3q_dup_p64(a: *const p64) -> poly64x2x3_t { @@ -12385,7 +12385,7 @@ pub unsafe fn vld3q_dup_p64(a: *const p64) -> poly64x2x3_t { #[doc = " * Neon intrinsic unsafe"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(ld3r))] pub unsafe fn vld3q_dup_p64(a: *const p64) -> poly64x2x3_t { @@ -12476,7 +12476,7 @@ pub unsafe fn vld3q_lane_f64(a: *const f64, b: float64x2x3_t) - #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld3, LANE = 0))] #[rustc_legacy_const_generics(2)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12581,7 +12581,7 @@ pub unsafe fn vld3q_lane_p8(a: *const p8, b: poly8x16x3_t) -> p #[doc = " * Neon intrinsic unsafe"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(ld3))] pub unsafe fn vld3q_p64(a: *const p64) -> poly64x2x3_t { @@ -12593,7 +12593,7 @@ pub unsafe fn vld3q_p64(a: *const p64) -> poly64x2x3_t { #[doc = " * Neon intrinsic unsafe"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(test, assert_instr(ld3))] pub unsafe fn vld3q_p64(a: *const p64) -> poly64x2x3_t { @@ -12738,7 +12738,7 @@ pub unsafe fn vld4_lane_s64(a: *const i64, b: int64x1x4_t) -> i #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4, LANE = 0))] #[rustc_legacy_const_generics(2)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12765,7 +12765,7 @@ pub unsafe fn vld4_lane_u64(a: *const u64, b: uint64x1x4_t) -> #[doc = " * Neon intrinsic unsafe"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4r))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub unsafe fn vld4q_dup_p64(a: *const p64) -> poly64x2x4_t { @@ -12777,7 +12777,7 @@ pub unsafe fn vld4q_dup_p64(a: *const p64) -> poly64x2x4_t { #[doc = " * Neon intrinsic unsafe"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4r))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub unsafe fn vld4q_dup_p64(a: *const p64) -> poly64x2x4_t { @@ -12925,7 +12925,7 @@ pub unsafe fn vld4q_lane_s64(a: *const i64, b: int64x2x4_t) -> #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(ld4, LANE = 0))] #[rustc_legacy_const_generics(2)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -12978,8 +12978,8 @@ pub unsafe fn vld4q_lane_p8(a: *const p8, b: poly8x16x4_t) -> p #[doc = " * Neon intrinsic unsafe"] #[inline] #[cfg(target_endian = "little")] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(ld4))] pub unsafe fn vld4q_p64(a: *const p64) -> poly64x2x4_t { transmute(vld4q_s64(transmute(a))) @@ -12990,8 +12990,8 @@ pub unsafe fn vld4q_p64(a: *const p64) -> poly64x2x4_t { #[doc = " * Neon intrinsic unsafe"] #[inline] #[cfg(target_endian = "big")] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(ld4))] pub unsafe fn vld4q_p64(a: *const p64) -> poly64x2x4_t { let mut ret_val: poly64x2x4_t = transmute(vld4q_s64(transmute(a))); @@ -15397,7 +15397,7 @@ pub fn vmull_high_p64(a: poly64x2_t, b: poly64x2_t) -> p128 { #[doc = "Polynomial multiply long"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmull_high_p8)"] #[inline] -#[target_feature(enable = "neon")] +#[target_feature(enable = "neon,aes")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] #[cfg_attr(all(test, target_endian = "little"), assert_instr(pmull2))] pub fn vmull_high_p8(a: poly8x16_t, b: poly8x16_t) -> poly16x8_t { @@ -23829,7 +23829,7 @@ pub fn vsliq_n_p16(a: poly16x8_t, b: poly16x8_t) -> poly16x8_t { #[doc = "Shift Left and Insert (immediate)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsli_n_p64)"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(sli, N = 1))] #[rustc_legacy_const_generics(2)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -23840,7 +23840,7 @@ pub fn vsli_n_p64(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t { #[doc = "Shift Left and Insert (immediate)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsliq_n_p64)"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(sli, N = 1))] #[rustc_legacy_const_generics(2)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -24489,7 +24489,7 @@ pub fn vsriq_n_p16(a: poly16x8_t, b: poly16x8_t) -> poly16x8_t { #[doc = "Shift Right and Insert (immediate)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsri_n_p64)"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(sri, N = 1))] #[rustc_legacy_const_generics(2)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -24500,7 +24500,7 @@ pub fn vsri_n_p64(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t { #[doc = "Shift Right and Insert (immediate)"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsriq_n_p64)"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(sri, N = 1))] #[rustc_legacy_const_generics(2)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -24849,7 +24849,7 @@ pub unsafe fn vst1q_p16(ptr: *mut p16, a: poly16x8_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] #[allow(clippy::cast_ptr_alignment)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -24861,7 +24861,7 @@ pub unsafe fn vst1_p64(ptr: *mut p64, a: poly64x1_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(str))] #[allow(clippy::cast_ptr_alignment)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -25070,7 +25070,7 @@ pub unsafe fn vst2_lane_s64(a: *mut i64, b: int64x1x2_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st2, LANE = 0))] #[rustc_legacy_const_generics(2)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -25178,7 +25178,7 @@ pub unsafe fn vst2q_lane_s64(a: *mut i64, b: int64x2x2_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st2, LANE = 0))] #[rustc_legacy_const_generics(2)] #[stable(feature = "neon_intrinsics", since = "1.59.0")] @@ -25230,7 +25230,7 @@ pub unsafe fn vst2q_lane_p8(a: *mut p8, b: poly8x16x2_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(test, assert_instr(st2))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub unsafe fn vst2q_p64(a: *mut p64, b: poly64x2x2_t) { @@ -25303,8 +25303,8 @@ pub unsafe fn vst3_lane_s64(a: *mut i64, b: int64x1x3_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(st3, LANE = 0))] #[rustc_legacy_const_generics(2)] pub unsafe fn vst3_lane_p64(a: *mut p64, b: poly64x1x3_t) { @@ -25411,8 +25411,8 @@ pub unsafe fn vst3q_lane_s64(a: *mut i64, b: int64x2x3_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(st3, LANE = 0))] #[rustc_legacy_const_generics(2)] pub unsafe fn vst3q_lane_p64(a: *mut p64, b: poly64x2x3_t) { @@ -25463,8 +25463,8 @@ pub unsafe fn vst3q_lane_p8(a: *mut p8, b: poly8x16x3_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(st3))] pub unsafe fn vst3q_p64(a: *mut p64, b: poly64x2x3_t) { vst3q_s64(transmute(a), transmute(b)) @@ -25550,8 +25550,8 @@ pub unsafe fn vst4_lane_s64(a: *mut i64, b: int64x1x4_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(st4, LANE = 0))] #[rustc_legacy_const_generics(2)] pub unsafe fn vst4_lane_p64(a: *mut p64, b: poly64x1x4_t) { @@ -25679,8 +25679,8 @@ pub unsafe fn vst4q_lane_s64(a: *mut i64, b: int64x2x4_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(st4, LANE = 0))] #[rustc_legacy_const_generics(2)] pub unsafe fn vst4q_lane_p64(a: *mut p64, b: poly64x2x4_t) { @@ -25731,8 +25731,8 @@ pub unsafe fn vst4q_lane_p8(a: *mut p8, b: poly8x16x4_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] -#[target_feature(enable = "neon,aes")] #[cfg_attr(test, assert_instr(st4))] pub unsafe fn vst4q_p64(a: *mut p64, b: poly64x2x4_t) { vst4q_s64(transmute(a), transmute(b)) diff --git a/crates/core_arch/src/arm_shared/neon/generated.rs b/crates/core_arch/src/arm_shared/neon/generated.rs index f24a12ad40..04ff9c3b9f 100644 --- a/crates/core_arch/src/arm_shared/neon/generated.rs +++ b/crates/core_arch/src/arm_shared/neon/generated.rs @@ -8618,7 +8618,7 @@ pub fn vcreate_p16(a: u64) -> poly16x4_t { #[doc = "Insert vector element from another vector element"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcreate_p64)"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -15357,7 +15357,7 @@ pub unsafe fn vld1q_dup_u8(ptr: *const u8) -> uint8x16_t { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vldr))] #[cfg_attr( @@ -15818,7 +15818,7 @@ pub unsafe fn vld1q_p16(ptr: *const p16) -> poly16x8_t { #[doc = " * Neon intrinsic unsafe"] #[inline] #[cfg(target_arch = "arm")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon,v7")] #[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.64"))] pub unsafe fn vld1q_p64(ptr: *const p64) -> poly64x2_t { @@ -16558,7 +16558,7 @@ pub unsafe fn vld1q_lane_u8(ptr: *const u8, src: uint8x16_t) -> #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[rustc_legacy_const_generics(2)] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vldr, LANE = 0))] @@ -16583,7 +16583,7 @@ pub unsafe fn vld1_lane_p64(ptr: *const p64, src: poly64x1_t) - #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[rustc_legacy_const_generics(2)] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vldr, LANE = 1))] @@ -16608,8 +16608,8 @@ pub unsafe fn vld1q_lane_p64(ptr: *const p64, src: poly64x2_t) #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg(target_arch = "arm")] -#[target_feature(enable = "neon,aes")] #[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vldr))] pub unsafe fn vld1_p64(ptr: *const p64) -> poly64x1_t { @@ -16626,7 +16626,7 @@ pub unsafe fn vld1_p64(ptr: *const p64) -> poly64x1_t { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld))] #[cfg_attr( @@ -16649,7 +16649,7 @@ pub unsafe fn vld1_p64_x2(a: *const p64) -> poly64x1x2_t { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -16672,7 +16672,7 @@ pub unsafe fn vld1_p64_x3(a: *const p64) -> poly64x1x3_t { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -16695,7 +16695,7 @@ pub unsafe fn vld1_p64_x4(a: *const p64) -> poly64x1x4_t { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -16718,7 +16718,7 @@ pub unsafe fn vld1q_p64_x2(a: *const p64) -> poly64x2x2_t { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -16741,7 +16741,7 @@ pub unsafe fn vld1q_p64_x3(a: *const p64) -> poly64x2x3_t { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -18406,7 +18406,7 @@ unsafe fn vld1q_v8f16(a: *const i8, b: i32) -> float16x8_t { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vldr))] #[cfg_attr( @@ -18796,7 +18796,7 @@ pub unsafe fn vld2q_dup_s32(a: *const i32) -> int32x4x2_t { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -20390,7 +20390,7 @@ pub unsafe fn vld2q_lane_p16(a: *const p16, b: poly16x8x2_t) -> #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -21086,7 +21086,7 @@ pub unsafe fn vld3q_dup_s32(a: *const i32) -> int32x4x3_t { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -22645,7 +22645,7 @@ pub unsafe fn vld3q_lane_p16(a: *const p16, b: poly16x8x3_t) -> #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -23355,7 +23355,7 @@ pub unsafe fn vld4_dup_s64(a: *const i64) -> int64x1x4_t { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -24969,8 +24969,8 @@ pub unsafe fn vld4q_lane_p16(a: *const p16, b: poly16x8x4_t) -> #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,aes")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), @@ -53038,7 +53038,7 @@ pub fn vreinterpretq_p8_p16(a: poly16x8_t) -> poly8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s8_p128)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53060,7 +53060,7 @@ pub fn vreinterpretq_s8_p128(a: p128) -> int8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s8_p128)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53089,7 +53089,7 @@ pub fn vreinterpretq_s8_p128(a: p128) -> int8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s16_p128)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53111,7 +53111,7 @@ pub fn vreinterpretq_s16_p128(a: p128) -> int16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s16_p128)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53136,7 +53136,7 @@ pub fn vreinterpretq_s16_p128(a: p128) -> int16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s32_p128)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53158,7 +53158,7 @@ pub fn vreinterpretq_s32_p128(a: p128) -> int32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s32_p128)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53183,7 +53183,7 @@ pub fn vreinterpretq_s32_p128(a: p128) -> int32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s64_p128)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53205,7 +53205,7 @@ pub fn vreinterpretq_s64_p128(a: p128) -> int64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s64_p128)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53230,7 +53230,7 @@ pub fn vreinterpretq_s64_p128(a: p128) -> int64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u8_p128)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53252,7 +53252,7 @@ pub fn vreinterpretq_u8_p128(a: p128) -> uint8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u8_p128)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53281,7 +53281,7 @@ pub fn vreinterpretq_u8_p128(a: p128) -> uint8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u16_p128)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53303,7 +53303,7 @@ pub fn vreinterpretq_u16_p128(a: p128) -> uint16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u16_p128)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53328,7 +53328,7 @@ pub fn vreinterpretq_u16_p128(a: p128) -> uint16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u32_p128)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53350,7 +53350,7 @@ pub fn vreinterpretq_u32_p128(a: p128) -> uint32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u32_p128)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53375,7 +53375,7 @@ pub fn vreinterpretq_u32_p128(a: p128) -> uint32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u64_p128)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53397,7 +53397,7 @@ pub fn vreinterpretq_u64_p128(a: p128) -> uint64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u64_p128)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53422,7 +53422,7 @@ pub fn vreinterpretq_u64_p128(a: p128) -> uint64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p8_p128)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53444,7 +53444,7 @@ pub fn vreinterpretq_p8_p128(a: p128) -> poly8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p8_p128)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53473,7 +53473,7 @@ pub fn vreinterpretq_p8_p128(a: p128) -> poly8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p16_p128)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53495,7 +53495,7 @@ pub fn vreinterpretq_p16_p128(a: p128) -> poly16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p16_p128)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53520,7 +53520,7 @@ pub fn vreinterpretq_p16_p128(a: p128) -> poly16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_p128)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53542,7 +53542,7 @@ pub fn vreinterpretq_p64_p128(a: p128) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_p128)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53567,7 +53567,7 @@ pub fn vreinterpretq_p64_p128(a: p128) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_s8)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53589,7 +53589,7 @@ pub fn vreinterpret_p64_s8(a: int8x8_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_s8)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53614,7 +53614,7 @@ pub fn vreinterpret_p64_s8(a: int8x8_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_s8)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53636,7 +53636,7 @@ pub fn vreinterpretq_p128_s8(a: int8x16_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_s8)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53662,7 +53662,7 @@ pub fn vreinterpretq_p128_s8(a: int8x16_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_s8)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53684,7 +53684,7 @@ pub fn vreinterpretq_p64_s8(a: int8x16_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_s8)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53711,7 +53711,7 @@ pub fn vreinterpretq_p64_s8(a: int8x16_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_s16)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53733,7 +53733,7 @@ pub fn vreinterpret_p64_s16(a: int16x4_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_s16)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53758,7 +53758,7 @@ pub fn vreinterpret_p64_s16(a: int16x4_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_s16)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53780,7 +53780,7 @@ pub fn vreinterpretq_p128_s16(a: int16x8_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_s16)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53805,7 +53805,7 @@ pub fn vreinterpretq_p128_s16(a: int16x8_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_s16)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53827,7 +53827,7 @@ pub fn vreinterpretq_p64_s16(a: int16x8_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_s16)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53853,7 +53853,7 @@ pub fn vreinterpretq_p64_s16(a: int16x8_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_s32)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53875,7 +53875,7 @@ pub fn vreinterpret_p64_s32(a: int32x2_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_s32)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53900,7 +53900,7 @@ pub fn vreinterpret_p64_s32(a: int32x2_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_s32)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53922,7 +53922,7 @@ pub fn vreinterpretq_p128_s32(a: int32x4_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_s32)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53947,7 +53947,7 @@ pub fn vreinterpretq_p128_s32(a: int32x4_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_s32)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53969,7 +53969,7 @@ pub fn vreinterpretq_p64_s32(a: int32x4_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_s32)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -53995,7 +53995,7 @@ pub fn vreinterpretq_p64_s32(a: int32x4_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_s64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54017,7 +54017,7 @@ pub fn vreinterpretq_p128_s64(a: int64x2_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_s64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54042,7 +54042,7 @@ pub fn vreinterpretq_p128_s64(a: int64x2_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_u8)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54064,7 +54064,7 @@ pub fn vreinterpret_p64_u8(a: uint8x8_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_u8)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54089,7 +54089,7 @@ pub fn vreinterpret_p64_u8(a: uint8x8_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_u8)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54111,7 +54111,7 @@ pub fn vreinterpretq_p128_u8(a: uint8x16_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_u8)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54137,7 +54137,7 @@ pub fn vreinterpretq_p128_u8(a: uint8x16_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_u8)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54159,7 +54159,7 @@ pub fn vreinterpretq_p64_u8(a: uint8x16_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_u8)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54186,7 +54186,7 @@ pub fn vreinterpretq_p64_u8(a: uint8x16_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_u16)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54208,7 +54208,7 @@ pub fn vreinterpret_p64_u16(a: uint16x4_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_u16)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54233,7 +54233,7 @@ pub fn vreinterpret_p64_u16(a: uint16x4_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_u16)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54255,7 +54255,7 @@ pub fn vreinterpretq_p128_u16(a: uint16x8_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_u16)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54280,7 +54280,7 @@ pub fn vreinterpretq_p128_u16(a: uint16x8_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_u16)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54302,7 +54302,7 @@ pub fn vreinterpretq_p64_u16(a: uint16x8_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_u16)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54328,7 +54328,7 @@ pub fn vreinterpretq_p64_u16(a: uint16x8_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_u32)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54350,7 +54350,7 @@ pub fn vreinterpret_p64_u32(a: uint32x2_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_u32)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54375,7 +54375,7 @@ pub fn vreinterpret_p64_u32(a: uint32x2_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_u32)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54397,7 +54397,7 @@ pub fn vreinterpretq_p128_u32(a: uint32x4_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_u32)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54422,7 +54422,7 @@ pub fn vreinterpretq_p128_u32(a: uint32x4_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_u32)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54444,7 +54444,7 @@ pub fn vreinterpretq_p64_u32(a: uint32x4_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_u32)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54470,7 +54470,7 @@ pub fn vreinterpretq_p64_u32(a: uint32x4_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_u64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54492,7 +54492,7 @@ pub fn vreinterpretq_p128_u64(a: uint64x2_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_u64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54517,7 +54517,7 @@ pub fn vreinterpretq_p128_u64(a: uint64x2_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_p8)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54539,7 +54539,7 @@ pub fn vreinterpret_p64_p8(a: poly8x8_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_p8)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54564,7 +54564,7 @@ pub fn vreinterpret_p64_p8(a: poly8x8_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_p8)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54586,7 +54586,7 @@ pub fn vreinterpretq_p128_p8(a: poly8x16_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_p8)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54612,7 +54612,7 @@ pub fn vreinterpretq_p128_p8(a: poly8x16_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_p8)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54634,7 +54634,7 @@ pub fn vreinterpretq_p64_p8(a: poly8x16_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_p8)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54661,7 +54661,7 @@ pub fn vreinterpretq_p64_p8(a: poly8x16_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_p16)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54683,7 +54683,7 @@ pub fn vreinterpret_p64_p16(a: poly16x4_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p64_p16)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54708,7 +54708,7 @@ pub fn vreinterpret_p64_p16(a: poly16x4_t) -> poly64x1_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_p16)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54730,7 +54730,7 @@ pub fn vreinterpretq_p128_p16(a: poly16x8_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_p16)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54755,7 +54755,7 @@ pub fn vreinterpretq_p128_p16(a: poly16x8_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_p16)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54777,7 +54777,7 @@ pub fn vreinterpretq_p64_p16(a: poly16x8_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p64_p16)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54803,7 +54803,7 @@ pub fn vreinterpretq_p64_p16(a: poly16x8_t) -> poly64x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s8_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54825,7 +54825,7 @@ pub fn vreinterpret_s8_p64(a: poly64x1_t) -> int8x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s8_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54850,7 +54850,7 @@ pub fn vreinterpret_s8_p64(a: poly64x1_t) -> int8x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s16_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54872,7 +54872,7 @@ pub fn vreinterpret_s16_p64(a: poly64x1_t) -> int16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s16_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54897,7 +54897,7 @@ pub fn vreinterpret_s16_p64(a: poly64x1_t) -> int16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s32_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54919,7 +54919,7 @@ pub fn vreinterpret_s32_p64(a: poly64x1_t) -> int32x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_s32_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54944,7 +54944,7 @@ pub fn vreinterpret_s32_p64(a: poly64x1_t) -> int32x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u8_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54966,7 +54966,7 @@ pub fn vreinterpret_u8_p64(a: poly64x1_t) -> uint8x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u8_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -54991,7 +54991,7 @@ pub fn vreinterpret_u8_p64(a: poly64x1_t) -> uint8x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u16_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55013,7 +55013,7 @@ pub fn vreinterpret_u16_p64(a: poly64x1_t) -> uint16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u16_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55038,7 +55038,7 @@ pub fn vreinterpret_u16_p64(a: poly64x1_t) -> uint16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u32_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55060,7 +55060,7 @@ pub fn vreinterpret_u32_p64(a: poly64x1_t) -> uint32x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_u32_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55085,7 +55085,7 @@ pub fn vreinterpret_u32_p64(a: poly64x1_t) -> uint32x2_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p8_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55107,7 +55107,7 @@ pub fn vreinterpret_p8_p64(a: poly64x1_t) -> poly8x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p8_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55132,7 +55132,7 @@ pub fn vreinterpret_p8_p64(a: poly64x1_t) -> poly8x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p16_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55154,7 +55154,7 @@ pub fn vreinterpret_p16_p64(a: poly64x1_t) -> poly16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_p16_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55179,7 +55179,7 @@ pub fn vreinterpret_p16_p64(a: poly64x1_t) -> poly16x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55201,7 +55201,7 @@ pub fn vreinterpretq_p128_p64(a: poly64x2_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p128_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55226,7 +55226,7 @@ pub fn vreinterpretq_p128_p64(a: poly64x2_t) -> p128 { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s8_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55248,7 +55248,7 @@ pub fn vreinterpretq_s8_p64(a: poly64x2_t) -> int8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s8_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55278,7 +55278,7 @@ pub fn vreinterpretq_s8_p64(a: poly64x2_t) -> int8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s16_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55300,7 +55300,7 @@ pub fn vreinterpretq_s16_p64(a: poly64x2_t) -> int16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s16_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55326,7 +55326,7 @@ pub fn vreinterpretq_s16_p64(a: poly64x2_t) -> int16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s32_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55348,7 +55348,7 @@ pub fn vreinterpretq_s32_p64(a: poly64x2_t) -> int32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_s32_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55374,7 +55374,7 @@ pub fn vreinterpretq_s32_p64(a: poly64x2_t) -> int32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u8_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55396,7 +55396,7 @@ pub fn vreinterpretq_u8_p64(a: poly64x2_t) -> uint8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u8_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55426,7 +55426,7 @@ pub fn vreinterpretq_u8_p64(a: poly64x2_t) -> uint8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u16_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55448,7 +55448,7 @@ pub fn vreinterpretq_u16_p64(a: poly64x2_t) -> uint16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u16_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55474,7 +55474,7 @@ pub fn vreinterpretq_u16_p64(a: poly64x2_t) -> uint16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u32_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55496,7 +55496,7 @@ pub fn vreinterpretq_u32_p64(a: poly64x2_t) -> uint32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_u32_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55522,7 +55522,7 @@ pub fn vreinterpretq_u32_p64(a: poly64x2_t) -> uint32x4_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p8_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55544,7 +55544,7 @@ pub fn vreinterpretq_p8_p64(a: poly64x2_t) -> poly8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p8_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55574,7 +55574,7 @@ pub fn vreinterpretq_p8_p64(a: poly64x2_t) -> poly8x16_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p16_p64)"] #[inline] #[cfg(target_endian = "little")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -55596,7 +55596,7 @@ pub fn vreinterpretq_p16_p64(a: poly64x2_t) -> poly16x8_t { #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_p16_p64)"] #[inline] #[cfg(target_endian = "big")] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -59279,7 +59279,7 @@ pub fn vsetq_lane_p16(a: p16, b: poly16x8_t) -> poly16x8_t { #[doc = "Insert vector element from another vector element"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vset_lane_p64)"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop, LANE = 0))] #[cfg_attr( @@ -59348,7 +59348,7 @@ pub fn vset_lane_u64(a: u64, b: uint64x1_t) -> uint64x1_t { #[doc = "Insert vector element from another vector element"] #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsetq_lane_p64)"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop, LANE = 0))] #[cfg_attr( @@ -63596,8 +63596,8 @@ pub unsafe fn vst1q_lane_p16(a: *mut p16, b: poly16x8_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,aes")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop, LANE = 0))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), @@ -63671,7 +63671,7 @@ pub unsafe fn vst1_lane_u64(a: *mut u64, b: uint64x1_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vst1))] #[cfg_attr( @@ -63694,7 +63694,7 @@ pub unsafe fn vst1_p64_x2(a: *mut p64, b: poly64x1x2_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -63717,7 +63717,7 @@ pub unsafe fn vst1_p64_x3(a: *mut p64, b: poly64x1x3_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -63740,7 +63740,7 @@ pub unsafe fn vst1_p64_x4(a: *mut p64, b: poly64x1x4_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -63763,7 +63763,7 @@ pub unsafe fn vst1q_p64_x2(a: *mut p64, b: poly64x2x2_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -63786,7 +63786,7 @@ pub unsafe fn vst1q_p64_x3(a: *mut p64, b: poly64x2x3_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] -#[target_feature(enable = "neon,aes")] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( @@ -65653,8 +65653,8 @@ unsafe fn vst1q_v8f16(addr: *const i8, val: float16x8_t, align: i32) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,aes")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop, LANE = 0))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), @@ -66543,8 +66543,8 @@ pub unsafe fn vst2q_lane_p16(a: *mut p16, b: poly16x8x2_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,aes")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), @@ -67732,8 +67732,8 @@ pub unsafe fn vst3q_lane_p16(a: *mut p16, b: poly16x8x3_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,aes")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), @@ -69088,8 +69088,8 @@ pub unsafe fn vst4q_lane_p16(a: *mut p16, b: poly16x8x4_t) { #[doc = "## Safety"] #[doc = " * Neon intrinsic unsafe"] #[inline] +#[target_feature(enable = "neon")] #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[target_feature(enable = "neon,aes")] #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] #[cfg_attr( all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), diff --git a/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml b/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml index 6950f69731..f37a396fc0 100644 --- a/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml +++ b/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml @@ -3596,7 +3596,6 @@ intrinsics: arguments: ["a: {type[0]}", "b: {neon_type[1]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [ld2, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - *neon-stable @@ -3650,7 +3649,6 @@ intrinsics: arguments: ["a: {type[0]}", "b: {neon_type[1]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [ld2, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - *neon-stable @@ -3733,7 +3731,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - *neon-stable assert_instr: [ld2] safety: @@ -3797,7 +3794,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{type[1]}" attr: - - *neon-aes - *neon-stable assert_instr: [ld2r] safety: @@ -3983,7 +3979,6 @@ intrinsics: arguments: ["a: {type[0]}", "b: {neon_type[1]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [ld3, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - *neon-stable @@ -4007,7 +4002,6 @@ intrinsics: arguments: ["a: {type[0]}", "b: {neon_type[1]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [ld3, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - *neon-stable @@ -4083,7 +4077,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - *neon-stable safety: unsafe: [neon] @@ -4145,7 +4138,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - *neon-stable assert_instr: [ld3r] safety: @@ -4222,7 +4214,6 @@ intrinsics: return_type: "{neon_type[1]}" attr: - *neon-stable - - *neon-aes assert_instr: [ld4] safety: unsafe: [neon] @@ -4331,7 +4322,6 @@ intrinsics: arguments: ["a: {type[0]}", "b: {neon_type[1]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [ld4, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - *neon-stable @@ -4379,9 +4369,6 @@ intrinsics: arguments: ["a: {type[0]}", "b: {neon_type[1]}"] return_type: "{neon_type[1]}" attr: - - FnCall: - - target_feature - - - 'enable = "neon,aes"' - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [ld4, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - *neon-stable @@ -4697,7 +4684,6 @@ intrinsics: doc: "Store multiple 2-element structures from two registers" arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - - *neon-aes - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [st2, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - *neon-stable @@ -4717,7 +4703,6 @@ intrinsics: doc: "Store multiple 2-element structures from two registers" arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - - *neon-aes - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [st2, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] - *neon-stable @@ -4737,7 +4722,6 @@ intrinsics: doc: "Store multiple 2-element structures from two registers" arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - - *neon-aes - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [st2]]}]] - *neon-stable safety: @@ -4767,7 +4751,6 @@ intrinsics: arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - *neon-stable - - *neon-aes - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [st3, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ['2']] static_defs: ['const LANE: i32'] @@ -4787,7 +4770,6 @@ intrinsics: arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - *neon-stable - - *neon-aes - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [st3, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ['2']] static_defs: ['const LANE: i32'] @@ -4807,7 +4789,6 @@ intrinsics: arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - *neon-stable - - *neon-aes assert_instr: [st3] safety: unsafe: [neon] @@ -4961,7 +4942,6 @@ intrinsics: arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - *neon-stable - - *neon-aes - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [st4, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ['2']] static_defs: ['const LANE: i32'] @@ -4981,7 +4961,6 @@ intrinsics: arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - *neon-stable - - *neon-aes - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [st4, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ['2']] static_defs: ['const LANE: i32'] @@ -5001,7 +4980,6 @@ intrinsics: arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - *neon-stable - - *neon-aes assert_instr: [st4] safety: unsafe: [neon] @@ -5224,6 +5202,7 @@ intrinsics: arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"] return_type: "{neon_type[3]}" attr: + - *neon-aes - *neon-stable - FnCall: [cfg_attr, [*all-test-little-endian, {FnCall: [assert_instr, [pmull2]]}]] safety: safe @@ -12245,7 +12224,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{neon_type[1]}" attr: - - FnCall: [target_feature, ['enable = "neon,aes"']] - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [ld4r]]}]] - *neon-stable safety: @@ -13128,8 +13106,8 @@ intrinsics: - ['*const p8', poly8x16_t, "neon"] - ['*const p16', poly16x4_t, "neon"] - ['*const p16', poly16x8_t, "neon"] - - ['*const p64', poly64x1_t, "neon,aes"] - - ['*const p64', poly64x2_t, "neon,aes"] + - ['*const p64', poly64x1_t, "neon"] + - ['*const p64', poly64x2_t, "neon"] - ['*const f32', float32x2_t, "neon"] - ['*const f32', float32x4_t, "neon"] - ['*const f64', float64x1_t, "neon"] @@ -13195,8 +13173,8 @@ intrinsics: - ['*mut p8', poly8x16_t, "neon"] - ['*mut p16', poly16x4_t, "neon"] - ['*mut p16', poly16x8_t, "neon"] - - ['*mut p64', poly64x1_t, "neon,aes"] - - ['*mut p64', poly64x2_t, "neon,aes"] + - ['*mut p64', poly64x1_t, "neon"] + - ['*mut p64', poly64x2_t, "neon"] - ['*mut f32', float32x2_t, "neon"] - ['*mut f32', float32x4_t, "neon"] - ['*mut f64', float64x1_t, "neon"] @@ -13821,8 +13799,8 @@ intrinsics: - [poly8x16_t, int8x16_t, 'static_assert_uimm_bits!', 'N, 3', "neon"] - [poly16x4_t, int16x4_t, 'static_assert_uimm_bits!', 'N, 4', "neon"] - [poly16x8_t, int16x8_t, 'static_assert_uimm_bits!', 'N, 4', "neon"] - - [poly64x1_t, int64x1_t, 'static_assert!', 'N >= 0 && N <= 63', "neon,aes"] - - [poly64x2_t, int64x2_t, 'static_assert!', 'N >= 0 && N <= 63', "neon,aes"] + - [poly64x1_t, int64x1_t, 'static_assert!', 'N >= 0 && N <= 63', "neon"] + - [poly64x2_t, int64x2_t, 'static_assert!', 'N >= 0 && N <= 63', "neon"] compose: - FnCall: ['{type[2]}', ['{type[3]}']] - FnCall: @@ -13883,8 +13861,8 @@ intrinsics: - [poly8x16_t, int8x16_t, 'N >= 1 && N <= 8', "neon"] - [poly16x4_t, int16x4_t, 'N >= 1 && N <= 16', "neon"] - [poly16x8_t, int16x8_t, 'N >= 1 && N <= 16', "neon"] - - [poly64x1_t, int64x1_t, 'N >= 1 && N <= 64', "neon,aes"] - - [poly64x2_t, int64x2_t, 'N >= 1 && N <= 64', "neon,aes"] + - [poly64x1_t, int64x1_t, 'N >= 1 && N <= 64', "neon"] + - [poly64x2_t, int64x2_t, 'N >= 1 && N <= 64', "neon"] compose: - FnCall: ['static_assert!', ['{type[2]}']] - FnCall: diff --git a/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml b/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml index 68c92aa54d..81852531b6 100644 --- a/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml +++ b/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml @@ -2738,7 +2738,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld]]}]] @@ -2766,7 +2765,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld]]}]] @@ -3030,7 +3028,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]] @@ -3377,7 +3374,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld2r]]}]] @@ -4177,7 +4173,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]] @@ -4333,7 +4328,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld3r]]}]] @@ -4546,9 +4540,6 @@ intrinsics: return_type: "{neon_type[1]}" attr: - *neon-v8 - - FnCall: - - target_feature - - - 'enable = "neon,aes"' - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]] - *neon-not-arm-stable @@ -4668,9 +4659,6 @@ intrinsics: unsafe: [neon] attr: - *neon-v8 - - FnCall: - - target_feature - - - 'enable = "neon,aes"' - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] @@ -4693,9 +4681,6 @@ intrinsics: unsafe: [neon] attr: - *neon-v8 - - FnCall: - - target_feature - - - 'enable = "neon,aes"' - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]] - FnCall: [rustc_legacy_const_generics, ["2"]] @@ -5027,7 +5012,6 @@ intrinsics: arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - *neon-v8 - - *neon-aes - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]] - *neon-not-arm-stable @@ -5410,7 +5394,6 @@ intrinsics: arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - *neon-v8 - - *neon-aes - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]] - *neon-not-arm-stable @@ -5759,7 +5742,6 @@ intrinsics: arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"] attr: - *neon-v8 - - *neon-aes - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]] - *neon-not-arm-stable @@ -8484,7 +8466,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{type[1]}" attr: - - *neon-aes - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]] @@ -9213,7 +9194,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]] @@ -9311,7 +9291,6 @@ intrinsics: arguments: ["a: {type[0]}", "b: {neon_type[1]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]] @@ -9331,7 +9310,6 @@ intrinsics: arguments: ["a: {type[0]}", "b: {neon_type[1]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]] @@ -10109,7 +10087,6 @@ intrinsics: doc: "Store multiple single-element structures to one, two, three, or four registers" arguments: ["a: {type[0]}", "b: {neon_type[1]}"] attr: - - *neon-aes - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vst1]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [st1]]}]] @@ -10129,7 +10106,6 @@ intrinsics: doc: "Store multiple single-element structures to one, two, three, or four registers" arguments: ["a: {type[0]}", "b: {neon_type[1]}"] attr: - - *neon-aes - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [st1]]}]] @@ -11851,7 +11827,6 @@ intrinsics: arguments: ["a: {type[0]}"] return_type: "{neon_type[1]}" attr: - - *neon-aes - *neon-v8 - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld4r]]}]] @@ -11978,7 +11953,7 @@ intrinsics: - ['*const p8', poly8x16_t, '"vld1.8"', 'neon,v7', 'crate::mem::align_of::()', 'q_v16i8'] - ['*const p16', poly16x4_t, '"vld1.16"', 'neon,v7', 'crate::mem::align_of::()', '_v4i16' ] - ['*const p16', poly16x8_t, '"vld1.16"', 'neon,v7', 'crate::mem::align_of::()', 'q_v8i16'] - - ['*const p64', poly64x2_t, '"vld1.64"', 'neon,aes', 'crate::mem::align_of::()', 'q_v2i64'] + - ['*const p64', poly64x2_t, '"vld1.64"', 'neon,v7', 'crate::mem::align_of::()', 'q_v2i64'] - ['*const f32', float32x2_t, 'vldr', 'neon,v7', 'crate::mem::align_of::()', '_v2f32' ] - ['*const f32', float32x4_t, '"vld1.32"', 'neon,v7', 'crate::mem::align_of::()', 'q_v4f32'] compose: @@ -12025,7 +12000,6 @@ intrinsics: unsafe: [neon] attr: - *target-is-arm - - *neon-aes - *neon-arm-unstable - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['vldr']]}]] types: @@ -14234,7 +14208,6 @@ intrinsics: arguments: ["ptr: {type[1]}", "src: {neon_type[2]}"] return_type: "{neon_type[2]}" attr: - - *neon-aes - *neon-v7 - FnCall: [rustc_legacy_const_generics, ['2']] - FnCall: [cfg_attr, [*test-is-arm, { FnCall: [assert_instr, ["{type[3]}", 'LANE = {type[4]}']] } ]] @@ -14275,7 +14248,6 @@ intrinsics: arguments: ["ptr: {type[1]}"] return_type: "{neon_type[2]}" attr: - - *neon-aes - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, { FnCall: [assert_instr, ["{type[3]}"]] } ]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, { FnCall: [assert_instr, ['{type[4]}']]}] ] @@ -14294,7 +14266,6 @@ intrinsics: arguments: ["ptr: {type[1]}"] return_type: "{neon_type[2]}" attr: - - *neon-aes - *neon-v7 - FnCall: [cfg_attr, [*test-is-arm, { FnCall: [assert_instr, ["{type[3]}"]] } ]] - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, { FnCall: [assert_instr, ['{type[4]}']]}] ]