Check if CoreDSL typing rules are properly implemented

[PhilippvK]

Our outdated CDSL files use explicit sign extends before multiplication to get a 64-bit results of a 32-bit times 32-bit multiplication in the generated C JIT code:

        MULH {
            encoding: 7'b0000001 :: rs2[4:0] :: rs1[4:0] :: 3'b001 :: rd[4:0] :: 7'b0110011;
            assembly:"{name(rd)}, {name(rs1)}, {name(rs2)}";
            behavior: {
                if ((rd % RFS) != 0) {
                    signed<MUL_LEN> res = (signed<MUL_LEN>)(signed)X[rs1 % RFS] * (signed<MUL_LEN>)(signed)X[rs2 % RFS];
                    X[rd % RFS] = (unsigned<XLEN>)(res >> XLEN);
                }
            }
        }

Issues:

• By the coredsl spec the wideing multiplication should be implicit and not a part of the input CDSL code.
• This would lead to a 128-bit intermediate product which is then implicitly truncated to 64-bits (which is not allowed, see Print some Warnings #50)

After #71 was merged to annotate the inferred types to the metamodel classes, we should make sure that the ETISS writer and potentially other backends are using those types instead of relying on the JIT compiler or changing the input.

[PhilippvK]

@jokap11 FYI