Broken Type Inference for Zcmp description

[PhilippvK]

Input CDSL (https://github.com/Minres/RISCV_ISA_CoreDSL/blob/develop/Zc.core_desc#L509):

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InstructionSet Zcmp extends RVI {
    functions {
        unsigned int stack_adjust32(unsigned<4> rlist) {
                if (rlist==15) 
                    return 64;
                else 
                    return rlist/4*16;
        }
        void load_regs32(unsigned<4> rlist, unsigned<XLEN> addr) {
            unsigned<XLEN> incr = 4;
            if(rlist>14) {
                 addr -= incr;
                 X[27] = MEM[addr+3:addr];
                 addr -= incr;
                 X[26] = MEM[addr+3:addr];
            }
            if(rlist>13) {
                 addr -= incr;
                 X[25] = MEM[addr+3:addr];
            }
            if(rlist>12) {
                 addr -= incr;
                 X[24] = MEM[addr+3:addr];
            }
            if(rlist>11) {
                 addr -= incr;
                 X[23] = MEM[addr+3:addr];
            }
            if(rlist>10) {
                 addr -= incr;
                 X[22] = MEM[addr+3:addr];
            }
            if(rlist>9) {
                 addr -= incr;
                 X[21] = MEM[addr+3:addr];
            }
            if(rlist>8) {
                 addr -= incr;
                 X[20] = MEM[addr+3:addr];
            }
            if(rlist>7) {
                 addr -= incr;
                 X[19] = MEM[addr+3:addr];
            }
            if(rlist>6) {
                 addr -= incr;
                 X[18] = MEM[addr+3:addr];
            }
            if(rlist>5) {
                 addr -= incr;
                 X[9] = MEM[addr+3:addr];
            }
            if(rlist>4) {
                 addr -= incr;
                 X[8] = MEM[addr+3:addr];
            }
            if(rlist>3) {
                 addr -= incr;
                 X[1] = MEM[addr+3:addr];
            }
        }

        unsigned int stack_adjust64(unsigned<4> rlist) {
                if (rlist==15) 
                    return 112;
                else
                    return (unsigned)(rlist/2-1)*16;
        }
        void load_regs64(unsigned<4> rlist, unsigned<XLEN> addr) {
                if(rlist>14) {
                     addr-=8;
                     X[27] = (unsigned<XLEN>)MEM[addr+7:addr];
                     addr-=8;
                     X[26] = (unsigned<XLEN>)MEM[addr+7:addr];
                }
                if(rlist>13) {
                     addr-=8;
                     X[25] = (unsigned<XLEN>)MEM[addr+7:addr];
                }
                if(rlist>12) {
                     addr-=8;
                     X[24] = (unsigned<XLEN>)MEM[addr+7:addr];
                }
                if(rlist>11) {
                     addr-=8;
                     X[23] = (unsigned<XLEN>)MEM[addr+7:addr];
                }
                if(rlist>10) {
                     addr-=8;
                     X[22] = (unsigned<XLEN>)MEM[addr+7:addr];
                }
                if(rlist>9) {
                     addr-=8;
                     X[21] = (unsigned<XLEN>)MEM[addr+7:addr];
                }
                if(rlist>8) {
                     addr-=8;
                     X[20] = (unsigned<XLEN>)MEM[addr+7:addr];
                }
                if(rlist>7) {
                     addr-=8;
                     X[19] = (unsigned<XLEN>)MEM[addr+7:addr];
                }
                if(rlist>6) {
                     addr-=8;
                     X[18] = (unsigned<XLEN>)MEM[addr+7:addr];
                }
                if(rlist>5) {
                     addr-=8;
                     X[9] = (unsigned<XLEN>)MEM[addr+7:addr];
                }
                if(rlist>4) {
                     addr-=8;
                     X[8] = (unsigned<XLEN>)MEM[addr+7:addr];
                }
                if(rlist>3) {
                     addr-=8;
                     X[1] = (unsigned<XLEN>)MEM[addr+7:addr];
                }
        }
    }
    instructions {
        CM__PUSH [[enable=XLEN==32]]{
            encoding: 3'b101 :: 5'b11000 :: rlist[3:0] :: spimm[5:4] :: 2'b10;
            assembly: "{rlist}, {spimm}";
            behavior: if(rlist<4 || (RFS==16 && rlist>6)) raise(0, RV_CAUSE_ILLEGAL_INSTRUCTION);
            	else {
	                unsigned int bytes = 4;
	                unsigned int stack_adj_base = stack_adjust32(rlist);
	                unsigned<XLEN> addr = X[2];
	                if(rlist>14) {
	                     addr-=bytes;
	                     MEM[addr+3:addr] = (unsigned<32>)X[27];
	                     addr-=bytes;
	                     MEM[addr+3:addr] = (unsigned<32>)X[26];
	                }
	                if(rlist>13) {
	                     addr-=bytes;
	                     MEM[addr+3:addr] = (unsigned<32>)X[25];
	                }
	                if(rlist>12) {
	                     addr-=bytes;
	                     MEM[addr+3:addr] = (unsigned<32>)X[24];
	                }
	                if(rlist>11) {
	                     addr-=bytes;
	                     MEM[addr+3:addr] = (unsigned<32>)X[23];
	                }
	                if(rlist>10) {
	                     addr-=bytes;
	                     MEM[addr+3:addr] = (unsigned<32>)X[22];
	                }
	                if(rlist>9) {
	                     addr-=bytes;
	                     MEM[addr+3:addr] = (unsigned<32>)X[21];
	                }
	                if(rlist>8) {
	                     addr-=bytes;
	                     MEM[addr+3:addr] = (unsigned<32>)X[20];
	                }
	                if(rlist>7) {
	                     addr-=bytes;
	                     MEM[addr+3:addr] = (unsigned<32>)X[19];
	                }
	                if(rlist>6) {
	                     addr-=bytes;
	                     MEM[addr+3:addr] = (unsigned<32>)X[18];
	                }
	                if(rlist>5) {
	                     addr-=bytes;
	                     MEM[addr+3:addr] = (unsigned<32>)X[9];
	                }
	                if(rlist>4) {
	                     addr-=bytes;
	                     MEM[addr+3:addr] = (unsigned<32>)X[8];
	                }
	                if(rlist>3) {
	                     addr-=bytes;
	                     MEM[addr+3:addr] = (unsigned<32>)X[1];
	                }
	                X[2] -= (unsigned<XLEN>)(stack_adj_base + spimm);
	            }
        }
        CM__PUSH [[enable=XLEN==64]]{
            encoding: 3'b101 :: 5'b11000 :: rlist[3:0] :: spimm[5:4] :: 2'b10;
            assembly: "{rlist}, {spimm}";
            behavior: if(rlist<4 || (RFS==16 && rlist>6)) raise(0, RV_CAUSE_ILLEGAL_INSTRUCTION);
            	else {
	                unsigned int stack_adj_base = stack_adjust64(rlist);
	                unsigned<XLEN> addr = X[2];
	                if(rlist>14) {
	                     addr-=8;
	                     MEM[addr+7:addr] = X[27];
	                     addr-=8;
	                     MEM[addr+7:addr] = X[26];
	                }
	                if(rlist>13) {
	                     addr-=8;
	                     MEM[addr+7:addr] = X[25];
	                }
	                if(rlist>12) {
	                     addr-=8;
	                     MEM[addr+7:addr] = X[24];
	                }
	                if(rlist>11) {
	                     addr-=8;
	                     MEM[addr+7:addr] = X[23];
	                }
	                if(rlist>10) {
	                     addr-=8;
	                     MEM[addr+7:addr] = X[22];
	                }
	                if(rlist>9) {
	                     addr-=8;
	                     MEM[addr+7:addr] = X[21];
	                }
	                if(rlist>8) {
	                     addr-=8;
	                     MEM[addr+7:addr] = X[20];
	                }
	                if(rlist>7) {
	                     addr-=8;
	                     MEM[addr+7:addr] = X[19];
	                }
	                if(rlist>6) {
	                     addr-=8;
	                     MEM[addr+7:addr] = X[18];
	                }
	                if(rlist>5) {
	                     addr-=8;
	                     MEM[addr+7:addr] = X[9];
	                }
	                if(rlist>4) {
	                     addr-=8;
	                     MEM[addr+7:addr] = X[8];
	                }
	                if(rlist>3) {
	                     addr-=8;
	                     MEM[addr+7:addr] = X[1];
	                }
	                X[2] -= (unsigned<XLEN>)(stack_adj_base + spimm);
	            }
        }
        CM__POP [[enable=XLEN==32]]{
            encoding: 3'b101 :: 5'b11010 :: rlist[3:0] :: spimm[5:4] :: 2'b10;
            assembly: "{rlist}, {spimm}";
            behavior: if(rlist<4 || (RFS==16 && rlist>6)) raise(0, RV_CAUSE_ILLEGAL_INSTRUCTION);
                else {
	                unsigned int bytes = 4;
	                unsigned int stack_adj_base = stack_adjust32(rlist);
	                unsigned<XLEN> new_sp = (unsigned<XLEN>)(X[2] + (unsigned<XLEN>)(stack_adj_base + spimm));
	                load_regs32(rlist, new_sp);
	                X[2] = new_sp;
	            }
        }
        CM__POP [[enable=XLEN==64]]{
            encoding: 3'b101 :: 5'b11010 :: rlist[3:0] :: spimm[5:4] :: 2'b10;
            assembly: "{rlist}, {spimm}";
            behavior: if(rlist<4 || (RFS==16 && rlist>6)) raise(0, RV_CAUSE_ILLEGAL_INSTRUCTION);
                else {
	                unsigned int bytes = 4;
	                unsigned int stack_adj_base = stack_adjust64(rlist);
	                unsigned<XLEN> new_sp = (unsigned<XLEN>)(X[2] + (unsigned<XLEN>)(stack_adj_base + spimm));
	                load_regs64(rlist, new_sp);
	                X[2] = new_sp;
	            }
        }
        CM__POPRETZ [[enable=XLEN==32]]{
            encoding: 3'b101 :: 5'b11100 :: rlist[3:0] :: spimm[5:4] :: 2'b10;
            assembly: "{rlist}, {spimm}";
            behavior: if(rlist<4 || (RFS==16 && rlist>6)) raise(0, RV_CAUSE_ILLEGAL_INSTRUCTION);
	            else {
	                unsigned int bytes = 4;
	                unsigned int stack_adj_base = stack_adjust32(rlist);
	                unsigned<XLEN> new_sp = (unsigned<XLEN>)(X[2] + (unsigned<XLEN>)(stack_adj_base + spimm));
	                load_regs32(rlist, new_sp);
	                X[10] = 0;
	                X[2] = new_sp;
	                PC = X[1] & ~0x1;
	            }
            
        }
        CM__POPRETZ [[enable=XLEN==64]]{
            encoding: 3'b101 :: 5'b11100 :: rlist[3:0] :: spimm[5:4] :: 2'b10;
            assembly: "{rlist}, {spimm}";
            behavior: if(rlist<4 || (RFS==16 && rlist>6)) raise(0, RV_CAUSE_ILLEGAL_INSTRUCTION);
                else {
	                unsigned int bytes = 4;
	                unsigned int stack_adj_base = stack_adjust64(rlist);
	                unsigned<XLEN> new_sp = (unsigned<XLEN>)(X[2] + (unsigned<XLEN>)(stack_adj_base + spimm));
	                load_regs64(rlist, new_sp);
	                X[10]=0;
	                X[2] = new_sp;
	                PC = X[1] & ~0x1;                
                }
        }
        CM__POPRET [[enable=XLEN==32]]{
            encoding: 3'b101 :: 5'b11110 :: rlist[3:0] :: spimm[5:4] :: 2'b10;
            assembly: "{rlist}, {spimm}";
            behavior: if(rlist<4 || (RFS==16 && rlist>6)) raise(0, RV_CAUSE_ILLEGAL_INSTRUCTION);
                else {
	                unsigned int bytes = 4;
	                unsigned int stack_adj_base = stack_adjust32(rlist);
	                unsigned<XLEN> new_sp = (unsigned<XLEN>)(X[2] + (unsigned<XLEN>)(stack_adj_base + spimm));
	                load_regs32(rlist, new_sp);
	                X[2] = new_sp;
	                PC = X[1] & ~0x1;
                }
        }
        CM__POPRET [[enable=XLEN==64]]{
            encoding: 3'b101 :: 5'b11110 :: rlist[3:0] :: spimm[5:4] :: 2'b10;
            assembly: "{rlist}, {spimm}";
            behavior: if(rlist<4 || (RFS==16 && rlist>6)) raise(0, RV_CAUSE_ILLEGAL_INSTRUCTION);
                else {
	                unsigned int bytes = 4;
	                unsigned int stack_adj_base = stack_adjust64(rlist);
	                unsigned<XLEN> new_sp = (unsigned<XLEN>)(X[2] + (unsigned<XLEN>)(stack_adj_base + spimm));
	                load_regs64(rlist, new_sp);
	                X[2] = new_sp;
	                PC = X[1] & ~0x1;
                }
        }
        CM__MVSA01 {
            encoding: 3'b101 :: 3'b011 :: r1s[2:0] :: 2'b01 :: r2s[2:0] :: 2'b10;
            assembly: "{name(8+r1s)}, {name(8+r2s)}";
            behavior: {
                if(r1s==r2s || (RFS<32 && (r1s>1 || r2s>1)))
                    raise(0, RV_CAUSE_ILLEGAL_INSTRUCTION);
                else {
                    if(r1s<2)
                        X[r1s+8] = X[10];
                    else
                        X[r1s+16] = X[10];
                    if(r2s<2)
                        X[r2s+8] = X[11];
                    else
                        X[r2s+16] = X[11];
                }
            }
        }
        CM__MVA01S {
            encoding: 3'b101 :: 3'b011 :: r1s[2:0] :: 2'b11 :: r2s[2:0] :: 2'b10;
            assembly: "{name(8+r1s)}, {name(8+r2s)}";
            behavior: {
                if(RFS<32 && (r1s>1 || r2s>1))
                    raise(0, RV_CAUSE_ILLEGAL_INSTRUCTION);
                else {
                    X[10] = r1s<2? X[r1s+8] : X[r1s+16];
                    X[11] = r2s<2? X[r2s+8] : X[r2s+16];
                }
            }
        }
    }
}

Needs to be further investigated:

Traceback (most recent call last):
  File "/nfs/TUEIEDAscratch/ga87puy/work/cpython_v3.10_nodbgopt/install/lib/python3.10/runpy.py", line 196, in _run_module_as_main
    return _run_code(code, main_globals, None,
  File "/nfs/TUEIEDAscratch/ga87puy/work/cpython_v3.10_nodbgopt/install/lib/python3.10/runpy.py", line 86, in _run_code
    exec(code, run_globals)
  File "/work/git/m2isar/m2isar_new/M2-ISA-R/m2isar/backends/etiss/writer.py", line 192, in <module>
    main()
  File "/work/git/m2isar/m2isar_new/M2-ISA-R/m2isar/backends/etiss/writer.py", line 184, in main
    write_functions(core, start_time, output_path, args.static_scalars, args.coverage)
  File "/work/git/m2isar/m2isar_new/M2-ISA-R/m2isar/backends/etiss/instruction_writer.py", line 66, in write_functions
    for fn_name, templ_str in generate_functions(core, static_scalars, False, generate_coverage):
  File "/work/git/m2isar/m2isar_new/M2-ISA-R/m2isar/backends/etiss/instruction_generator.py", line 59, in generate_functions
    out_code = visitor.generate(fn_def.operation, context)
  File "/nfs/TUEIEDAscratch/ga87puy/work/cpython_v3.10_nodbgopt/install/lib/python3.10/functools.py", line 926, in _method
    return method.__get__(obj, cls)(*args, **kwargs)
  File "/work/git/m2isar/m2isar_new/M2-ISA-R/m2isar/backends/etiss/instruction_transform.py", line 48, in _
    c = self.generate(stmt, context)
  File "/nfs/TUEIEDAscratch/ga87puy/work/cpython_v3.10_nodbgopt/install/lib/python3.10/functools.py", line 926, in _method
    return method.__get__(obj, cls)(*args, **kwargs)
  File "/work/git/m2isar/m2isar_new/M2-ISA-R/m2isar/backends/etiss/instruction_transform.py", line 150, in _
    stmts = [self.generate(stmt, context) for stmt in expr.statements]
  File "/work/git/m2isar/m2isar_new/M2-ISA-R/m2isar/backends/etiss/instruction_transform.py", line 150, in <listcomp>
    stmts = [self.generate(stmt, context) for stmt in expr.statements]
  File "/nfs/TUEIEDAscratch/ga87puy/work/cpython_v3.10_nodbgopt/install/lib/python3.10/functools.py", line 926, in _method
    return method.__get__(obj, cls)(*args, **kwargs)
  File "/work/git/m2isar/m2isar_new/M2-ISA-R/m2isar/backends/etiss/instruction_transform.py", line 451, in _
    ret = self.generate(stmt, context)
  File "/nfs/TUEIEDAscratch/ga87puy/work/cpython_v3.10_nodbgopt/install/lib/python3.10/functools.py", line 926, in _method
    return method.__get__(obj, cls)(*args, **kwargs)
  File "/work/git/m2isar/m2isar_new/M2-ISA-R/m2isar/backends/etiss/instruction_transform.py", line 150, in _
    stmts = [self.generate(stmt, context) for stmt in expr.statements]
  File "/work/git/m2isar/m2isar_new/M2-ISA-R/m2isar/backends/etiss/instruction_transform.py", line 150, in <listcomp>
    stmts = [self.generate(stmt, context) for stmt in expr.statements]
  File "/nfs/TUEIEDAscratch/ga87puy/work/cpython_v3.10_nodbgopt/install/lib/python3.10/functools.py", line 926, in _method
    return method.__get__(obj, cls)(*args, **kwargs)
  File "/work/git/m2isar/m2isar_new/M2-ISA-R/m2isar/backends/etiss/instruction_transform.py", line 330, in _
    expr_str: CodeString = self.generate(expr.expr, context)
  File "/nfs/TUEIEDAscratch/ga87puy/work/cpython_v3.10_nodbgopt/install/lib/python3.10/functools.py", line 926, in _method
    return method.__get__(obj, cls)(*args, **kwargs)
  File "/work/git/m2isar/m2isar_new/M2-ISA-R/m2isar/backends/etiss/instruction_transform.py", line 699, in _
    size = expr.inferred_type._width
AttributeError: 'NoneType' object has no attribute '_width'