From ec4f3e74b256da558ed59450dfdb6cb7e94efa78 Mon Sep 17 00:00:00 2001 From: Philipp van Kempen Date: Fri, 19 May 2023 08:40:24 +0200 Subject: [PATCH 1/9] coredsl2 frontend: remove old args_disass syntax from grammar --- m2isar/frontends/coredsl2/CoreDSL2.g4 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/m2isar/frontends/coredsl2/CoreDSL2.g4 b/m2isar/frontends/coredsl2/CoreDSL2.g4 index ada0af86..d0582719 100644 --- a/m2isar/frontends/coredsl2/CoreDSL2.g4 +++ b/m2isar/frontends/coredsl2/CoreDSL2.g4 @@ -36,7 +36,7 @@ always_block instruction : name=IDENTIFIER attributes+=attribute* '{' 'encoding' ':' encoding+=encoding_entry ('::' encoding+=encoding_entry)*';' - (('args_disass' | 'assembly') ':' disass=STRING ';')? + ('assembly' ':' disass=STRING ';')? 'behavior' ':' behavior=statement '}' ; From dc08a0c20073227dda068fc9352d58e275e9cc15 Mon Sep 17 00:00:00 2001 From: Philipp van Kempen Date: Fri, 19 May 2023 08:41:23 +0200 Subject: [PATCH 2/9] coredsl2 frontend: update grammar to support specifying mnemonic --- m2isar/frontends/coredsl2/CoreDSL2.g4 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/m2isar/frontends/coredsl2/CoreDSL2.g4 b/m2isar/frontends/coredsl2/CoreDSL2.g4 index d0582719..22ae5180 100644 --- a/m2isar/frontends/coredsl2/CoreDSL2.g4 +++ b/m2isar/frontends/coredsl2/CoreDSL2.g4 @@ -36,7 +36,7 @@ always_block instruction : name=IDENTIFIER attributes+=attribute* '{' 'encoding' ':' encoding+=encoding_entry ('::' encoding+=encoding_entry)*';' - ('assembly' ':' disass=STRING ';')? + ('assembly' ':' (assembly=STRING | '{' mnemonic=STRING ',' assembly=STRING '}') ';')? 'behavior' ':' behavior=statement '}' ; From 688a8c070d1703c241eeb770cf8930fb2caf768f Mon Sep 17 00:00:00 2001 From: Philipp van Kempen Date: Fri, 19 May 2023 08:44:54 +0200 Subject: [PATCH 3/9] rename disass to assembly --- m2isar/backends/viewer/viewer.py | 2 +- m2isar/frontends/coredsl2/architecture_model_builder.py | 3 ++- m2isar/metamodel/arch.py | 6 +++--- 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/m2isar/backends/viewer/viewer.py b/m2isar/backends/viewer/viewer.py index 16ffab32..c5150caa 100644 --- a/m2isar/backends/viewer/viewer.py +++ b/m2isar/backends/viewer/viewer.py @@ -184,7 +184,7 @@ def main(): enc_str.append(f"{enc.name}[{enc.range.upper}:{enc.range.lower}]") tree.insert(instr_id, tk.END, text="Encoding", values=(" ".join(enc_str),)) - tree.insert(instr_id, tk.END, text="Assembly", values=(instr_def.disass,)) + tree.insert(instr_id, tk.END, text="Assembly", values=(instr_def.assembly,)) tree.insert(instr_id, tk.END, text="Throws", values=(instr_def.throws)) attrs_id = tree.insert(instr_id, tk.END, text="Attributes") diff --git a/m2isar/frontends/coredsl2/architecture_model_builder.py b/m2isar/frontends/coredsl2/architecture_model_builder.py index bff62a98..982e08e0 100644 --- a/m2isar/frontends/coredsl2/architecture_model_builder.py +++ b/m2isar/frontends/coredsl2/architecture_model_builder.py @@ -166,9 +166,10 @@ def visitInstruction(self, ctx: CoreDSL2Parser.InstructionContext): # read encoding, attributes and disassembly encoding = [self.visit(obj) for obj in ctx.encoding] attributes = dict([self.visit(obj) for obj in ctx.attributes]) - disass = ctx.disass.text if ctx.disass is not None else None + assembly = ctx.assembly.text if ctx.assembly is not None else None i = arch.Instruction(ctx.name.text, attributes, encoding, disass, ctx.behavior, None) + i = arch.Instruction(ctx.name.text, attributes, encoding, assembly, ctx.behavior, None) self._instr_classes.add(i.size) instr_id = (i.code, i.mask) diff --git a/m2isar/metamodel/arch.py b/m2isar/metamodel/arch.py index 030b5212..d0f4c0a2 100644 --- a/m2isar/metamodel/arch.py +++ b/m2isar/metamodel/arch.py @@ -410,7 +410,7 @@ class Instruction(SizedRefOrConst): attributes: "dict[InstrAttribute, list[BaseNode]]" encoding: "list[Union[BitField, BitVal]]" - disass: str + assembly: str operation: Operation ext_name: str @@ -422,14 +422,14 @@ class Instruction(SizedRefOrConst): code: int def __init__(self, name, attributes: "dict[InstrAttribute, list[BaseNode]]", encoding: "list[Union[BitField, BitVal]]", - disass: str, operation: Operation, function_info: "FunctionInfo"): + assembly: str, operation: Operation, function_info: "FunctionInfo"): self.ext_name = "" self.attributes = attributes if attributes else {} self.encoding = encoding self.fields: "dict[str, BitFieldDescr]" = {} self.scalars = {} - self.disass = disass + self.assembly = assembly self.operation = operation if operation is not None else Operation([]) self.throws = False self.function_info = function_info From a4f5012d243d8f6c3204573a9e09fca2fccb9eab Mon Sep 17 00:00:00 2001 From: Philipp van Kempen Date: Fri, 19 May 2023 09:03:10 +0200 Subject: [PATCH 4/9] coredsl2 frontend: generate new parser --- .../coredsl2/parser_gen/CoreDSL2Lexer.py | 692 ++++--- .../coredsl2/parser_gen/CoreDSL2Parser.py | 1773 +++++++++-------- 2 files changed, 1240 insertions(+), 1225 deletions(-) diff --git a/m2isar/frontends/coredsl2/parser_gen/CoreDSL2Lexer.py b/m2isar/frontends/coredsl2/parser_gen/CoreDSL2Lexer.py index 3a895cf3..934187ef 100644 --- a/m2isar/frontends/coredsl2/parser_gen/CoreDSL2Lexer.py +++ b/m2isar/frontends/coredsl2/parser_gen/CoreDSL2Lexer.py @@ -10,7 +10,7 @@ def serializedATN(): return [ - 4,0,103,914,6,-1,2,0,7,0,2,1,7,1,2,2,7,2,2,3,7,3,2,4,7,4,2,5,7,5, + 4,0,102,900,6,-1,2,0,7,0,2,1,7,1,2,2,7,2,2,3,7,3,2,4,7,4,2,5,7,5, 2,6,7,6,2,7,7,7,2,8,7,8,2,9,7,9,2,10,7,10,2,11,7,11,2,12,7,12,2, 13,7,13,2,14,7,14,2,15,7,15,2,16,7,16,2,17,7,17,2,18,7,18,2,19,7, 19,2,20,7,20,2,21,7,21,2,22,7,22,2,23,7,23,2,24,7,24,2,25,7,25,2, @@ -26,326 +26,321 @@ def serializedATN(): 84,2,85,7,85,2,86,7,86,2,87,7,87,2,88,7,88,2,89,7,89,2,90,7,90,2, 91,7,91,2,92,7,92,2,93,7,93,2,94,7,94,2,95,7,95,2,96,7,96,2,97,7, 97,2,98,7,98,2,99,7,99,2,100,7,100,2,101,7,101,2,102,7,102,2,103, - 7,103,2,104,7,104,2,105,7,105,2,106,7,106,2,107,7,107,1,0,1,0,1, - 0,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, - 1,1,1,1,1,1,1,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,3,1,3,1,4,1,4,1, - 5,1,5,1,6,1,6,1,6,1,6,1,6,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1, + 7,103,2,104,7,104,2,105,7,105,2,106,7,106,1,0,1,0,1,0,1,0,1,0,1, + 0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, + 1,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,3,1,3,1,4,1,4,1,5,1,5,1,6,1, + 6,1,6,1,6,1,6,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,8,1,8,1,8,1, 8,1,8,1,8,1,8,1,8,1,8,1,8,1,8,1,8,1,8,1,8,1,8,1,8,1,8,1,8,1,8,1, - 8,1,8,1,8,1,8,1,9,1,9,1,10,1,10,1,10,1,10,1,10,1,10,1,10,1,10,1, - 10,1,10,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1, - 11,1,11,1,12,1,12,1,12,1,12,1,12,1,12,1,12,1,13,1,13,1,13,1,13,1, - 13,1,13,1,13,1,13,1,13,1,14,1,14,1,15,1,15,1,15,1,16,1,16,1,16,1, - 16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,17,1,17,1,17,1,17,1, - 17,1,17,1,17,1,17,1,17,1,18,1,18,1,18,1,18,1,18,1,18,1,18,1,18,1, - 18,1,19,1,19,1,19,1,19,1,19,1,19,1,19,1,20,1,20,1,21,1,21,1,22,1, - 22,1,22,1,23,1,23,1,23,1,23,1,23,1,24,1,24,1,24,1,24,1,25,1,25,1, - 25,1,25,1,25,1,25,1,26,1,26,1,26,1,27,1,27,1,27,1,27,1,27,1,27,1, - 27,1,28,1,28,1,28,1,28,1,28,1,28,1,28,1,29,1,29,1,29,1,29,1,29,1, - 29,1,30,1,30,1,30,1,30,1,30,1,30,1,30,1,30,1,30,1,31,1,31,1,31,1, - 31,1,31,1,31,1,32,1,32,1,32,1,32,1,32,1,33,1,33,1,33,1,33,1,33,1, - 33,1,33,1,33,1,34,1,34,1,35,1,35,1,36,1,36,1,37,1,37,1,38,1,38,1, - 38,1,38,1,38,1,39,1,39,1,39,1,39,1,39,1,40,1,40,1,40,1,40,1,40,1, - 41,1,41,1,41,1,41,1,41,1,41,1,41,1,41,1,41,1,42,1,42,1,42,1,42,1, - 42,1,42,1,42,1,43,1,43,1,43,1,43,1,43,1,44,1,44,1,44,1,44,1,44,1, - 44,1,45,1,45,1,45,1,45,1,46,1,46,1,46,1,46,1,46,1,47,1,47,1,47,1, - 47,1,47,1,47,1,48,1,48,1,48,1,48,1,48,1,48,1,48,1,49,1,49,1,49,1, - 50,1,50,1,51,1,51,1,51,1,52,1,52,1,53,1,53,1,53,1,54,1,54,1,54,1, - 55,1,55,1,55,1,56,1,56,1,57,1,57,1,58,1,58,1,59,1,59,1,60,1,60,1, - 61,1,61,1,62,1,62,1,62,1,63,1,63,1,63,1,64,1,64,1,64,1,65,1,65,1, - 65,1,66,1,66,1,66,1,67,1,67,1,67,1,68,1,68,1,69,1,69,1,70,1,70,1, - 70,1,71,1,71,1,71,1,72,1,72,1,73,1,73,1,73,1,74,1,74,1,74,1,75,1, - 75,1,75,1,76,1,76,1,76,1,77,1,77,1,77,1,78,1,78,1,78,1,79,1,79,1, - 79,1,80,1,80,1,80,1,80,1,81,1,81,1,81,1,81,1,81,1,82,1,82,1,82,1, - 82,1,83,1,83,1,83,1,84,1,84,1,84,1,84,1,84,1,84,1,85,1,85,1,85,1, - 85,1,85,1,85,1,86,1,86,1,86,1,86,1,86,1,86,1,86,1,86,1,86,1,87,1, - 87,1,87,1,87,1,87,1,87,1,87,1,88,1,88,1,88,1,88,1,88,1,88,1,88,1, - 88,1,88,1,89,1,89,1,89,1,89,1,89,1,89,1,89,1,90,1,90,1,90,1,90,1, - 90,1,90,1,91,1,91,1,92,1,92,1,93,1,93,1,93,1,93,1,93,1,93,1,93,1, - 93,1,93,3,93,677,8,93,1,94,4,94,680,8,94,11,94,12,94,681,1,94,1, - 94,5,94,686,8,94,10,94,12,94,689,9,94,1,94,1,94,3,94,693,8,94,1, - 94,4,94,696,8,94,11,94,12,94,697,3,94,700,8,94,1,94,3,94,703,8,94, - 1,95,1,95,1,95,1,95,1,95,3,95,710,8,95,1,95,3,95,713,8,95,1,95,1, - 95,3,95,717,8,95,3,95,719,8,95,1,96,1,96,1,96,1,96,3,96,725,8,96, - 1,96,1,96,3,96,729,8,96,1,96,5,96,732,8,96,10,96,12,96,735,9,96, - 1,97,1,97,3,97,739,8,97,1,97,1,97,3,97,743,8,97,1,97,5,97,746,8, - 97,10,97,12,97,749,9,97,1,98,1,98,1,98,3,98,754,8,98,1,98,5,98,757, - 8,98,10,98,12,98,760,9,98,3,98,762,8,98,1,99,1,99,1,99,1,99,3,99, - 768,8,99,1,99,1,99,3,99,772,8,99,1,99,5,99,775,8,99,10,99,12,99, - 778,9,99,1,100,4,100,781,8,100,11,100,12,100,782,1,100,1,100,3,100, - 787,8,100,1,100,1,100,4,100,791,8,100,11,100,12,100,792,1,100,1, - 100,4,100,797,8,100,11,100,12,100,798,1,100,1,100,4,100,803,8,100, - 11,100,12,100,804,1,100,1,100,4,100,809,8,100,11,100,12,100,810, - 3,100,813,8,100,1,101,3,101,816,8,101,1,101,1,101,5,101,820,8,101, - 10,101,12,101,823,9,101,1,102,3,102,826,8,102,1,102,1,102,1,102, - 1,102,5,102,832,8,102,10,102,12,102,835,9,102,1,102,1,102,1,103, - 1,103,1,103,3,103,842,8,103,1,103,1,103,1,103,1,103,5,103,848,8, - 103,10,103,12,103,851,9,103,1,103,1,103,1,104,1,104,1,104,1,104, - 5,104,859,8,104,10,104,12,104,862,9,104,1,104,1,104,1,104,1,104, - 1,104,5,104,869,8,104,10,104,12,104,872,9,104,1,104,3,104,875,8, - 104,1,105,1,105,1,105,1,105,5,105,881,8,105,10,105,12,105,884,9, - 105,1,105,1,105,1,105,1,105,1,105,1,106,1,106,1,106,1,106,5,106, - 895,8,106,10,106,12,106,898,9,106,1,106,3,106,901,8,106,1,106,3, - 106,904,8,106,1,106,1,106,1,107,4,107,909,8,107,11,107,12,107,910, - 1,107,1,107,1,882,0,108,1,1,3,2,5,3,7,4,9,5,11,6,13,7,15,8,17,9, - 19,10,21,11,23,12,25,13,27,14,29,15,31,16,33,17,35,18,37,19,39,20, - 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1,0,0,0,0,147,1,0,0,0,0,149,1,0,0,0,0,151,1,0,0,0,0,153,1,0,0,0, - 0,155,1,0,0,0,0,157,1,0,0,0,0,159,1,0,0,0,0,161,1,0,0,0,0,163,1, - 0,0,0,0,165,1,0,0,0,0,167,1,0,0,0,0,169,1,0,0,0,0,171,1,0,0,0,0, - 173,1,0,0,0,0,175,1,0,0,0,0,177,1,0,0,0,0,179,1,0,0,0,0,181,1,0, - 0,0,0,183,1,0,0,0,0,185,1,0,0,0,0,187,1,0,0,0,0,189,1,0,0,0,0,191, - 1,0,0,0,0,203,1,0,0,0,0,205,1,0,0,0,0,207,1,0,0,0,0,209,1,0,0,0, - 0,211,1,0,0,0,0,213,1,0,0,0,0,215,1,0,0,0,1,217,1,0,0,0,3,224,1, - 0,0,0,5,239,1,0,0,0,7,247,1,0,0,0,9,249,1,0,0,0,11,251,1,0,0,0,13, - 253,1,0,0,0,15,258,1,0,0,0,17,267,1,0,0,0,19,287,1,0,0,0,21,289, - 1,0,0,0,23,299,1,0,0,0,25,312,1,0,0,0,27,319,1,0,0,0,29,328,1,0, - 0,0,31,330,1,0,0,0,33,333,1,0,0,0,35,345,1,0,0,0,37,354,1,0,0,0, - 39,363,1,0,0,0,41,370,1,0,0,0,43,372,1,0,0,0,45,374,1,0,0,0,47,377, - 1,0,0,0,49,382,1,0,0,0,51,386,1,0,0,0,53,392,1,0,0,0,55,395,1,0, - 0,0,57,402,1,0,0,0,59,409,1,0,0,0,61,415,1,0,0,0,63,424,1,0,0,0, - 65,430,1,0,0,0,67,435,1,0,0,0,69,443,1,0,0,0,71,445,1,0,0,0,73,447, - 1,0,0,0,75,449,1,0,0,0,77,451,1,0,0,0,79,456,1,0,0,0,81,461,1,0, - 0,0,83,466,1,0,0,0,85,475,1,0,0,0,87,482,1,0,0,0,89,487,1,0,0,0, - 91,493,1,0,0,0,93,497,1,0,0,0,95,502,1,0,0,0,97,508,1,0,0,0,99,515, - 1,0,0,0,101,518,1,0,0,0,103,520,1,0,0,0,105,523,1,0,0,0,107,525, - 1,0,0,0,109,528,1,0,0,0,111,531,1,0,0,0,113,534,1,0,0,0,115,536, - 1,0,0,0,117,538,1,0,0,0,119,540,1,0,0,0,121,542,1,0,0,0,123,544, - 1,0,0,0,125,546,1,0,0,0,127,549,1,0,0,0,129,552,1,0,0,0,131,555, - 1,0,0,0,133,558,1,0,0,0,135,561,1,0,0,0,137,564,1,0,0,0,139,566, - 1,0,0,0,141,568,1,0,0,0,143,571,1,0,0,0,145,574,1,0,0,0,147,576, - 1,0,0,0,149,579,1,0,0,0,151,582,1,0,0,0,153,585,1,0,0,0,155,588, - 1,0,0,0,157,591,1,0,0,0,159,594,1,0,0,0,161,597,1,0,0,0,163,601, - 1,0,0,0,165,606,1,0,0,0,167,610,1,0,0,0,169,613,1,0,0,0,171,619, - 1,0,0,0,173,625,1,0,0,0,175,634,1,0,0,0,177,641,1,0,0,0,179,650, - 1,0,0,0,181,657,1,0,0,0,183,663,1,0,0,0,185,665,1,0,0,0,187,676, - 1,0,0,0,189,679,1,0,0,0,191,709,1,0,0,0,193,724,1,0,0,0,195,736, - 1,0,0,0,197,761,1,0,0,0,199,767,1,0,0,0,201,780,1,0,0,0,203,815, - 1,0,0,0,205,825,1,0,0,0,207,841,1,0,0,0,209,874,1,0,0,0,211,876, - 1,0,0,0,213,890,1,0,0,0,215,908,1,0,0,0,217,218,5,105,0,0,218,219, - 5,109,0,0,219,220,5,112,0,0,220,221,5,111,0,0,221,222,5,114,0,0, - 222,223,5,116,0,0,223,2,1,0,0,0,224,225,5,73,0,0,225,226,5,110,0, - 0,226,227,5,115,0,0,227,228,5,116,0,0,228,229,5,114,0,0,229,230, - 5,117,0,0,230,231,5,99,0,0,231,232,5,116,0,0,232,233,5,105,0,0,233, - 234,5,111,0,0,234,235,5,110,0,0,235,236,5,83,0,0,236,237,5,101,0, - 0,237,238,5,116,0,0,238,4,1,0,0,0,239,240,5,101,0,0,240,241,5,120, - 0,0,241,242,5,116,0,0,242,243,5,101,0,0,243,244,5,110,0,0,244,245, - 5,100,0,0,245,246,5,115,0,0,246,6,1,0,0,0,247,248,5,44,0,0,248,8, - 1,0,0,0,249,250,5,123,0,0,250,10,1,0,0,0,251,252,5,125,0,0,252,12, - 1,0,0,0,253,254,5,67,0,0,254,255,5,111,0,0,255,256,5,114,0,0,256, - 257,5,101,0,0,257,14,1,0,0,0,258,259,5,112,0,0,259,260,5,114,0,0, - 260,261,5,111,0,0,261,262,5,118,0,0,262,263,5,105,0,0,263,264,5, - 100,0,0,264,265,5,101,0,0,265,266,5,115,0,0,266,16,1,0,0,0,267,268, - 5,97,0,0,268,269,5,114,0,0,269,270,5,99,0,0,270,271,5,104,0,0,271, - 272,5,105,0,0,272,273,5,116,0,0,273,274,5,101,0,0,274,275,5,99,0, - 0,275,276,5,116,0,0,276,277,5,117,0,0,277,278,5,114,0,0,278,279, - 5,97,0,0,279,280,5,108,0,0,280,281,5,95,0,0,281,282,5,115,0,0,282, - 283,5,116,0,0,283,284,5,97,0,0,284,285,5,116,0,0,285,286,5,101,0, - 0,286,18,1,0,0,0,287,288,5,59,0,0,288,20,1,0,0,0,289,290,5,102,0, - 0,290,291,5,117,0,0,291,292,5,110,0,0,292,293,5,99,0,0,293,294,5, - 116,0,0,294,295,5,105,0,0,295,296,5,111,0,0,296,297,5,110,0,0,297, - 298,5,115,0,0,298,22,1,0,0,0,299,300,5,105,0,0,300,301,5,110,0,0, - 301,302,5,115,0,0,302,303,5,116,0,0,303,304,5,114,0,0,304,305,5, - 117,0,0,305,306,5,99,0,0,306,307,5,116,0,0,307,308,5,105,0,0,308, - 309,5,111,0,0,309,310,5,110,0,0,310,311,5,115,0,0,311,24,1,0,0,0, - 312,313,5,97,0,0,313,314,5,108,0,0,314,315,5,119,0,0,315,316,5,97, - 0,0,316,317,5,121,0,0,317,318,5,115,0,0,318,26,1,0,0,0,319,320,5, - 101,0,0,320,321,5,110,0,0,321,322,5,99,0,0,322,323,5,111,0,0,323, - 324,5,100,0,0,324,325,5,105,0,0,325,326,5,110,0,0,326,327,5,103, - 0,0,327,28,1,0,0,0,328,329,5,58,0,0,329,30,1,0,0,0,330,331,5,58, - 0,0,331,332,5,58,0,0,332,32,1,0,0,0,333,334,5,97,0,0,334,335,5,114, - 0,0,335,336,5,103,0,0,336,337,5,115,0,0,337,338,5,95,0,0,338,339, - 5,100,0,0,339,340,5,105,0,0,340,341,5,115,0,0,341,342,5,97,0,0,342, - 343,5,115,0,0,343,344,5,115,0,0,344,34,1,0,0,0,345,346,5,97,0,0, - 346,347,5,115,0,0,347,348,5,115,0,0,348,349,5,101,0,0,349,350,5, - 109,0,0,350,351,5,98,0,0,351,352,5,108,0,0,352,353,5,121,0,0,353, - 36,1,0,0,0,354,355,5,98,0,0,355,356,5,101,0,0,356,357,5,104,0,0, - 357,358,5,97,0,0,358,359,5,118,0,0,359,360,5,105,0,0,360,361,5,111, - 0,0,361,362,5,114,0,0,362,38,1,0,0,0,363,364,5,101,0,0,364,365,5, - 120,0,0,365,366,5,116,0,0,366,367,5,101,0,0,367,368,5,114,0,0,368, - 369,5,110,0,0,369,40,1,0,0,0,370,371,5,40,0,0,371,42,1,0,0,0,372, - 373,5,41,0,0,373,44,1,0,0,0,374,375,5,105,0,0,375,376,5,102,0,0, - 376,46,1,0,0,0,377,378,5,101,0,0,378,379,5,108,0,0,379,380,5,115, - 0,0,380,381,5,101,0,0,381,48,1,0,0,0,382,383,5,102,0,0,383,384,5, - 111,0,0,384,385,5,114,0,0,385,50,1,0,0,0,386,387,5,119,0,0,387,388, - 5,104,0,0,388,389,5,105,0,0,389,390,5,108,0,0,390,391,5,101,0,0, - 391,52,1,0,0,0,392,393,5,100,0,0,393,394,5,111,0,0,394,54,1,0,0, - 0,395,396,5,115,0,0,396,397,5,119,0,0,397,398,5,105,0,0,398,399, - 5,116,0,0,399,400,5,99,0,0,400,401,5,104,0,0,401,56,1,0,0,0,402, - 403,5,114,0,0,403,404,5,101,0,0,404,405,5,116,0,0,405,406,5,117, - 0,0,406,407,5,114,0,0,407,408,5,110,0,0,408,58,1,0,0,0,409,410,5, - 98,0,0,410,411,5,114,0,0,411,412,5,101,0,0,412,413,5,97,0,0,413, - 414,5,107,0,0,414,60,1,0,0,0,415,416,5,99,0,0,416,417,5,111,0,0, - 417,418,5,110,0,0,418,419,5,116,0,0,419,420,5,105,0,0,420,421,5, - 110,0,0,421,422,5,117,0,0,422,423,5,101,0,0,423,62,1,0,0,0,424,425, - 5,115,0,0,425,426,5,112,0,0,426,427,5,97,0,0,427,428,5,119,0,0,428, - 429,5,110,0,0,429,64,1,0,0,0,430,431,5,99,0,0,431,432,5,97,0,0,432, - 433,5,115,0,0,433,434,5,101,0,0,434,66,1,0,0,0,435,436,5,100,0,0, - 436,437,5,101,0,0,437,438,5,102,0,0,438,439,5,97,0,0,439,440,5,117, - 0,0,440,441,5,108,0,0,441,442,5,116,0,0,442,68,1,0,0,0,443,444,5, - 42,0,0,444,70,1,0,0,0,445,446,5,38,0,0,446,72,1,0,0,0,447,448,5, - 60,0,0,448,74,1,0,0,0,449,450,5,62,0,0,450,76,1,0,0,0,451,452,5, - 98,0,0,452,453,5,111,0,0,453,454,5,111,0,0,454,455,5,108,0,0,455, - 78,1,0,0,0,456,457,5,118,0,0,457,458,5,111,0,0,458,459,5,105,0,0, - 459,460,5,100,0,0,460,80,1,0,0,0,461,462,5,101,0,0,462,463,5,110, - 0,0,463,464,5,117,0,0,464,465,5,109,0,0,465,82,1,0,0,0,466,467,5, - 117,0,0,467,468,5,110,0,0,468,469,5,115,0,0,469,470,5,105,0,0,470, - 471,5,103,0,0,471,472,5,110,0,0,472,473,5,101,0,0,473,474,5,100, - 0,0,474,84,1,0,0,0,475,476,5,115,0,0,476,477,5,105,0,0,477,478,5, - 103,0,0,478,479,5,110,0,0,479,480,5,101,0,0,480,481,5,100,0,0,481, - 86,1,0,0,0,482,483,5,99,0,0,483,484,5,104,0,0,484,485,5,97,0,0,485, - 486,5,114,0,0,486,88,1,0,0,0,487,488,5,115,0,0,488,489,5,104,0,0, - 489,490,5,111,0,0,490,491,5,114,0,0,491,492,5,116,0,0,492,90,1,0, - 0,0,493,494,5,105,0,0,494,495,5,110,0,0,495,496,5,116,0,0,496,92, - 1,0,0,0,497,498,5,108,0,0,498,499,5,111,0,0,499,500,5,110,0,0,500, - 501,5,103,0,0,501,94,1,0,0,0,502,503,5,102,0,0,503,504,5,108,0,0, - 504,505,5,111,0,0,505,506,5,97,0,0,506,507,5,116,0,0,507,96,1,0, - 0,0,508,509,5,100,0,0,509,510,5,111,0,0,510,511,5,117,0,0,511,512, - 5,98,0,0,512,513,5,108,0,0,513,514,5,101,0,0,514,98,1,0,0,0,515, - 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0,839,206,1,0,0,0,840,846,5,34,0,0,841,842,5,92,0,0,842,845,9,0, + 0,0,843,845,8,10,0,0,844,841,1,0,0,0,844,843,1,0,0,0,845,848,1,0, + 0,0,846,844,1,0,0,0,846,847,1,0,0,0,847,849,1,0,0,0,848,846,1,0, + 0,0,849,861,5,34,0,0,850,856,5,39,0,0,851,852,5,92,0,0,852,855,9, + 0,0,0,853,855,8,9,0,0,854,851,1,0,0,0,854,853,1,0,0,0,855,858,1, + 0,0,0,856,854,1,0,0,0,856,857,1,0,0,0,857,859,1,0,0,0,858,856,1, + 0,0,0,859,861,5,39,0,0,860,840,1,0,0,0,860,850,1,0,0,0,861,208,1, + 0,0,0,862,863,5,47,0,0,863,864,5,42,0,0,864,868,1,0,0,0,865,867, + 9,0,0,0,866,865,1,0,0,0,867,870,1,0,0,0,868,869,1,0,0,0,868,866, + 1,0,0,0,869,871,1,0,0,0,870,868,1,0,0,0,871,872,5,42,0,0,872,873, + 5,47,0,0,873,874,1,0,0,0,874,875,6,104,0,0,875,210,1,0,0,0,876,877, + 5,47,0,0,877,878,5,47,0,0,878,882,1,0,0,0,879,881,8,11,0,0,880,879, + 1,0,0,0,881,884,1,0,0,0,882,880,1,0,0,0,882,883,1,0,0,0,883,889, + 1,0,0,0,884,882,1,0,0,0,885,887,5,13,0,0,886,885,1,0,0,0,886,887, + 1,0,0,0,887,888,1,0,0,0,888,890,5,10,0,0,889,886,1,0,0,0,889,890, + 1,0,0,0,890,891,1,0,0,0,891,892,6,105,0,0,892,212,1,0,0,0,893,895, + 7,12,0,0,894,893,1,0,0,0,895,896,1,0,0,0,896,894,1,0,0,0,896,897, + 1,0,0,0,897,898,1,0,0,0,898,899,6,106,0,0,899,214,1,0,0,0,49,0,662, + 667,673,678,683,685,688,695,698,702,704,710,714,719,724,728,733, + 739,744,747,753,757,762,768,772,778,784,790,796,798,801,807,811, + 817,819,827,833,835,844,846,854,856,860,868,882,886,889,896,1,6, 0,0 ] @@ -445,19 +440,18 @@ class CoreDSL2Lexer(Lexer): T__87 = 88 T__88 = 89 T__89 = 90 - T__90 = 91 - LEFT_BR = 92 - RIGHT_BR = 93 - BOOLEAN = 94 - FLOAT = 95 - INTEGER = 96 - IDENTIFIER = 97 - CHARCONST = 98 - ENCSTRINGCONST = 99 - STRING = 100 - ML_COMMENT = 101 - SL_COMMENT = 102 - WS = 103 + LEFT_BR = 91 + RIGHT_BR = 92 + BOOLEAN = 93 + FLOAT = 94 + INTEGER = 95 + IDENTIFIER = 96 + CHARCONST = 97 + ENCSTRINGCONST = 98 + STRING = 99 + ML_COMMENT = 100 + SL_COMMENT = 101 + WS = 102 channelNames = [ u"DEFAULT_TOKEN_CHANNEL", u"HIDDEN" ] @@ -466,18 +460,18 @@ class CoreDSL2Lexer(Lexer): literalNames = [ "", "'import'", "'InstructionSet'", "'extends'", "','", "'{'", "'}'", "'Core'", "'provides'", "'architectural_state'", "';'", "'functions'", - "'instructions'", "'always'", "'encoding'", "':'", "'::'", "'args_disass'", - "'assembly'", "'behavior'", "'extern'", "'('", "')'", "'if'", - "'else'", "'for'", "'while'", "'do'", "'switch'", "'return'", - "'break'", "'continue'", "'spawn'", "'case'", "'default'", "'*'", - "'&'", "'<'", "'>'", "'bool'", "'void'", "'enum'", "'unsigned'", - "'signed'", "'char'", "'short'", "'int'", "'long'", "'float'", - "'double'", "'[['", "'='", "']]'", "'.'", "'->'", "'++'", "'--'", - "'+'", "'-'", "'~'", "'!'", "'/'", "'%'", "'<<'", "'>>'", "'<='", - "'>='", "'=='", "'!='", "'^'", "'|'", "'&&'", "'||'", "'?'", - "'+='", "'-='", "'*='", "'/='", "'&='", "'|='", "'^='", "'>>='", - "'>>>='", "'<<='", "'%='", "'alias'", "'const'", "'volatile'", - "'static'", "'register'", "'struct'", "'union'", "'['", "']'" ] + "'instructions'", "'always'", "'encoding'", "':'", "'::'", "'assembly'", + "'behavior'", "'extern'", "'('", "')'", "'if'", "'else'", "'for'", + "'while'", "'do'", "'switch'", "'return'", "'break'", "'continue'", + "'spawn'", "'case'", "'default'", "'*'", "'&'", "'<'", "'>'", + "'bool'", "'void'", "'enum'", "'unsigned'", "'signed'", "'char'", + "'short'", "'int'", "'long'", "'float'", "'double'", "'[['", + "'='", "']]'", "'.'", "'->'", "'++'", "'--'", "'+'", "'-'", + "'~'", "'!'", "'/'", "'%'", "'<<'", "'>>'", "'<='", "'>='", + "'=='", "'!='", "'^'", "'|'", "'&&'", "'||'", "'?'", "'+='", + "'-='", "'*='", "'/='", "'&='", "'|='", "'^='", "'>>='", "'>>>='", + "'<<='", "'%='", "'alias'", "'const'", "'volatile'", "'static'", + "'register'", "'struct'", "'union'", "'['", "']'" ] symbolicNames = [ "", "LEFT_BR", "RIGHT_BR", "BOOLEAN", "FLOAT", "INTEGER", "IDENTIFIER", @@ -498,11 +492,11 @@ class CoreDSL2Lexer(Lexer): "T__68", "T__69", "T__70", "T__71", "T__72", "T__73", "T__74", "T__75", "T__76", "T__77", "T__78", "T__79", "T__80", "T__81", "T__82", "T__83", "T__84", "T__85", - "T__86", "T__87", "T__88", "T__89", "T__90", "LEFT_BR", - "RIGHT_BR", "BOOLEAN", "FLOAT", "INTEGER", "BINARYINT", - "OCTALINT", "DECIMALINT", "HEXADECIMALINT", "VLOGINT", - "IDENTIFIER", "CHARCONST", "ENCSTRINGCONST", "STRING", - "ML_COMMENT", "SL_COMMENT", "WS" ] + "T__86", "T__87", "T__88", "T__89", "LEFT_BR", "RIGHT_BR", + "BOOLEAN", "FLOAT", "INTEGER", "BINARYINT", "OCTALINT", + "DECIMALINT", "HEXADECIMALINT", "VLOGINT", "IDENTIFIER", + "CHARCONST", "ENCSTRINGCONST", "STRING", "ML_COMMENT", + "SL_COMMENT", "WS" ] grammarFileName = "CoreDSL2.g4" diff --git a/m2isar/frontends/coredsl2/parser_gen/CoreDSL2Parser.py b/m2isar/frontends/coredsl2/parser_gen/CoreDSL2Parser.py index 1e3ffd31..2839cb3f 100644 --- a/m2isar/frontends/coredsl2/parser_gen/CoreDSL2Parser.py +++ b/m2isar/frontends/coredsl2/parser_gen/CoreDSL2Parser.py @@ -10,7 +10,7 @@ def serializedATN(): return [ - 4,1,103,785,2,0,7,0,2,1,7,1,2,2,7,2,2,3,7,3,2,4,7,4,2,5,7,5,2,6, + 4,1,102,792,2,0,7,0,2,1,7,1,2,2,7,2,2,3,7,3,2,4,7,4,2,5,7,5,2,6, 7,6,2,7,7,7,2,8,7,8,2,9,7,9,2,10,7,10,2,11,7,11,2,12,7,12,2,13,7, 13,2,14,7,14,2,15,7,15,2,16,7,16,2,17,7,17,2,18,7,18,2,19,7,19,2, 20,7,20,2,21,7,21,2,22,7,22,2,23,7,23,2,24,7,24,2,25,7,25,2,26,7, @@ -28,285 +28,288 @@ def serializedATN(): 3,193,8,3,10,3,12,3,196,9,3,1,3,1,3,4,3,200,8,3,11,3,12,3,201,1, 3,1,3,3,3,206,8,3,1,4,1,4,5,4,210,8,4,10,4,12,4,213,9,4,1,4,1,4, 1,5,1,5,5,5,219,8,5,10,5,12,5,222,9,5,1,5,1,5,1,5,1,5,1,5,1,5,5, - 5,230,8,5,10,5,12,5,233,9,5,1,5,1,5,1,5,1,5,1,5,3,5,240,8,5,1,5, - 1,5,1,5,1,5,1,5,1,6,1,6,1,6,5,6,250,8,6,10,6,12,6,253,9,6,1,7,1, - 7,1,7,1,7,1,7,1,7,1,7,1,7,3,7,263,8,7,1,8,1,8,1,8,1,8,1,8,3,8,270, - 8,8,1,8,1,8,5,8,274,8,8,10,8,12,8,277,9,8,1,8,1,8,1,8,1,8,1,8,1, - 8,3,8,285,8,8,1,8,1,8,5,8,289,8,8,10,8,12,8,292,9,8,1,8,1,8,3,8, - 296,8,8,3,8,298,8,8,1,9,1,9,1,9,5,9,303,8,9,10,9,12,9,306,9,9,1, - 10,1,10,3,10,310,8,10,1,11,1,11,1,11,1,11,1,11,1,11,5,11,318,8,11, - 10,11,12,11,321,9,11,3,11,323,8,11,1,11,1,11,1,11,1,11,1,11,1,11, - 1,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,5,11,339,8,11,10,11,12,11, - 342,9,11,1,11,1,11,3,11,346,8,11,1,11,1,11,1,11,1,11,1,11,1,11,1, - 11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1, - 11,1,11,1,11,1,11,1,11,1,11,1,11,5,11,374,8,11,10,11,12,11,377,9, - 11,1,11,5,11,380,8,11,10,11,12,11,383,9,11,1,11,1,11,1,11,1,11,3, - 11,389,8,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,1,11,3, - 11,401,8,11,1,12,4,12,404,8,12,11,12,12,12,405,1,12,4,12,409,8,12, - 11,12,12,12,410,1,13,1,13,1,13,1,13,1,13,1,13,3,13,419,8,13,1,14, - 1,14,5,14,423,8,14,10,14,12,14,426,9,14,1,14,1,14,1,15,1,15,3,15, - 432,8,15,1,16,1,16,3,16,436,8,16,1,16,3,16,439,8,16,1,16,3,16,442, - 8,16,1,16,1,16,1,16,1,16,5,16,448,8,16,10,16,12,16,451,9,16,3,16, - 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8,17,10,17,12,17,477,9,17,3,17,479,8,17,1,17,1,17,1,18,1,18,1,18, + 3,18,486,8,18,1,19,1,19,1,19,1,19,1,19,1,19,3,19,494,8,19,1,19,1, + 19,1,19,1,19,1,19,1,19,3,19,502,8,19,1,19,1,19,5,19,506,8,19,10, + 19,12,19,509,9,19,1,19,1,19,1,19,1,19,1,19,1,19,1,19,3,19,518,8, + 19,1,19,1,19,1,19,3,19,523,8,19,1,19,1,19,1,19,1,19,3,19,529,8,19, + 1,20,1,20,1,21,1,21,1,22,1,22,1,23,1,23,1,23,1,23,1,23,1,23,1,23, + 1,23,5,23,545,8,23,10,23,12,23,548,9,23,1,23,1,23,3,23,552,8,23, + 1,23,1,23,1,24,1,24,1,24,1,24,1,24,1,24,1,24,1,24,1,24,3,24,565, + 8,24,1,24,1,24,1,25,1,25,1,25,5,25,572,8,25,10,25,12,25,575,9,25, + 1,26,1,26,1,26,1,26,3,26,581,8,26,1,27,1,27,1,27,1,27,5,27,587,8, + 27,10,27,12,27,590,9,27,1,27,1,27,1,28,1,28,3,28,596,8,28,1,29,1, + 29,1,29,1,29,1,29,5,29,603,8,29,10,29,12,29,606,9,29,1,29,5,29,609, + 8,29,10,29,12,29,612,9,29,1,29,1,29,3,29,616,8,29,1,30,1,30,1,30, + 1,30,3,30,622,8,30,1,30,1,30,3,30,626,8,30,1,31,1,31,3,31,630,8, + 31,1,31,1,31,1,31,3,31,635,8,31,5,31,637,8,31,10,31,12,31,640,9, + 31,1,32,4,32,643,8,32,11,32,12,32,644,1,32,1,32,1,32,1,33,1,33,1, + 33,1,33,1,33,1,33,3,33,656,8,33,1,34,1,34,1,34,1,34,1,34,1,34,1, + 34,1,34,1,34,5,34,667,8,34,10,34,12,34,670,9,34,3,34,672,8,34,1, + 34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,3,34,684,8,34,1, + 34,1,34,1,34,3,34,689,8,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1, 34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1, 34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1, 34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1,34,1, - 34,1,34,1,34,1,34,1,34,3,34,731,8,34,1,34,1,34,1,34,1,34,5,34,737, - 8,34,10,34,12,34,740,9,34,1,35,1,35,1,35,4,35,745,8,35,11,35,12, - 35,746,1,35,1,35,1,35,1,35,3,35,753,8,35,1,36,1,36,1,37,1,37,1,37, - 1,37,3,37,761,8,37,1,38,1,38,1,39,1,39,1,40,1,40,1,41,1,41,1,42, - 1,42,1,42,1,43,1,43,1,43,1,44,1,44,1,45,1,45,1,46,1,46,1,47,1,47, - 1,47,0,1,68,48,0,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34, - 36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,66,68,70,72,74,76,78, - 80,82,84,86,88,90,92,94,0,19,1,0,17,18,1,0,42,43,1,0,44,47,1,0,48, - 49,1,0,53,54,1,0,55,56,2,0,35,36,57,58,1,0,59,60,2,0,35,35,61,62, - 1,0,57,58,1,0,63,64,2,0,37,38,65,66,1,0,67,68,2,0,51,51,74,84,1, - 0,99,100,3,0,39,40,42,49,85,85,1,0,86,87,2,0,20,20,88,89,1,0,90, - 91,867,0,99,1,0,0,0,2,107,1,0,0,0,4,152,1,0,0,0,6,205,1,0,0,0,8, - 207,1,0,0,0,10,216,1,0,0,0,12,246,1,0,0,0,14,262,1,0,0,0,16,297, - 1,0,0,0,18,299,1,0,0,0,20,307,1,0,0,0,22,400,1,0,0,0,24,403,1,0, - 0,0,26,418,1,0,0,0,28,420,1,0,0,0,30,431,1,0,0,0,32,438,1,0,0,0, - 34,459,1,0,0,0,36,475,1,0,0,0,38,521,1,0,0,0,40,523,1,0,0,0,42,525, - 1,0,0,0,44,527,1,0,0,0,46,529,1,0,0,0,48,548,1,0,0,0,50,561,1,0, - 0,0,52,573,1,0,0,0,54,575,1,0,0,0,56,588,1,0,0,0,58,590,1,0,0,0, - 60,618,1,0,0,0,62,622,1,0,0,0,64,635,1,0,0,0,66,648,1,0,0,0,68,681, - 1,0,0,0,70,752,1,0,0,0,72,754,1,0,0,0,74,760,1,0,0,0,76,762,1,0, - 0,0,78,764,1,0,0,0,80,766,1,0,0,0,82,768,1,0,0,0,84,770,1,0,0,0, - 86,773,1,0,0,0,88,776,1,0,0,0,90,778,1,0,0,0,92,780,1,0,0,0,94,782, - 1,0,0,0,96,98,3,2,1,0,97,96,1,0,0,0,98,101,1,0,0,0,99,97,1,0,0,0, - 99,100,1,0,0,0,100,103,1,0,0,0,101,99,1,0,0,0,102,104,3,4,2,0,103, - 102,1,0,0,0,104,105,1,0,0,0,105,103,1,0,0,0,105,106,1,0,0,0,106, - 1,1,0,0,0,107,108,5,1,0,0,108,109,5,100,0,0,109,3,1,0,0,0,110,111, - 5,2,0,0,111,121,5,97,0,0,112,113,5,3,0,0,113,118,5,97,0,0,114,115, - 5,4,0,0,115,117,5,97,0,0,116,114,1,0,0,0,117,120,1,0,0,0,118,116, - 1,0,0,0,118,119,1,0,0,0,119,122,1,0,0,0,120,118,1,0,0,0,121,112, - 1,0,0,0,121,122,1,0,0,0,122,123,1,0,0,0,123,127,5,5,0,0,124,126, - 3,6,3,0,125,124,1,0,0,0,126,129,1,0,0,0,127,125,1,0,0,0,127,128, - 1,0,0,0,128,130,1,0,0,0,129,127,1,0,0,0,130,153,5,6,0,0,131,132, - 5,7,0,0,132,142,5,97,0,0,133,134,5,8,0,0,134,139,5,97,0,0,135,136, - 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476,1,0,0,0,476,479,1,0,0,0,477,475,1,0,0,0,478,470,1,0,0,0,478, + 479,1,0,0,0,479,480,1,0,0,0,480,481,5,10,0,0,481,35,1,0,0,0,482, + 485,3,38,19,0,483,486,5,34,0,0,484,486,5,35,0,0,485,483,1,0,0,0, + 485,484,1,0,0,0,485,486,1,0,0,0,486,37,1,0,0,0,487,493,3,40,20,0, + 488,494,3,42,21,0,489,490,5,36,0,0,490,491,3,70,35,0,491,492,5,37, + 0,0,492,494,1,0,0,0,493,488,1,0,0,0,493,489,1,0,0,0,494,529,1,0, + 0,0,495,529,3,42,21,0,496,529,3,44,22,0,497,529,5,38,0,0,498,529, + 5,39,0,0,499,501,3,94,47,0,500,502,5,96,0,0,501,500,1,0,0,0,501, + 502,1,0,0,0,502,503,1,0,0,0,503,507,5,5,0,0,504,506,3,54,27,0,505, + 504,1,0,0,0,506,509,1,0,0,0,507,505,1,0,0,0,507,508,1,0,0,0,508, + 510,1,0,0,0,509,507,1,0,0,0,510,511,5,6,0,0,511,529,1,0,0,0,512, + 513,3,94,47,0,513,514,5,96,0,0,514,529,1,0,0,0,515,517,5,40,0,0, + 516,518,5,96,0,0,517,516,1,0,0,0,517,518,1,0,0,0,518,519,1,0,0,0, + 519,520,5,5,0,0,520,522,3,50,25,0,521,523,5,4,0,0,522,521,1,0,0, + 0,522,523,1,0,0,0,523,524,1,0,0,0,524,525,5,6,0,0,525,529,1,0,0, + 0,526,527,5,40,0,0,527,529,5,96,0,0,528,487,1,0,0,0,528,495,1,0, + 0,0,528,496,1,0,0,0,528,497,1,0,0,0,528,498,1,0,0,0,528,499,1,0, + 0,0,528,512,1,0,0,0,528,515,1,0,0,0,528,526,1,0,0,0,529,39,1,0,0, + 0,530,531,7,0,0,0,531,41,1,0,0,0,532,533,7,1,0,0,533,43,1,0,0,0, + 534,535,7,2,0,0,535,45,1,0,0,0,536,537,5,49,0,0,537,551,5,96,0,0, + 538,539,5,50,0,0,539,552,3,68,34,0,540,541,5,20,0,0,541,546,3,68, + 34,0,542,543,5,4,0,0,543,545,3,68,34,0,544,542,1,0,0,0,545,548,1, + 0,0,0,546,544,1,0,0,0,546,547,1,0,0,0,547,549,1,0,0,0,548,546,1, + 0,0,0,549,550,5,21,0,0,550,552,1,0,0,0,551,538,1,0,0,0,551,540,1, + 0,0,0,551,552,1,0,0,0,552,553,1,0,0,0,553,554,5,51,0,0,554,47,1, + 0,0,0,555,556,5,36,0,0,556,564,3,70,35,0,557,558,5,4,0,0,558,559, + 3,70,35,0,559,560,5,4,0,0,560,561,3,70,35,0,561,562,5,4,0,0,562, + 563,3,70,35,0,563,565,1,0,0,0,564,557,1,0,0,0,564,565,1,0,0,0,565, + 566,1,0,0,0,566,567,5,37,0,0,567,49,1,0,0,0,568,573,3,52,26,0,569, + 570,5,4,0,0,570,572,3,52,26,0,571,569,1,0,0,0,572,575,1,0,0,0,573, + 571,1,0,0,0,573,574,1,0,0,0,574,51,1,0,0,0,575,573,1,0,0,0,576,581, + 5,96,0,0,577,578,5,96,0,0,578,579,5,50,0,0,579,581,3,68,34,0,580, + 576,1,0,0,0,580,577,1,0,0,0,581,53,1,0,0,0,582,583,3,56,28,0,583, + 588,3,58,29,0,584,585,5,4,0,0,585,587,3,58,29,0,586,584,1,0,0,0, + 587,590,1,0,0,0,588,586,1,0,0,0,588,589,1,0,0,0,589,591,1,0,0,0, + 590,588,1,0,0,0,591,592,5,10,0,0,592,55,1,0,0,0,593,596,3,36,18, + 0,594,596,3,90,45,0,595,593,1,0,0,0,595,594,1,0,0,0,596,57,1,0,0, + 0,597,604,5,96,0,0,598,599,5,91,0,0,599,600,3,68,34,0,600,601,5, + 92,0,0,601,603,1,0,0,0,602,598,1,0,0,0,603,606,1,0,0,0,604,602,1, + 0,0,0,604,605,1,0,0,0,605,610,1,0,0,0,606,604,1,0,0,0,607,609,3, + 46,23,0,608,607,1,0,0,0,609,612,1,0,0,0,610,608,1,0,0,0,610,611, + 1,0,0,0,611,615,1,0,0,0,612,610,1,0,0,0,613,614,5,50,0,0,614,616, + 3,60,30,0,615,613,1,0,0,0,615,616,1,0,0,0,616,59,1,0,0,0,617,626, + 3,68,34,0,618,619,5,5,0,0,619,621,3,62,31,0,620,622,5,4,0,0,621, + 620,1,0,0,0,621,622,1,0,0,0,622,623,1,0,0,0,623,624,5,6,0,0,624, + 626,1,0,0,0,625,617,1,0,0,0,625,618,1,0,0,0,626,61,1,0,0,0,627,630, + 3,64,32,0,628,630,3,60,30,0,629,627,1,0,0,0,629,628,1,0,0,0,630, + 638,1,0,0,0,631,634,5,4,0,0,632,635,3,64,32,0,633,635,3,60,30,0, + 634,632,1,0,0,0,634,633,1,0,0,0,635,637,1,0,0,0,636,631,1,0,0,0, + 637,640,1,0,0,0,638,636,1,0,0,0,638,639,1,0,0,0,639,63,1,0,0,0,640, + 638,1,0,0,0,641,643,3,66,33,0,642,641,1,0,0,0,643,644,1,0,0,0,644, + 642,1,0,0,0,644,645,1,0,0,0,645,646,1,0,0,0,646,647,5,50,0,0,647, + 648,3,60,30,0,648,65,1,0,0,0,649,650,5,91,0,0,650,651,3,68,34,0, + 651,652,5,92,0,0,652,656,1,0,0,0,653,654,5,52,0,0,654,656,5,96,0, + 0,655,649,1,0,0,0,655,653,1,0,0,0,656,67,1,0,0,0,657,658,6,34,-1, + 0,658,689,3,70,35,0,659,660,7,3,0,0,660,689,5,96,0,0,661,662,5,96, + 0,0,662,671,5,20,0,0,663,668,3,68,34,0,664,665,5,4,0,0,665,667,3, + 68,34,0,666,664,1,0,0,0,667,670,1,0,0,0,668,666,1,0,0,0,668,669, + 1,0,0,0,669,672,1,0,0,0,670,668,1,0,0,0,671,663,1,0,0,0,671,672, + 1,0,0,0,672,673,1,0,0,0,673,689,5,21,0,0,674,675,7,4,0,0,675,689, + 3,68,34,17,676,677,7,5,0,0,677,689,3,68,34,16,678,679,7,6,0,0,679, + 689,3,68,34,15,680,683,5,20,0,0,681,684,3,36,18,0,682,684,3,40,20, + 0,683,681,1,0,0,0,683,682,1,0,0,0,684,685,1,0,0,0,685,686,5,21,0, + 0,686,687,3,68,34,14,687,689,1,0,0,0,688,657,1,0,0,0,688,659,1,0, + 0,0,688,661,1,0,0,0,688,674,1,0,0,0,688,676,1,0,0,0,688,678,1,0, + 0,0,688,680,1,0,0,0,689,745,1,0,0,0,690,691,10,13,0,0,691,692,7, + 7,0,0,692,744,3,68,34,14,693,694,10,12,0,0,694,695,7,8,0,0,695,744, + 3,68,34,13,696,697,10,11,0,0,697,698,7,9,0,0,698,744,3,68,34,12, + 699,700,10,10,0,0,700,701,7,10,0,0,701,744,3,68,34,11,702,703,10, + 9,0,0,703,704,7,11,0,0,704,744,3,68,34,10,705,706,10,8,0,0,706,707, + 5,35,0,0,707,744,3,68,34,9,708,709,10,7,0,0,709,710,5,68,0,0,710, + 744,3,68,34,8,711,712,10,6,0,0,712,713,5,69,0,0,713,744,3,68,34, + 7,714,715,10,5,0,0,715,716,5,70,0,0,716,744,3,68,34,6,717,718,10, + 4,0,0,718,719,5,71,0,0,719,744,3,68,34,5,720,721,10,3,0,0,721,722, + 5,16,0,0,722,744,3,68,34,4,723,724,10,2,0,0,724,725,5,72,0,0,725, + 726,3,68,34,0,726,727,5,15,0,0,727,728,3,68,34,2,728,744,1,0,0,0, + 729,730,10,1,0,0,730,731,7,12,0,0,731,744,3,68,34,1,732,733,10,20, + 0,0,733,734,5,91,0,0,734,737,3,68,34,0,735,736,5,15,0,0,736,738, + 3,68,34,0,737,735,1,0,0,0,737,738,1,0,0,0,738,739,1,0,0,0,739,740, + 5,92,0,0,740,744,1,0,0,0,741,742,10,18,0,0,742,744,7,4,0,0,743,690, + 1,0,0,0,743,693,1,0,0,0,743,696,1,0,0,0,743,699,1,0,0,0,743,702, + 1,0,0,0,743,705,1,0,0,0,743,708,1,0,0,0,743,711,1,0,0,0,743,714, + 1,0,0,0,743,717,1,0,0,0,743,720,1,0,0,0,743,723,1,0,0,0,743,729, + 1,0,0,0,743,732,1,0,0,0,743,741,1,0,0,0,744,747,1,0,0,0,745,743, + 1,0,0,0,745,746,1,0,0,0,746,69,1,0,0,0,747,745,1,0,0,0,748,760,5, + 96,0,0,749,760,3,74,37,0,750,752,3,72,36,0,751,750,1,0,0,0,752,753, + 1,0,0,0,753,751,1,0,0,0,753,754,1,0,0,0,754,760,1,0,0,0,755,756, + 5,20,0,0,756,757,3,68,34,0,757,758,5,21,0,0,758,760,1,0,0,0,759, + 748,1,0,0,0,759,749,1,0,0,0,759,751,1,0,0,0,759,755,1,0,0,0,760, + 71,1,0,0,0,761,762,7,13,0,0,762,73,1,0,0,0,763,768,3,76,38,0,764, + 768,3,78,39,0,765,768,3,82,41,0,766,768,3,80,40,0,767,763,1,0,0, + 0,767,764,1,0,0,0,767,765,1,0,0,0,767,766,1,0,0,0,768,75,1,0,0,0, + 769,770,5,95,0,0,770,77,1,0,0,0,771,772,5,94,0,0,772,79,1,0,0,0, + 773,774,5,93,0,0,774,81,1,0,0,0,775,776,5,97,0,0,776,83,1,0,0,0, + 777,778,5,91,0,0,778,779,5,91,0,0,779,85,1,0,0,0,780,781,5,92,0, + 0,781,782,5,92,0,0,782,87,1,0,0,0,783,784,7,14,0,0,784,89,1,0,0, + 0,785,786,7,15,0,0,786,91,1,0,0,0,787,788,7,16,0,0,788,93,1,0,0, + 0,789,790,7,17,0,0,790,95,1,0,0,0,88,99,105,118,121,127,139,142, + 148,152,160,162,171,179,186,194,201,205,211,220,231,243,246,258, + 269,276,282,291,297,302,304,311,316,326,329,347,352,382,388,395, + 407,412,417,425,431,438,442,445,448,456,459,464,466,475,478,485, + 493,501,507,517,522,528,546,551,564,573,580,588,595,604,610,615, + 621,625,629,634,638,644,655,668,671,683,688,737,743,745,753,759, + 767 ] class CoreDSL2Parser ( Parser ): @@ -322,11 +325,11 @@ class CoreDSL2Parser ( Parser ): literalNames = [ "", "'import'", "'InstructionSet'", "'extends'", "','", "'{'", "'}'", "'Core'", "'provides'", "'architectural_state'", "';'", "'functions'", "'instructions'", "'always'", - "'encoding'", "':'", "'::'", "'args_disass'", "'assembly'", - "'behavior'", "'extern'", "'('", "')'", "'if'", "'else'", - "'for'", "'while'", "'do'", "'switch'", "'return'", - "'break'", "'continue'", "'spawn'", "'case'", "'default'", - "'*'", "'&'", "'<'", "'>'", "'bool'", "'void'", "'enum'", + "'encoding'", "':'", "'::'", "'assembly'", "'behavior'", + "'extern'", "'('", "')'", "'if'", "'else'", "'for'", + "'while'", "'do'", "'switch'", "'return'", "'break'", + "'continue'", "'spawn'", "'case'", "'default'", "'*'", + "'&'", "'<'", "'>'", "'bool'", "'void'", "'enum'", "'unsigned'", "'signed'", "'char'", "'short'", "'int'", "'long'", "'float'", "'double'", "'[['", "'='", "']]'", "'.'", "'->'", "'++'", "'--'", "'+'", "'-'", "'~'", @@ -359,10 +362,10 @@ class CoreDSL2Parser ( Parser ): "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", - "LEFT_BR", "RIGHT_BR", "BOOLEAN", "FLOAT", "INTEGER", - "IDENTIFIER", "CHARCONST", "ENCSTRINGCONST", "STRING", - "ML_COMMENT", "SL_COMMENT", "WS" ] + "", "", "", "LEFT_BR", + "RIGHT_BR", "BOOLEAN", "FLOAT", "INTEGER", "IDENTIFIER", + "CHARCONST", "ENCSTRINGCONST", "STRING", "ML_COMMENT", + "SL_COMMENT", "WS" ] RULE_description_content = 0 RULE_import_file = 1 @@ -520,19 +523,18 @@ class CoreDSL2Parser ( Parser ): T__87=88 T__88=89 T__89=90 - T__90=91 - LEFT_BR=92 - RIGHT_BR=93 - BOOLEAN=94 - FLOAT=95 - INTEGER=96 - IDENTIFIER=97 - CHARCONST=98 - ENCSTRINGCONST=99 - STRING=100 - ML_COMMENT=101 - SL_COMMENT=102 - WS=103 + LEFT_BR=91 + RIGHT_BR=92 + BOOLEAN=93 + FLOAT=94 + INTEGER=95 + IDENTIFIER=96 + CHARCONST=97 + ENCSTRINGCONST=98 + STRING=99 + ML_COMMENT=100 + SL_COMMENT=101 + WS=102 def __init__(self, input:TokenStream, output:TextIO = sys.stdout): super().__init__(input, output) @@ -1076,12 +1078,12 @@ def section(self): self.state = 160 self._errHandler.sync(self) token = self._input.LA(1) - if token in [20, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 86, 87, 88, 89, 90, 91]: + if token in [19, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 85, 86, 87, 88, 89, 90]: self.state = 156 localctx._declaration = self.declaration() localctx.declarations.append(localctx._declaration) pass - elif token in [21, 35, 36, 53, 54, 55, 56, 57, 58, 59, 60, 94, 95, 96, 97, 98, 99, 100]: + elif token in [20, 34, 35, 52, 53, 54, 55, 56, 57, 58, 59, 93, 94, 95, 96, 97, 98, 99]: self.state = 157 localctx._expression = self.expression(0) localctx.expressions.append(localctx._expression) @@ -1094,7 +1096,7 @@ def section(self): self.state = 162 self._errHandler.sync(self) _la = self._input.LA(1) - if not ((((_la) & ~0x3f) == 0 and ((1 << _la) & 2299087163099185152) != 0) or ((((_la - 86)) & ~0x3f) == 0 and ((1 << (_la - 86)) & 32575) != 0)): + if not ((((_la) & ~0x3f) == 0 and ((1 << _la) & 1149543581549592576) != 0) or ((((_la - 85)) & ~0x3f) == 0 and ((1 << (_la - 85)) & 32575) != 0)): break self.state = 164 @@ -1117,7 +1119,7 @@ def section(self): self.state = 171 self._errHandler.sync(self) _la = self._input.LA(1) - if not ((((_la) & ~0x3f) == 0 and ((1 << _la) & 1125350152077312) != 0) or _la==90 or _la==91): + if not ((((_la) & ~0x3f) == 0 and ((1 << _la) & 562675076038656) != 0) or _la==89 or _la==90): break self.state = 173 @@ -1131,7 +1133,7 @@ def section(self): self.state = 179 self._errHandler.sync(self) _la = self._input.LA(1) - while _la==50: + while _la==49: self.state = 176 localctx._attribute = self.attribute() localctx.attributes.append(localctx._attribute) @@ -1144,7 +1146,7 @@ def section(self): self.state = 186 self._errHandler.sync(self) _la = self._input.LA(1) - while _la==97: + while _la==96: self.state = 183 localctx._instruction = self.instruction() localctx.instructions.append(localctx._instruction) @@ -1163,7 +1165,7 @@ def section(self): self.state = 194 self._errHandler.sync(self) _la = self._input.LA(1) - while _la==50: + while _la==49: self.state = 191 localctx._attribute = self.attribute() localctx.attributes.append(localctx._attribute) @@ -1183,7 +1185,7 @@ def section(self): self.state = 201 self._errHandler.sync(self) _la = self._input.LA(1) - if not (_la==97): + if not (_la==96): break self.state = 203 @@ -1258,7 +1260,7 @@ def always_block(self): self.state = 211 self._errHandler.sync(self) _la = self._input.LA(1) - while _la==50: + while _la==49: self.state = 208 localctx._attribute = self.attribute() localctx.attributes.append(localctx._attribute) @@ -1288,7 +1290,8 @@ def __init__(self, parser, parent:ParserRuleContext=None, invokingState:int=-1): self.attributes = list() # of AttributeContexts self._encoding_entry = None # Encoding_entryContext self.encoding = list() # of Encoding_entryContexts - self.disass = None # Token + self.assembly = None # Token + self.mnemonic = None # Token self.behavior = None # StatementContext def IDENTIFIER(self): @@ -1312,8 +1315,11 @@ def attribute(self, i:int=None): return self.getTypedRuleContext(CoreDSL2Parser.AttributeContext,i) - def STRING(self): - return self.getToken(CoreDSL2Parser.STRING, 0) + def STRING(self, i:int=None): + if i is None: + return self.getTokens(CoreDSL2Parser.STRING) + else: + return self.getToken(CoreDSL2Parser.STRING, i) def getRuleIndex(self): return CoreDSL2Parser.RULE_instruction @@ -1347,7 +1353,7 @@ def instruction(self): self.state = 220 self._errHandler.sync(self) _la = self._input.LA(1) - while _la==50: + while _la==49: self.state = 217 localctx._attribute = self.attribute() localctx.attributes.append(localctx._attribute) @@ -1379,32 +1385,47 @@ def instruction(self): self.state = 234 self.match(CoreDSL2Parser.T__9) - self.state = 239 + self.state = 246 self._errHandler.sync(self) _la = self._input.LA(1) - if _la==17 or _la==18: + if _la==17: self.state = 235 - _la = self._input.LA(1) - if not(_la==17 or _la==18): - self._errHandler.recoverInline(self) - else: - self._errHandler.reportMatch(self) - self.consume() + self.match(CoreDSL2Parser.T__16) self.state = 236 self.match(CoreDSL2Parser.T__14) - self.state = 237 - localctx.disass = self.match(CoreDSL2Parser.STRING) - self.state = 238 + self.state = 243 + self._errHandler.sync(self) + token = self._input.LA(1) + if token in [99]: + self.state = 237 + localctx.assembly = self.match(CoreDSL2Parser.STRING) + pass + elif token in [5]: + self.state = 238 + self.match(CoreDSL2Parser.T__4) + self.state = 239 + localctx.mnemonic = self.match(CoreDSL2Parser.STRING) + self.state = 240 + self.match(CoreDSL2Parser.T__3) + self.state = 241 + localctx.assembly = self.match(CoreDSL2Parser.STRING) + self.state = 242 + self.match(CoreDSL2Parser.T__5) + pass + else: + raise NoViableAltException(self) + + self.state = 245 self.match(CoreDSL2Parser.T__9) - self.state = 241 - self.match(CoreDSL2Parser.T__18) - self.state = 242 + self.state = 248 + self.match(CoreDSL2Parser.T__17) + self.state = 249 self.match(CoreDSL2Parser.T__14) - self.state = 243 + self.state = 250 localctx.behavior = self.statement() - self.state = 244 + self.state = 251 self.match(CoreDSL2Parser.T__5) except RecognitionException as re: localctx.exception = re @@ -1458,19 +1479,19 @@ def rule_encoding(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 246 + self.state = 253 localctx._encoding_entry = self.encoding_entry() localctx.fields.append(localctx._encoding_entry) - self.state = 251 + self.state = 258 self._errHandler.sync(self) _la = self._input.LA(1) while _la==16: - self.state = 247 + self.state = 254 self.match(CoreDSL2Parser.T__15) - self.state = 248 + self.state = 255 localctx._encoding_entry = self.encoding_entry() localctx.fields.append(localctx._encoding_entry) - self.state = 253 + self.state = 260 self._errHandler.sync(self) _la = self._input.LA(1) @@ -1569,29 +1590,29 @@ def encoding_entry(self): localctx = CoreDSL2Parser.Encoding_entryContext(self, self._ctx, self.state) self.enterRule(localctx, 14, self.RULE_encoding_entry) try: - self.state = 262 + self.state = 269 self._errHandler.sync(self) token = self._input.LA(1) - if token in [96]: + if token in [95]: localctx = CoreDSL2Parser.Bit_valueContext(self, localctx) self.enterOuterAlt(localctx, 1) - self.state = 254 + self.state = 261 localctx.value = self.integer_constant() pass - elif token in [97]: + elif token in [96]: localctx = CoreDSL2Parser.Bit_fieldContext(self, localctx) self.enterOuterAlt(localctx, 2) - self.state = 255 + self.state = 262 localctx.name = self.match(CoreDSL2Parser.IDENTIFIER) - self.state = 256 + self.state = 263 self.match(CoreDSL2Parser.LEFT_BR) - self.state = 257 + self.state = 264 localctx.left = self.integer_constant() - self.state = 258 + self.state = 265 self.match(CoreDSL2Parser.T__14) - self.state = 259 + self.state = 266 localctx.right = self.integer_constant() - self.state = 260 + self.state = 267 self.match(CoreDSL2Parser.RIGHT_BR) pass else: @@ -1668,81 +1689,81 @@ def function_definition(self): self.enterRule(localctx, 16, self.RULE_function_definition) self._la = 0 # Token type try: - self.state = 297 + self.state = 304 self._errHandler.sync(self) token = self._input.LA(1) - if token in [20]: + if token in [19]: self.enterOuterAlt(localctx, 1) - self.state = 264 - localctx.extern = self.match(CoreDSL2Parser.T__19) - self.state = 265 + self.state = 271 + localctx.extern = self.match(CoreDSL2Parser.T__18) + self.state = 272 localctx.type_ = self.type_specifier() - self.state = 266 + self.state = 273 localctx.name = self.match(CoreDSL2Parser.IDENTIFIER) - self.state = 267 - self.match(CoreDSL2Parser.T__20) - self.state = 269 + self.state = 274 + self.match(CoreDSL2Parser.T__19) + self.state = 276 self._errHandler.sync(self) _la = self._input.LA(1) - if ((((_la - 39)) & ~0x3f) == 0 and ((1 << (_la - 39)) & 6755399441057791) != 0): - self.state = 268 + if ((((_la - 38)) & ~0x3f) == 0 and ((1 << (_la - 38)) & 6755399441057791) != 0): + self.state = 275 localctx.params = self.parameter_list() - self.state = 271 - self.match(CoreDSL2Parser.T__21) - self.state = 275 + self.state = 278 + self.match(CoreDSL2Parser.T__20) + self.state = 282 self._errHandler.sync(self) _la = self._input.LA(1) - while _la==50: - self.state = 272 + while _la==49: + self.state = 279 localctx._attribute = self.attribute() localctx.attributes.append(localctx._attribute) - self.state = 277 + self.state = 284 self._errHandler.sync(self) _la = self._input.LA(1) - self.state = 278 + self.state = 285 self.match(CoreDSL2Parser.T__9) pass - elif token in [39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 90, 91]: + elif token in [38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 89, 90]: self.enterOuterAlt(localctx, 2) - self.state = 280 + self.state = 287 localctx.type_ = self.type_specifier() - self.state = 281 + self.state = 288 localctx.name = self.match(CoreDSL2Parser.IDENTIFIER) - self.state = 282 - self.match(CoreDSL2Parser.T__20) - self.state = 284 + self.state = 289 + self.match(CoreDSL2Parser.T__19) + self.state = 291 self._errHandler.sync(self) _la = self._input.LA(1) - if ((((_la - 39)) & ~0x3f) == 0 and ((1 << (_la - 39)) & 6755399441057791) != 0): - self.state = 283 + if ((((_la - 38)) & ~0x3f) == 0 and ((1 << (_la - 38)) & 6755399441057791) != 0): + self.state = 290 localctx.params = self.parameter_list() - self.state = 286 - self.match(CoreDSL2Parser.T__21) - self.state = 290 + self.state = 293 + self.match(CoreDSL2Parser.T__20) + self.state = 297 self._errHandler.sync(self) _la = self._input.LA(1) - while _la==50: - self.state = 287 + while _la==49: + self.state = 294 localctx._attribute = self.attribute() localctx.attributes.append(localctx._attribute) - self.state = 292 + self.state = 299 self._errHandler.sync(self) _la = self._input.LA(1) - self.state = 295 + self.state = 302 self._errHandler.sync(self) token = self._input.LA(1) if token in [5]: - self.state = 293 + self.state = 300 localctx.behavior = self.block() pass elif token in [10]: - self.state = 294 + self.state = 301 self.match(CoreDSL2Parser.T__9) pass else: @@ -1804,19 +1825,19 @@ def parameter_list(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 299 + self.state = 306 localctx._parameter_declaration = self.parameter_declaration() localctx.params.append(localctx._parameter_declaration) - self.state = 304 + self.state = 311 self._errHandler.sync(self) _la = self._input.LA(1) while _la==4: - self.state = 300 + self.state = 307 self.match(CoreDSL2Parser.T__3) - self.state = 301 + self.state = 308 localctx._parameter_declaration = self.parameter_declaration() localctx.params.append(localctx._parameter_declaration) - self.state = 306 + self.state = 313 self._errHandler.sync(self) _la = self._input.LA(1) @@ -1873,13 +1894,13 @@ def parameter_declaration(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 307 + self.state = 314 localctx.type_ = self.type_specifier() - self.state = 309 + self.state = 316 self._errHandler.sync(self) _la = self._input.LA(1) - if _la==97: - self.state = 308 + if _la==96: + self.state = 315 localctx.decl = self.declarator() @@ -2273,96 +2294,96 @@ def statement(self): self.enterRule(localctx, 22, self.RULE_statement) self._la = 0 # Token type try: - self.state = 400 + self.state = 407 self._errHandler.sync(self) - la_ = self._interp.adaptivePredict(self._input,38,self._ctx) + la_ = self._interp.adaptivePredict(self._input,39,self._ctx) if la_ == 1: localctx = CoreDSL2Parser.Block_statementContext(self, localctx) self.enterOuterAlt(localctx, 1) - self.state = 311 + self.state = 318 self.block() pass elif la_ == 2: localctx = CoreDSL2Parser.Procedure_callContext(self, localctx) self.enterOuterAlt(localctx, 2) - self.state = 312 + self.state = 319 localctx.ref = self.match(CoreDSL2Parser.IDENTIFIER) - self.state = 313 - self.match(CoreDSL2Parser.T__20) - self.state = 322 + self.state = 320 + self.match(CoreDSL2Parser.T__19) + self.state = 329 self._errHandler.sync(self) _la = self._input.LA(1) - if (((_la) & ~0x3f) == 0 and ((1 << _la) & 2296835913040265216) != 0) or ((((_la - 94)) & ~0x3f) == 0 and ((1 << (_la - 94)) & 127) != 0): - self.state = 314 + if (((_la) & ~0x3f) == 0 and ((1 << _la) & 1148417956520132608) != 0) or ((((_la - 93)) & ~0x3f) == 0 and ((1 << (_la - 93)) & 127) != 0): + self.state = 321 localctx._expression = self.expression(0) localctx.args.append(localctx._expression) - self.state = 319 + self.state = 326 self._errHandler.sync(self) _la = self._input.LA(1) while _la==4: - self.state = 315 + self.state = 322 self.match(CoreDSL2Parser.T__3) - self.state = 316 + self.state = 323 localctx._expression = self.expression(0) localctx.args.append(localctx._expression) - self.state = 321 + self.state = 328 self._errHandler.sync(self) _la = self._input.LA(1) - self.state = 324 - self.match(CoreDSL2Parser.T__21) - self.state = 325 + self.state = 331 + self.match(CoreDSL2Parser.T__20) + self.state = 332 self.match(CoreDSL2Parser.T__9) pass elif la_ == 3: localctx = CoreDSL2Parser.If_statementContext(self, localctx) self.enterOuterAlt(localctx, 3) - self.state = 326 - localctx.type_ = self.match(CoreDSL2Parser.T__22) - self.state = 327 - self.match(CoreDSL2Parser.T__20) - self.state = 328 + self.state = 333 + localctx.type_ = self.match(CoreDSL2Parser.T__21) + self.state = 334 + self.match(CoreDSL2Parser.T__19) + self.state = 335 localctx._expression = self.expression(0) localctx.cond.append(localctx._expression) - self.state = 329 - self.match(CoreDSL2Parser.T__21) - self.state = 330 + self.state = 336 + self.match(CoreDSL2Parser.T__20) + self.state = 337 localctx._statement = self.statement() localctx.stmt.append(localctx._statement) - self.state = 340 + self.state = 347 self._errHandler.sync(self) - _alt = self._interp.adaptivePredict(self._input,33,self._ctx) + _alt = self._interp.adaptivePredict(self._input,34,self._ctx) while _alt!=2 and _alt!=ATN.INVALID_ALT_NUMBER: if _alt==1: - self.state = 331 - self.match(CoreDSL2Parser.T__23) - self.state = 332 + self.state = 338 self.match(CoreDSL2Parser.T__22) - self.state = 333 - self.match(CoreDSL2Parser.T__20) - self.state = 334 + self.state = 339 + self.match(CoreDSL2Parser.T__21) + self.state = 340 + self.match(CoreDSL2Parser.T__19) + self.state = 341 localctx._expression = self.expression(0) localctx.cond.append(localctx._expression) - self.state = 335 - self.match(CoreDSL2Parser.T__21) - self.state = 336 + self.state = 342 + self.match(CoreDSL2Parser.T__20) + self.state = 343 localctx._statement = self.statement() localctx.stmt.append(localctx._statement) - self.state = 342 + self.state = 349 self._errHandler.sync(self) - _alt = self._interp.adaptivePredict(self._input,33,self._ctx) + _alt = self._interp.adaptivePredict(self._input,34,self._ctx) - self.state = 345 + self.state = 352 self._errHandler.sync(self) - la_ = self._interp.adaptivePredict(self._input,34,self._ctx) + la_ = self._interp.adaptivePredict(self._input,35,self._ctx) if la_ == 1: - self.state = 343 - self.match(CoreDSL2Parser.T__23) - self.state = 344 + self.state = 350 + self.match(CoreDSL2Parser.T__22) + self.state = 351 localctx._statement = self.statement() localctx.stmt.append(localctx._statement) @@ -2372,141 +2393,141 @@ def statement(self): elif la_ == 4: localctx = CoreDSL2Parser.For_statementContext(self, localctx) self.enterOuterAlt(localctx, 4) - self.state = 347 - localctx.type_ = self.match(CoreDSL2Parser.T__24) - self.state = 348 - self.match(CoreDSL2Parser.T__20) - self.state = 349 + self.state = 354 + localctx.type_ = self.match(CoreDSL2Parser.T__23) + self.state = 355 + self.match(CoreDSL2Parser.T__19) + self.state = 356 localctx.cond = self.for_condition() - self.state = 350 - self.match(CoreDSL2Parser.T__21) - self.state = 351 + self.state = 357 + self.match(CoreDSL2Parser.T__20) + self.state = 358 localctx.stmt = self.statement() pass elif la_ == 5: localctx = CoreDSL2Parser.While_statementContext(self, localctx) self.enterOuterAlt(localctx, 5) - self.state = 353 - localctx.type_ = self.match(CoreDSL2Parser.T__25) - self.state = 354 - self.match(CoreDSL2Parser.T__20) - self.state = 355 + self.state = 360 + localctx.type_ = self.match(CoreDSL2Parser.T__24) + self.state = 361 + self.match(CoreDSL2Parser.T__19) + self.state = 362 localctx.cond = self.expression(0) - self.state = 356 - self.match(CoreDSL2Parser.T__21) - self.state = 357 + self.state = 363 + self.match(CoreDSL2Parser.T__20) + self.state = 364 localctx.stmt = self.statement() pass elif la_ == 6: localctx = CoreDSL2Parser.Do_statementContext(self, localctx) self.enterOuterAlt(localctx, 6) - self.state = 359 - localctx.type_ = self.match(CoreDSL2Parser.T__26) - self.state = 360 + self.state = 366 + localctx.type_ = self.match(CoreDSL2Parser.T__25) + self.state = 367 localctx.stmt = self.statement() - self.state = 361 - self.match(CoreDSL2Parser.T__25) - self.state = 362 - self.match(CoreDSL2Parser.T__20) - self.state = 363 + self.state = 368 + self.match(CoreDSL2Parser.T__24) + self.state = 369 + self.match(CoreDSL2Parser.T__19) + self.state = 370 localctx.cond = self.expression(0) - self.state = 364 - self.match(CoreDSL2Parser.T__21) - self.state = 365 + self.state = 371 + self.match(CoreDSL2Parser.T__20) + self.state = 372 self.match(CoreDSL2Parser.T__9) pass elif la_ == 7: localctx = CoreDSL2Parser.Switch_statementContext(self, localctx) self.enterOuterAlt(localctx, 7) - self.state = 367 - localctx.type_ = self.match(CoreDSL2Parser.T__27) - self.state = 368 - self.match(CoreDSL2Parser.T__20) - self.state = 369 + self.state = 374 + localctx.type_ = self.match(CoreDSL2Parser.T__26) + self.state = 375 + self.match(CoreDSL2Parser.T__19) + self.state = 376 localctx.cond = self.expression(0) - self.state = 370 - self.match(CoreDSL2Parser.T__21) - self.state = 371 + self.state = 377 + self.match(CoreDSL2Parser.T__20) + self.state = 378 self.match(CoreDSL2Parser.T__4) - self.state = 375 + self.state = 382 self._errHandler.sync(self) - _alt = self._interp.adaptivePredict(self._input,35,self._ctx) + _alt = self._interp.adaptivePredict(self._input,36,self._ctx) while _alt!=2 and _alt!=ATN.INVALID_ALT_NUMBER: if _alt==1: - self.state = 372 + self.state = 379 localctx._switch_block_statement_group = self.switch_block_statement_group() localctx.items.append(localctx._switch_block_statement_group) - self.state = 377 + self.state = 384 self._errHandler.sync(self) - _alt = self._interp.adaptivePredict(self._input,35,self._ctx) + _alt = self._interp.adaptivePredict(self._input,36,self._ctx) - self.state = 381 + self.state = 388 self._errHandler.sync(self) _la = self._input.LA(1) - while _la==33 or _la==34: - self.state = 378 + while _la==32 or _la==33: + self.state = 385 self.switch_label() - self.state = 383 + self.state = 390 self._errHandler.sync(self) _la = self._input.LA(1) - self.state = 384 + self.state = 391 self.match(CoreDSL2Parser.T__5) pass elif la_ == 8: localctx = CoreDSL2Parser.Return_statementContext(self, localctx) self.enterOuterAlt(localctx, 8) - self.state = 386 - localctx.type_ = self.match(CoreDSL2Parser.T__28) - self.state = 388 + self.state = 393 + localctx.type_ = self.match(CoreDSL2Parser.T__27) + self.state = 395 self._errHandler.sync(self) _la = self._input.LA(1) - if (((_la) & ~0x3f) == 0 and ((1 << _la) & 2296835913040265216) != 0) or ((((_la - 94)) & ~0x3f) == 0 and ((1 << (_la - 94)) & 127) != 0): - self.state = 387 + if (((_la) & ~0x3f) == 0 and ((1 << _la) & 1148417956520132608) != 0) or ((((_la - 93)) & ~0x3f) == 0 and ((1 << (_la - 93)) & 127) != 0): + self.state = 394 localctx.expr = self.expression(0) - self.state = 390 + self.state = 397 self.match(CoreDSL2Parser.T__9) pass elif la_ == 9: localctx = CoreDSL2Parser.Break_statementContext(self, localctx) self.enterOuterAlt(localctx, 9) - self.state = 391 - localctx.type_ = self.match(CoreDSL2Parser.T__29) - self.state = 392 + self.state = 398 + localctx.type_ = self.match(CoreDSL2Parser.T__28) + self.state = 399 self.match(CoreDSL2Parser.T__9) pass elif la_ == 10: localctx = CoreDSL2Parser.Continue_statementContext(self, localctx) self.enterOuterAlt(localctx, 10) - self.state = 393 - localctx.type_ = self.match(CoreDSL2Parser.T__30) - self.state = 394 + self.state = 400 + localctx.type_ = self.match(CoreDSL2Parser.T__29) + self.state = 401 self.match(CoreDSL2Parser.T__9) pass elif la_ == 11: localctx = CoreDSL2Parser.Spawn_statementContext(self, localctx) self.enterOuterAlt(localctx, 11) - self.state = 395 - localctx.type_ = self.match(CoreDSL2Parser.T__31) - self.state = 396 + self.state = 402 + localctx.type_ = self.match(CoreDSL2Parser.T__30) + self.state = 403 localctx.stmt = self.statement() pass elif la_ == 12: localctx = CoreDSL2Parser.Expression_statementContext(self, localctx) self.enterOuterAlt(localctx, 12) - self.state = 397 + self.state = 404 localctx.expr = self.expression(0) - self.state = 398 + self.state = 405 self.match(CoreDSL2Parser.T__9) pass @@ -2572,30 +2593,30 @@ def switch_block_statement_group(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 403 + self.state = 410 self._errHandler.sync(self) _la = self._input.LA(1) while True: - self.state = 402 + self.state = 409 localctx._switch_label = self.switch_label() localctx.labels.append(localctx._switch_label) - self.state = 405 + self.state = 412 self._errHandler.sync(self) _la = self._input.LA(1) - if not (_la==33 or _la==34): + if not (_la==32 or _la==33): break - self.state = 408 + self.state = 415 self._errHandler.sync(self) _la = self._input.LA(1) while True: - self.state = 407 + self.state = 414 localctx._statement = self.statement() localctx.statements.append(localctx._statement) - self.state = 410 + self.state = 417 self._errHandler.sync(self) _la = self._input.LA(1) - if not ((((_la) & ~0x3f) == 0 and ((1 << _la) & 2296835921605034016) != 0) or ((((_la - 94)) & ~0x3f) == 0 and ((1 << (_la - 94)) & 127) != 0)): + if not ((((_la) & ~0x3f) == 0 and ((1 << _la) & 1148417960802517024) != 0) or ((((_la - 93)) & ~0x3f) == 0 and ((1 << (_la - 93)) & 127) != 0)): break except RecognitionException as re: @@ -2644,23 +2665,23 @@ def switch_label(self): localctx = CoreDSL2Parser.Switch_labelContext(self, self._ctx, self.state) self.enterRule(localctx, 26, self.RULE_switch_label) try: - self.state = 418 + self.state = 425 self._errHandler.sync(self) token = self._input.LA(1) - if token in [33]: + if token in [32]: self.enterOuterAlt(localctx, 1) - self.state = 412 - self.match(CoreDSL2Parser.T__32) - self.state = 413 + self.state = 419 + self.match(CoreDSL2Parser.T__31) + self.state = 420 localctx.const_expr = self.expression(0) - self.state = 414 + self.state = 421 self.match(CoreDSL2Parser.T__14) pass - elif token in [34]: + elif token in [33]: self.enterOuterAlt(localctx, 2) - self.state = 416 - self.match(CoreDSL2Parser.T__33) - self.state = 417 + self.state = 423 + self.match(CoreDSL2Parser.T__32) + self.state = 424 self.match(CoreDSL2Parser.T__14) pass else: @@ -2718,20 +2739,20 @@ def block(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 420 + self.state = 427 self.match(CoreDSL2Parser.T__4) - self.state = 424 + self.state = 431 self._errHandler.sync(self) _la = self._input.LA(1) - while (((_la) & ~0x3f) == 0 and ((1 << _la) & 2299087171663953952) != 0) or ((((_la - 86)) & ~0x3f) == 0 and ((1 << (_la - 86)) & 32575) != 0): - self.state = 421 + while (((_la) & ~0x3f) == 0 and ((1 << _la) & 1149543585831976992) != 0) or ((((_la - 85)) & ~0x3f) == 0 and ((1 << (_la - 85)) & 32575) != 0): + self.state = 428 localctx._block_item = self.block_item() localctx.items.append(localctx._block_item) - self.state = 426 + self.state = 433 self._errHandler.sync(self) _la = self._input.LA(1) - self.state = 427 + self.state = 434 self.match(CoreDSL2Parser.T__5) except RecognitionException as re: localctx.exception = re @@ -2782,17 +2803,17 @@ def block_item(self): localctx = CoreDSL2Parser.Block_itemContext(self, self._ctx, self.state) self.enterRule(localctx, 30, self.RULE_block_item) try: - self.state = 431 + self.state = 438 self._errHandler.sync(self) token = self._input.LA(1) - if token in [5, 21, 23, 25, 26, 27, 28, 29, 30, 31, 32, 35, 36, 53, 54, 55, 56, 57, 58, 59, 60, 94, 95, 96, 97, 98, 99, 100]: + if token in [5, 20, 22, 24, 25, 26, 27, 28, 29, 30, 31, 34, 35, 52, 53, 54, 55, 56, 57, 58, 59, 93, 94, 95, 96, 97, 98, 99]: self.enterOuterAlt(localctx, 1) - self.state = 429 + self.state = 436 self.statement() pass - elif token in [20, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 86, 87, 88, 89, 90, 91]: + elif token in [19, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 85, 86, 87, 88, 89, 90]: self.enterOuterAlt(localctx, 2) - self.state = 430 + self.state = 437 self.declaration() pass else: @@ -2857,55 +2878,55 @@ def for_condition(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 438 + self.state = 445 self._errHandler.sync(self) token = self._input.LA(1) - if token in [20, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 86, 87, 88, 89, 90, 91]: - self.state = 433 + if token in [19, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 85, 86, 87, 88, 89, 90]: + self.state = 440 localctx.start_decl = self.declaration() pass - elif token in [10, 21, 35, 36, 53, 54, 55, 56, 57, 58, 59, 60, 94, 95, 96, 97, 98, 99, 100]: - self.state = 435 + elif token in [10, 20, 34, 35, 52, 53, 54, 55, 56, 57, 58, 59, 93, 94, 95, 96, 97, 98, 99]: + self.state = 442 self._errHandler.sync(self) _la = self._input.LA(1) - if (((_la) & ~0x3f) == 0 and ((1 << _la) & 2296835913040265216) != 0) or ((((_la - 94)) & ~0x3f) == 0 and ((1 << (_la - 94)) & 127) != 0): - self.state = 434 + if (((_la) & ~0x3f) == 0 and ((1 << _la) & 1148417956520132608) != 0) or ((((_la - 93)) & ~0x3f) == 0 and ((1 << (_la - 93)) & 127) != 0): + self.state = 441 localctx.start_expr = self.expression(0) - self.state = 437 + self.state = 444 self.match(CoreDSL2Parser.T__9) pass else: raise NoViableAltException(self) - self.state = 441 + self.state = 448 self._errHandler.sync(self) _la = self._input.LA(1) - if (((_la) & ~0x3f) == 0 and ((1 << _la) & 2296835913040265216) != 0) or ((((_la - 94)) & ~0x3f) == 0 and ((1 << (_la - 94)) & 127) != 0): - self.state = 440 + if (((_la) & ~0x3f) == 0 and ((1 << _la) & 1148417956520132608) != 0) or ((((_la - 93)) & ~0x3f) == 0 and ((1 << (_la - 93)) & 127) != 0): + self.state = 447 localctx.end_expr = self.expression(0) - self.state = 443 + self.state = 450 self.match(CoreDSL2Parser.T__9) - self.state = 452 + self.state = 459 self._errHandler.sync(self) _la = self._input.LA(1) - if (((_la) & ~0x3f) == 0 and ((1 << _la) & 2296835913040265216) != 0) or ((((_la - 94)) & ~0x3f) == 0 and ((1 << (_la - 94)) & 127) != 0): - self.state = 444 + if (((_la) & ~0x3f) == 0 and ((1 << _la) & 1148417956520132608) != 0) or ((((_la - 93)) & ~0x3f) == 0 and ((1 << (_la - 93)) & 127) != 0): + self.state = 451 localctx._expression = self.expression(0) localctx.loop_exprs.append(localctx._expression) - self.state = 449 + self.state = 456 self._errHandler.sync(self) _la = self._input.LA(1) while _la==4: - self.state = 445 + self.state = 452 self.match(CoreDSL2Parser.T__3) - self.state = 446 + self.state = 453 localctx._expression = self.expression(0) localctx.loop_exprs.append(localctx._expression) - self.state = 451 + self.state = 458 self._errHandler.sync(self) _la = self._input.LA(1) @@ -2995,60 +3016,60 @@ def declaration(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 459 + self.state = 466 self._errHandler.sync(self) _la = self._input.LA(1) - while _la==20 or _la==50 or ((((_la - 86)) & ~0x3f) == 0 and ((1 << (_la - 86)) & 15) != 0): - self.state = 457 + while _la==19 or _la==49 or ((((_la - 85)) & ~0x3f) == 0 and ((1 << (_la - 85)) & 15) != 0): + self.state = 464 self._errHandler.sync(self) token = self._input.LA(1) - if token in [20, 88, 89]: - self.state = 454 + if token in [19, 87, 88]: + self.state = 461 localctx._storage_class_specifier = self.storage_class_specifier() localctx.storage.append(localctx._storage_class_specifier) pass - elif token in [86, 87]: - self.state = 455 + elif token in [85, 86]: + self.state = 462 localctx._type_qualifier = self.type_qualifier() localctx.qualifiers.append(localctx._type_qualifier) pass - elif token in [50]: - self.state = 456 + elif token in [49]: + self.state = 463 localctx._attribute = self.attribute() localctx.attributes.append(localctx._attribute) pass else: raise NoViableAltException(self) - self.state = 461 + self.state = 468 self._errHandler.sync(self) _la = self._input.LA(1) - self.state = 462 + self.state = 469 localctx.type_ = self.type_specifier() - self.state = 471 + self.state = 478 self._errHandler.sync(self) _la = self._input.LA(1) - if _la==97: - self.state = 463 + if _la==96: + self.state = 470 localctx._declarator = self.declarator() localctx.declarations.append(localctx._declarator) - self.state = 468 + self.state = 475 self._errHandler.sync(self) _la = self._input.LA(1) while _la==4: - self.state = 464 + self.state = 471 self.match(CoreDSL2Parser.T__3) - self.state = 465 + self.state = 472 localctx._declarator = self.declarator() localctx.declarations.append(localctx._declarator) - self.state = 470 + self.state = 477 self._errHandler.sync(self) _la = self._input.LA(1) - self.state = 473 + self.state = 480 self.match(CoreDSL2Parser.T__9) except RecognitionException as re: localctx.exception = re @@ -3098,20 +3119,20 @@ def type_specifier(self): self.enterRule(localctx, 36, self.RULE_type_specifier) try: self.enterOuterAlt(localctx, 1) - self.state = 475 + self.state = 482 localctx.type_ = self.value_type_specifier() - self.state = 478 + self.state = 485 self._errHandler.sync(self) token = self._input.LA(1) - if token in [35]: - self.state = 476 - localctx.ptr = self.match(CoreDSL2Parser.T__34) + if token in [34]: + self.state = 483 + localctx.ptr = self.match(CoreDSL2Parser.T__33) pass - elif token in [36]: - self.state = 477 - localctx.ptr = self.match(CoreDSL2Parser.T__35) + elif token in [35]: + self.state = 484 + localctx.ptr = self.match(CoreDSL2Parser.T__34) pass - elif token in [4, 10, 22, 97]: + elif token in [4, 10, 21, 96]: pass else: pass @@ -3375,28 +3396,28 @@ def value_type_specifier(self): self.enterRule(localctx, 38, self.RULE_value_type_specifier) self._la = 0 # Token type try: - self.state = 521 + self.state = 528 self._errHandler.sync(self) - la_ = self._interp.adaptivePredict(self._input,59,self._ctx) + la_ = self._interp.adaptivePredict(self._input,60,self._ctx) if la_ == 1: localctx = CoreDSL2Parser.Integer_typeContext(self, localctx) self.enterOuterAlt(localctx, 1) - self.state = 480 + self.state = 487 localctx.signed = self.integer_signedness() - self.state = 486 + self.state = 493 self._errHandler.sync(self) token = self._input.LA(1) - if token in [44, 45, 46, 47]: - self.state = 481 + if token in [43, 44, 45, 46]: + self.state = 488 localctx.shorthand = self.integer_shorthand() pass - elif token in [37]: - self.state = 482 - self.match(CoreDSL2Parser.T__36) - self.state = 483 + elif token in [36]: + self.state = 489 + self.match(CoreDSL2Parser.T__35) + self.state = 490 localctx.size = self.primary() - self.state = 484 - self.match(CoreDSL2Parser.T__37) + self.state = 491 + self.match(CoreDSL2Parser.T__36) pass else: raise NoViableAltException(self) @@ -3406,105 +3427,105 @@ def value_type_specifier(self): elif la_ == 2: localctx = CoreDSL2Parser.Integer_typeContext(self, localctx) self.enterOuterAlt(localctx, 2) - self.state = 488 + self.state = 495 localctx.shorthand = self.integer_shorthand() pass elif la_ == 3: localctx = CoreDSL2Parser.Float_typeContext(self, localctx) self.enterOuterAlt(localctx, 3) - self.state = 489 + self.state = 496 localctx.shorthand = self.float_shorthand() pass elif la_ == 4: localctx = CoreDSL2Parser.Bool_typeContext(self, localctx) self.enterOuterAlt(localctx, 4) - self.state = 490 - localctx.type_ = self.match(CoreDSL2Parser.T__38) + self.state = 497 + localctx.type_ = self.match(CoreDSL2Parser.T__37) pass elif la_ == 5: localctx = CoreDSL2Parser.Void_typeContext(self, localctx) self.enterOuterAlt(localctx, 5) - self.state = 491 - localctx.type_ = self.match(CoreDSL2Parser.T__39) + self.state = 498 + localctx.type_ = self.match(CoreDSL2Parser.T__38) pass elif la_ == 6: localctx = CoreDSL2Parser.Composite_declarationContext(self, localctx) self.enterOuterAlt(localctx, 6) - self.state = 492 + self.state = 499 localctx.type_ = self.struct_or_union() - self.state = 494 + self.state = 501 self._errHandler.sync(self) _la = self._input.LA(1) - if _la==97: - self.state = 493 + if _la==96: + self.state = 500 localctx.name = self.match(CoreDSL2Parser.IDENTIFIER) - self.state = 496 + self.state = 503 self.match(CoreDSL2Parser.T__4) - self.state = 500 + self.state = 507 self._errHandler.sync(self) _la = self._input.LA(1) - while ((((_la - 39)) & ~0x3f) == 0 and ((1 << (_la - 39)) & 7177611906123775) != 0): - self.state = 497 + while ((((_la - 38)) & ~0x3f) == 0 and ((1 << (_la - 38)) & 7177611906123775) != 0): + self.state = 504 localctx._struct_declaration = self.struct_declaration() localctx.declarations.append(localctx._struct_declaration) - self.state = 502 + self.state = 509 self._errHandler.sync(self) _la = self._input.LA(1) - self.state = 503 + self.state = 510 self.match(CoreDSL2Parser.T__5) pass elif la_ == 7: localctx = CoreDSL2Parser.Composite_referenceContext(self, localctx) self.enterOuterAlt(localctx, 7) - self.state = 505 + self.state = 512 localctx.type_ = self.struct_or_union() - self.state = 506 + self.state = 513 localctx.name = self.match(CoreDSL2Parser.IDENTIFIER) pass elif la_ == 8: localctx = CoreDSL2Parser.Enum_declarationContext(self, localctx) self.enterOuterAlt(localctx, 8) - self.state = 508 - localctx.type_ = self.match(CoreDSL2Parser.T__40) - self.state = 510 + self.state = 515 + localctx.type_ = self.match(CoreDSL2Parser.T__39) + self.state = 517 self._errHandler.sync(self) _la = self._input.LA(1) - if _la==97: - self.state = 509 + if _la==96: + self.state = 516 localctx.name = self.match(CoreDSL2Parser.IDENTIFIER) - self.state = 512 + self.state = 519 self.match(CoreDSL2Parser.T__4) - self.state = 513 + self.state = 520 self.enumerator_list() - self.state = 515 + self.state = 522 self._errHandler.sync(self) _la = self._input.LA(1) if _la==4: - self.state = 514 + self.state = 521 self.match(CoreDSL2Parser.T__3) - self.state = 517 + self.state = 524 self.match(CoreDSL2Parser.T__5) pass elif la_ == 9: localctx = CoreDSL2Parser.Enum_referenceContext(self, localctx) self.enterOuterAlt(localctx, 9) - self.state = 519 - localctx.type_ = self.match(CoreDSL2Parser.T__40) - self.state = 520 + self.state = 526 + localctx.type_ = self.match(CoreDSL2Parser.T__39) + self.state = 527 localctx.name = self.match(CoreDSL2Parser.IDENTIFIER) pass @@ -3553,9 +3574,9 @@ def integer_signedness(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 523 + self.state = 530 _la = self._input.LA(1) - if not(_la==42 or _la==43): + if not(_la==41 or _la==42): self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) @@ -3604,9 +3625,9 @@ def integer_shorthand(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 525 + self.state = 532 _la = self._input.LA(1) - if not((((_la) & ~0x3f) == 0 and ((1 << _la) & 263882790666240) != 0)): + if not((((_la) & ~0x3f) == 0 and ((1 << _la) & 131941395333120) != 0)): self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) @@ -3655,9 +3676,9 @@ def float_shorthand(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 527 + self.state = 534 _la = self._input.LA(1) - if not(_la==48 or _la==49): + if not(_la==47 or _la==48): self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) @@ -3718,48 +3739,48 @@ def attribute(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 529 - self.match(CoreDSL2Parser.T__49) - self.state = 530 + self.state = 536 + self.match(CoreDSL2Parser.T__48) + self.state = 537 localctx.name = self.match(CoreDSL2Parser.IDENTIFIER) - self.state = 544 + self.state = 551 self._errHandler.sync(self) token = self._input.LA(1) - if token in [51]: - self.state = 531 - self.match(CoreDSL2Parser.T__50) - self.state = 532 + if token in [50]: + self.state = 538 + self.match(CoreDSL2Parser.T__49) + self.state = 539 localctx._expression = self.expression(0) localctx.params.append(localctx._expression) pass - elif token in [21]: - self.state = 533 - self.match(CoreDSL2Parser.T__20) - self.state = 534 + elif token in [20]: + self.state = 540 + self.match(CoreDSL2Parser.T__19) + self.state = 541 localctx._expression = self.expression(0) localctx.params.append(localctx._expression) - self.state = 539 + self.state = 546 self._errHandler.sync(self) _la = self._input.LA(1) while _la==4: - self.state = 535 + self.state = 542 self.match(CoreDSL2Parser.T__3) - self.state = 536 + self.state = 543 localctx._expression = self.expression(0) localctx.params.append(localctx._expression) - self.state = 541 + self.state = 548 self._errHandler.sync(self) _la = self._input.LA(1) - self.state = 542 - self.match(CoreDSL2Parser.T__21) + self.state = 549 + self.match(CoreDSL2Parser.T__20) pass - elif token in [52]: + elif token in [51]: pass else: pass - self.state = 546 - self.match(CoreDSL2Parser.T__51) + self.state = 553 + self.match(CoreDSL2Parser.T__50) except RecognitionException as re: localctx.exception = re self._errHandler.reportError(self, re) @@ -3812,34 +3833,34 @@ def bit_size_specifier(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 548 - self.match(CoreDSL2Parser.T__36) - self.state = 549 + self.state = 555 + self.match(CoreDSL2Parser.T__35) + self.state = 556 localctx._primary = self.primary() localctx.size.append(localctx._primary) - self.state = 557 + self.state = 564 self._errHandler.sync(self) _la = self._input.LA(1) if _la==4: - self.state = 550 + self.state = 557 self.match(CoreDSL2Parser.T__3) - self.state = 551 + self.state = 558 localctx._primary = self.primary() localctx.size.append(localctx._primary) - self.state = 552 + self.state = 559 self.match(CoreDSL2Parser.T__3) - self.state = 553 + self.state = 560 localctx._primary = self.primary() localctx.size.append(localctx._primary) - self.state = 554 + self.state = 561 self.match(CoreDSL2Parser.T__3) - self.state = 555 + self.state = 562 localctx._primary = self.primary() localctx.size.append(localctx._primary) - self.state = 559 - self.match(CoreDSL2Parser.T__37) + self.state = 566 + self.match(CoreDSL2Parser.T__36) except RecognitionException as re: localctx.exception = re self._errHandler.reportError(self, re) @@ -3891,22 +3912,22 @@ def enumerator_list(self): self.enterRule(localctx, 50, self.RULE_enumerator_list) try: self.enterOuterAlt(localctx, 1) - self.state = 561 + self.state = 568 localctx._enumerator = self.enumerator() localctx.enumerators.append(localctx._enumerator) - self.state = 566 + self.state = 573 self._errHandler.sync(self) - _alt = self._interp.adaptivePredict(self._input,63,self._ctx) + _alt = self._interp.adaptivePredict(self._input,64,self._ctx) while _alt!=2 and _alt!=ATN.INVALID_ALT_NUMBER: if _alt==1: - self.state = 562 + self.state = 569 self.match(CoreDSL2Parser.T__3) - self.state = 563 + self.state = 570 localctx._enumerator = self.enumerator() localctx.enumerators.append(localctx._enumerator) - self.state = 568 + self.state = 575 self._errHandler.sync(self) - _alt = self._interp.adaptivePredict(self._input,63,self._ctx) + _alt = self._interp.adaptivePredict(self._input,64,self._ctx) except RecognitionException as re: localctx.exception = re @@ -3957,22 +3978,22 @@ def enumerator(self): localctx = CoreDSL2Parser.EnumeratorContext(self, self._ctx, self.state) self.enterRule(localctx, 52, self.RULE_enumerator) try: - self.state = 573 + self.state = 580 self._errHandler.sync(self) - la_ = self._interp.adaptivePredict(self._input,64,self._ctx) + la_ = self._interp.adaptivePredict(self._input,65,self._ctx) if la_ == 1: self.enterOuterAlt(localctx, 1) - self.state = 569 + self.state = 576 localctx.name = self.match(CoreDSL2Parser.IDENTIFIER) pass elif la_ == 2: self.enterOuterAlt(localctx, 2) - self.state = 570 + self.state = 577 localctx.name = self.match(CoreDSL2Parser.IDENTIFIER) - self.state = 571 - self.match(CoreDSL2Parser.T__50) - self.state = 572 + self.state = 578 + self.match(CoreDSL2Parser.T__49) + self.state = 579 self.expression(0) pass @@ -4034,25 +4055,25 @@ def struct_declaration(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 575 + self.state = 582 localctx.specifier = self.struct_declaration_specifier() - self.state = 576 + self.state = 583 localctx._declarator = self.declarator() localctx.declarators.append(localctx._declarator) - self.state = 581 + self.state = 588 self._errHandler.sync(self) _la = self._input.LA(1) while _la==4: - self.state = 577 + self.state = 584 self.match(CoreDSL2Parser.T__3) - self.state = 578 + self.state = 585 localctx._declarator = self.declarator() localctx.declarators.append(localctx._declarator) - self.state = 583 + self.state = 590 self._errHandler.sync(self) _la = self._input.LA(1) - self.state = 584 + self.state = 591 self.match(CoreDSL2Parser.T__9) except RecognitionException as re: localctx.exception = re @@ -4106,17 +4127,17 @@ def struct_declaration_specifier(self): localctx = CoreDSL2Parser.Struct_declaration_specifierContext(self, self._ctx, self.state) self.enterRule(localctx, 56, self.RULE_struct_declaration_specifier) try: - self.state = 588 + self.state = 595 self._errHandler.sync(self) token = self._input.LA(1) - if token in [39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 90, 91]: + if token in [38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 89, 90]: self.enterOuterAlt(localctx, 1) - self.state = 586 + self.state = 593 localctx.type_ = self.type_specifier() pass - elif token in [86, 87]: + elif token in [85, 86]: self.enterOuterAlt(localctx, 2) - self.state = 587 + self.state = 594 localctx._type_qualifier = self.type_qualifier() localctx.qualifiers.append(localctx._type_qualifier) pass @@ -4205,41 +4226,41 @@ def declarator(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 590 - localctx.name = self.match(CoreDSL2Parser.IDENTIFIER) self.state = 597 + localctx.name = self.match(CoreDSL2Parser.IDENTIFIER) + self.state = 604 self._errHandler.sync(self) _la = self._input.LA(1) - while _la==92: - self.state = 591 + while _la==91: + self.state = 598 self.match(CoreDSL2Parser.LEFT_BR) - self.state = 592 + self.state = 599 localctx._expression = self.expression(0) localctx.size.append(localctx._expression) - self.state = 593 + self.state = 600 self.match(CoreDSL2Parser.RIGHT_BR) - self.state = 599 + self.state = 606 self._errHandler.sync(self) _la = self._input.LA(1) - self.state = 603 + self.state = 610 self._errHandler.sync(self) _la = self._input.LA(1) - while _la==50: - self.state = 600 + while _la==49: + self.state = 607 localctx._attribute = self.attribute() localctx.attributes.append(localctx._attribute) - self.state = 605 + self.state = 612 self._errHandler.sync(self) _la = self._input.LA(1) - self.state = 608 + self.state = 615 self._errHandler.sync(self) _la = self._input.LA(1) - if _la==51: - self.state = 606 - self.match(CoreDSL2Parser.T__50) - self.state = 607 + if _la==50: + self.state = 613 + self.match(CoreDSL2Parser.T__49) + self.state = 614 localctx.init = self.initializer() @@ -4294,29 +4315,29 @@ def initializer(self): self.enterRule(localctx, 60, self.RULE_initializer) self._la = 0 # Token type try: - self.state = 618 + self.state = 625 self._errHandler.sync(self) token = self._input.LA(1) - if token in [21, 35, 36, 53, 54, 55, 56, 57, 58, 59, 60, 94, 95, 96, 97, 98, 99, 100]: + if token in [20, 34, 35, 52, 53, 54, 55, 56, 57, 58, 59, 93, 94, 95, 96, 97, 98, 99]: self.enterOuterAlt(localctx, 1) - self.state = 610 + self.state = 617 localctx.expr = self.expression(0) pass elif token in [5]: self.enterOuterAlt(localctx, 2) - self.state = 611 + self.state = 618 self.match(CoreDSL2Parser.T__4) - self.state = 612 + self.state = 619 self.initializerList() - self.state = 614 + self.state = 621 self._errHandler.sync(self) _la = self._input.LA(1) if _la==4: - self.state = 613 + self.state = 620 self.match(CoreDSL2Parser.T__3) - self.state = 616 + self.state = 623 self.match(CoreDSL2Parser.T__5) pass else: @@ -4378,44 +4399,44 @@ def initializerList(self): self.enterRule(localctx, 62, self.RULE_initializerList) try: self.enterOuterAlt(localctx, 1) - self.state = 622 + self.state = 629 self._errHandler.sync(self) - la_ = self._interp.adaptivePredict(self._input,72,self._ctx) + la_ = self._interp.adaptivePredict(self._input,73,self._ctx) if la_ == 1: - self.state = 620 + self.state = 627 self.designated_initializer() pass elif la_ == 2: - self.state = 621 + self.state = 628 self.initializer() pass - self.state = 631 + self.state = 638 self._errHandler.sync(self) - _alt = self._interp.adaptivePredict(self._input,74,self._ctx) + _alt = self._interp.adaptivePredict(self._input,75,self._ctx) while _alt!=2 and _alt!=ATN.INVALID_ALT_NUMBER: if _alt==1: - self.state = 624 + self.state = 631 self.match(CoreDSL2Parser.T__3) - self.state = 627 + self.state = 634 self._errHandler.sync(self) - la_ = self._interp.adaptivePredict(self._input,73,self._ctx) + la_ = self._interp.adaptivePredict(self._input,74,self._ctx) if la_ == 1: - self.state = 625 + self.state = 632 self.designated_initializer() pass elif la_ == 2: - self.state = 626 + self.state = 633 self.initializer() pass - self.state = 633 + self.state = 640 self._errHandler.sync(self) - _alt = self._interp.adaptivePredict(self._input,74,self._ctx) + _alt = self._interp.adaptivePredict(self._input,75,self._ctx) except RecognitionException as re: localctx.exception = re @@ -4474,22 +4495,22 @@ def designated_initializer(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 635 + self.state = 642 self._errHandler.sync(self) _la = self._input.LA(1) while True: - self.state = 634 + self.state = 641 localctx._designator = self.designator() localctx.designators.append(localctx._designator) - self.state = 637 + self.state = 644 self._errHandler.sync(self) _la = self._input.LA(1) - if not (_la==53 or _la==92): + if not (_la==52 or _la==91): break - self.state = 639 - self.match(CoreDSL2Parser.T__50) - self.state = 640 + self.state = 646 + self.match(CoreDSL2Parser.T__49) + self.state = 647 localctx.init = self.initializer() except RecognitionException as re: localctx.exception = re @@ -4547,23 +4568,23 @@ def designator(self): localctx = CoreDSL2Parser.DesignatorContext(self, self._ctx, self.state) self.enterRule(localctx, 66, self.RULE_designator) try: - self.state = 648 + self.state = 655 self._errHandler.sync(self) token = self._input.LA(1) - if token in [92]: + if token in [91]: self.enterOuterAlt(localctx, 1) - self.state = 642 + self.state = 649 self.match(CoreDSL2Parser.LEFT_BR) - self.state = 643 + self.state = 650 localctx.idx = self.expression(0) - self.state = 644 + self.state = 651 self.match(CoreDSL2Parser.RIGHT_BR) pass - elif token in [53]: + elif token in [52]: self.enterOuterAlt(localctx, 2) - self.state = 646 - self.match(CoreDSL2Parser.T__52) - self.state = 647 + self.state = 653 + self.match(CoreDSL2Parser.T__51) + self.state = 654 localctx.prop = self.match(CoreDSL2Parser.IDENTIFIER) pass else: @@ -4965,15 +4986,15 @@ def expression(self, _p:int=0): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 681 + self.state = 688 self._errHandler.sync(self) - la_ = self._interp.adaptivePredict(self._input,80,self._ctx) + la_ = self._interp.adaptivePredict(self._input,81,self._ctx) if la_ == 1: localctx = CoreDSL2Parser.Primary_expressionContext(self, localctx) self._ctx = localctx _prevctx = localctx - self.state = 651 + self.state = 658 self.primary() pass @@ -4981,15 +5002,15 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Deref_expressionContext(self, localctx) self._ctx = localctx _prevctx = localctx - self.state = 652 + self.state = 659 localctx.bop = self._input.LT(1) _la = self._input.LA(1) - if not(_la==53 or _la==54): + if not(_la==52 or _la==53): localctx.bop = self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) self.consume() - self.state = 653 + self.state = 660 localctx.ref = self.match(CoreDSL2Parser.IDENTIFIER) pass @@ -4997,49 +5018,49 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Method_callContext(self, localctx) self._ctx = localctx _prevctx = localctx - self.state = 654 + self.state = 661 localctx.ref = self.match(CoreDSL2Parser.IDENTIFIER) - self.state = 655 - self.match(CoreDSL2Parser.T__20) - self.state = 664 + self.state = 662 + self.match(CoreDSL2Parser.T__19) + self.state = 671 self._errHandler.sync(self) _la = self._input.LA(1) - if (((_la) & ~0x3f) == 0 and ((1 << _la) & 2296835913040265216) != 0) or ((((_la - 94)) & ~0x3f) == 0 and ((1 << (_la - 94)) & 127) != 0): - self.state = 656 + if (((_la) & ~0x3f) == 0 and ((1 << _la) & 1148417956520132608) != 0) or ((((_la - 93)) & ~0x3f) == 0 and ((1 << (_la - 93)) & 127) != 0): + self.state = 663 localctx._expression = self.expression(0) localctx.args.append(localctx._expression) - self.state = 661 + self.state = 668 self._errHandler.sync(self) _la = self._input.LA(1) while _la==4: - self.state = 657 + self.state = 664 self.match(CoreDSL2Parser.T__3) - self.state = 658 + self.state = 665 localctx._expression = self.expression(0) localctx.args.append(localctx._expression) - self.state = 663 + self.state = 670 self._errHandler.sync(self) _la = self._input.LA(1) - self.state = 666 - self.match(CoreDSL2Parser.T__21) + self.state = 673 + self.match(CoreDSL2Parser.T__20) pass elif la_ == 4: localctx = CoreDSL2Parser.Preinc_expressionContext(self, localctx) self._ctx = localctx _prevctx = localctx - self.state = 667 + self.state = 674 localctx.op = self._input.LT(1) _la = self._input.LA(1) - if not(_la==55 or _la==56): + if not(_la==54 or _la==55): localctx.op = self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) self.consume() - self.state = 668 + self.state = 675 localctx.right = self.expression(17) pass @@ -5047,15 +5068,15 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Prefix_expressionContext(self, localctx) self._ctx = localctx _prevctx = localctx - self.state = 669 + self.state = 676 localctx.prefix = self._input.LT(1) _la = self._input.LA(1) - if not((((_la) & ~0x3f) == 0 and ((1 << _la) & 432345667306782720) != 0)): + if not((((_la) & ~0x3f) == 0 and ((1 << _la) & 216172833653391360) != 0)): localctx.prefix = self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) self.consume() - self.state = 670 + self.state = 677 localctx.right = self.expression(16) pass @@ -5063,15 +5084,15 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Prefix_expressionContext(self, localctx) self._ctx = localctx _prevctx = localctx - self.state = 671 + self.state = 678 localctx.prefix = self._input.LT(1) _la = self._input.LA(1) - if not(_la==59 or _la==60): + if not(_la==58 or _la==59): localctx.prefix = self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) self.consume() - self.state = 672 + self.state = 679 localctx.right = self.expression(15) pass @@ -5079,58 +5100,58 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Cast_expressionContext(self, localctx) self._ctx = localctx _prevctx = localctx - self.state = 673 - self.match(CoreDSL2Parser.T__20) - self.state = 676 + self.state = 680 + self.match(CoreDSL2Parser.T__19) + self.state = 683 self._errHandler.sync(self) - la_ = self._interp.adaptivePredict(self._input,79,self._ctx) + la_ = self._interp.adaptivePredict(self._input,80,self._ctx) if la_ == 1: - self.state = 674 + self.state = 681 localctx.type_ = self.type_specifier() pass elif la_ == 2: - self.state = 675 + self.state = 682 localctx.sign = self.integer_signedness() pass - self.state = 678 - self.match(CoreDSL2Parser.T__21) - self.state = 679 + self.state = 685 + self.match(CoreDSL2Parser.T__20) + self.state = 686 localctx.right = self.expression(14) pass self._ctx.stop = self._input.LT(-1) - self.state = 738 + self.state = 745 self._errHandler.sync(self) - _alt = self._interp.adaptivePredict(self._input,83,self._ctx) + _alt = self._interp.adaptivePredict(self._input,84,self._ctx) while _alt!=2 and _alt!=ATN.INVALID_ALT_NUMBER: if _alt==1: if self._parseListeners is not None: self.triggerExitRuleEvent() _prevctx = localctx - self.state = 736 + self.state = 743 self._errHandler.sync(self) - la_ = self._interp.adaptivePredict(self._input,82,self._ctx) + la_ = self._interp.adaptivePredict(self._input,83,self._ctx) if la_ == 1: localctx = CoreDSL2Parser.Binary_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.left = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 683 + self.state = 690 if not self.precpred(self._ctx, 13): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 13)") - self.state = 684 + self.state = 691 localctx.bop = self._input.LT(1) _la = self._input.LA(1) - if not((((_la) & ~0x3f) == 0 and ((1 << _la) & 6917529062000820224) != 0)): + if not((((_la) & ~0x3f) == 0 and ((1 << _la) & 3458764531000410112) != 0)): localctx.bop = self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) self.consume() - self.state = 685 + self.state = 692 localctx.right = self.expression(14) pass @@ -5138,19 +5159,19 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Binary_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.left = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 686 + self.state = 693 if not self.precpred(self._ctx, 12): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 12)") - self.state = 687 + self.state = 694 localctx.bop = self._input.LT(1) _la = self._input.LA(1) - if not(_la==57 or _la==58): + if not(_la==56 or _la==57): localctx.bop = self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) self.consume() - self.state = 688 + self.state = 695 localctx.right = self.expression(13) pass @@ -5158,19 +5179,19 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Binary_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.left = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 689 + self.state = 696 if not self.precpred(self._ctx, 11): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 11)") - self.state = 690 + self.state = 697 localctx.bop = self._input.LT(1) _la = self._input.LA(1) - if not(_la==63 or _la==64): + if not(_la==62 or _la==63): localctx.bop = self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) self.consume() - self.state = 691 + self.state = 698 localctx.right = self.expression(12) pass @@ -5178,19 +5199,19 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Binary_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.left = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 692 + self.state = 699 if not self.precpred(self._ctx, 10): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 10)") - self.state = 693 + self.state = 700 localctx.bop = self._input.LT(1) _la = self._input.LA(1) - if not(((((_la - 37)) & ~0x3f) == 0 and ((1 << (_la - 37)) & 805306371) != 0)): + if not(((((_la - 36)) & ~0x3f) == 0 and ((1 << (_la - 36)) & 805306371) != 0)): localctx.bop = self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) self.consume() - self.state = 694 + self.state = 701 localctx.right = self.expression(11) pass @@ -5198,19 +5219,19 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Binary_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.left = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 695 + self.state = 702 if not self.precpred(self._ctx, 9): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 9)") - self.state = 696 + self.state = 703 localctx.bop = self._input.LT(1) _la = self._input.LA(1) - if not(_la==67 or _la==68): + if not(_la==66 or _la==67): localctx.bop = self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) self.consume() - self.state = 697 + self.state = 704 localctx.right = self.expression(10) pass @@ -5218,13 +5239,13 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Binary_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.left = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 698 + self.state = 705 if not self.precpred(self._ctx, 8): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 8)") - self.state = 699 - localctx.bop = self.match(CoreDSL2Parser.T__35) - self.state = 700 + self.state = 706 + localctx.bop = self.match(CoreDSL2Parser.T__34) + self.state = 707 localctx.right = self.expression(9) pass @@ -5232,13 +5253,13 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Binary_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.left = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 701 + self.state = 708 if not self.precpred(self._ctx, 7): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 7)") - self.state = 702 - localctx.bop = self.match(CoreDSL2Parser.T__68) - self.state = 703 + self.state = 709 + localctx.bop = self.match(CoreDSL2Parser.T__67) + self.state = 710 localctx.right = self.expression(8) pass @@ -5246,13 +5267,13 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Binary_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.left = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 704 + self.state = 711 if not self.precpred(self._ctx, 6): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 6)") - self.state = 705 - localctx.bop = self.match(CoreDSL2Parser.T__69) - self.state = 706 + self.state = 712 + localctx.bop = self.match(CoreDSL2Parser.T__68) + self.state = 713 localctx.right = self.expression(7) pass @@ -5260,13 +5281,13 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Binary_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.left = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 707 + self.state = 714 if not self.precpred(self._ctx, 5): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 5)") - self.state = 708 - localctx.bop = self.match(CoreDSL2Parser.T__70) - self.state = 709 + self.state = 715 + localctx.bop = self.match(CoreDSL2Parser.T__69) + self.state = 716 localctx.right = self.expression(6) pass @@ -5274,13 +5295,13 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Binary_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.left = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 710 + self.state = 717 if not self.precpred(self._ctx, 4): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 4)") - self.state = 711 - localctx.bop = self.match(CoreDSL2Parser.T__71) - self.state = 712 + self.state = 718 + localctx.bop = self.match(CoreDSL2Parser.T__70) + self.state = 719 localctx.right = self.expression(5) pass @@ -5288,13 +5309,13 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Concat_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.left = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 713 + self.state = 720 if not self.precpred(self._ctx, 3): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 3)") - self.state = 714 + self.state = 721 localctx.bop = self.match(CoreDSL2Parser.T__15) - self.state = 715 + self.state = 722 localctx.right = self.expression(4) pass @@ -5302,17 +5323,17 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Conditional_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.cond = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 716 + self.state = 723 if not self.precpred(self._ctx, 2): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 2)") - self.state = 717 - localctx.bop = self.match(CoreDSL2Parser.T__72) - self.state = 718 + self.state = 724 + localctx.bop = self.match(CoreDSL2Parser.T__71) + self.state = 725 localctx.then_expr = self.expression(0) - self.state = 719 + self.state = 726 self.match(CoreDSL2Parser.T__14) - self.state = 720 + self.state = 727 localctx.else_expr = self.expression(2) pass @@ -5320,19 +5341,19 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Assignment_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.left = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 722 + self.state = 729 if not self.precpred(self._ctx, 1): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 1)") - self.state = 723 + self.state = 730 localctx.bop = self._input.LT(1) _la = self._input.LA(1) - if not(((((_la - 51)) & ~0x3f) == 0 and ((1 << (_la - 51)) & 17171480577) != 0)): + if not(((((_la - 50)) & ~0x3f) == 0 and ((1 << (_la - 50)) & 17171480577) != 0)): localctx.bop = self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) self.consume() - self.state = 724 + self.state = 731 localctx.right = self.expression(1) pass @@ -5340,25 +5361,25 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Slice_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.expr = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 725 + self.state = 732 if not self.precpred(self._ctx, 20): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 20)") - self.state = 726 + self.state = 733 localctx.bop = self.match(CoreDSL2Parser.LEFT_BR) - self.state = 727 + self.state = 734 localctx.left = self.expression(0) - self.state = 730 + self.state = 737 self._errHandler.sync(self) _la = self._input.LA(1) if _la==15: - self.state = 728 + self.state = 735 self.match(CoreDSL2Parser.T__14) - self.state = 729 + self.state = 736 localctx.right = self.expression(0) - self.state = 732 + self.state = 739 self.match(CoreDSL2Parser.RIGHT_BR) pass @@ -5366,14 +5387,14 @@ def expression(self, _p:int=0): localctx = CoreDSL2Parser.Postinc_expressionContext(self, CoreDSL2Parser.ExpressionContext(self, _parentctx, _parentState)) localctx.left = _prevctx self.pushNewRecursionContext(localctx, _startState, self.RULE_expression) - self.state = 734 + self.state = 741 if not self.precpred(self._ctx, 18): from antlr4.error.Errors import FailedPredicateException raise FailedPredicateException(self, "self.precpred(self._ctx, 18)") - self.state = 735 + self.state = 742 localctx.op = self._input.LT(1) _la = self._input.LA(1) - if not(_la==55 or _la==56): + if not(_la==54 or _la==55): localctx.op = self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) @@ -5381,9 +5402,9 @@ def expression(self, _p:int=0): pass - self.state = 740 + self.state = 747 self._errHandler.sync(self) - _alt = self._interp.adaptivePredict(self._input,83,self._ctx) + _alt = self._interp.adaptivePredict(self._input,84,self._ctx) except RecognitionException as re: localctx.exception = re @@ -5524,49 +5545,49 @@ def primary(self): localctx = CoreDSL2Parser.PrimaryContext(self, self._ctx, self.state) self.enterRule(localctx, 70, self.RULE_primary) try: - self.state = 752 + self.state = 759 self._errHandler.sync(self) token = self._input.LA(1) - if token in [97]: + if token in [96]: localctx = CoreDSL2Parser.Reference_expressionContext(self, localctx) self.enterOuterAlt(localctx, 1) - self.state = 741 + self.state = 748 localctx.ref = self.match(CoreDSL2Parser.IDENTIFIER) pass - elif token in [94, 95, 96, 98]: + elif token in [93, 94, 95, 97]: localctx = CoreDSL2Parser.Constant_expressionContext(self, localctx) self.enterOuterAlt(localctx, 2) - self.state = 742 + self.state = 749 localctx.const_expr = self.constant() pass - elif token in [99, 100]: + elif token in [98, 99]: localctx = CoreDSL2Parser.Literal_expressionContext(self, localctx) self.enterOuterAlt(localctx, 3) - self.state = 744 + self.state = 751 self._errHandler.sync(self) _alt = 1 while _alt!=2 and _alt!=ATN.INVALID_ALT_NUMBER: if _alt == 1: - self.state = 743 + self.state = 750 localctx._string_literal = self.string_literal() localctx.literal.append(localctx._string_literal) else: raise NoViableAltException(self) - self.state = 746 + self.state = 753 self._errHandler.sync(self) - _alt = self._interp.adaptivePredict(self._input,84,self._ctx) + _alt = self._interp.adaptivePredict(self._input,85,self._ctx) pass - elif token in [21]: + elif token in [20]: localctx = CoreDSL2Parser.Parens_expressionContext(self, localctx) self.enterOuterAlt(localctx, 4) - self.state = 748 - self.match(CoreDSL2Parser.T__20) - self.state = 749 + self.state = 755 + self.match(CoreDSL2Parser.T__19) + self.state = 756 localctx.expr = self.expression(0) - self.state = 750 - self.match(CoreDSL2Parser.T__21) + self.state = 757 + self.match(CoreDSL2Parser.T__20) pass else: raise NoViableAltException(self) @@ -5620,9 +5641,9 @@ def string_literal(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 754 + self.state = 761 _la = self._input.LA(1) - if not(_la==99 or _la==100): + if not(_la==98 or _la==99): self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) @@ -5684,27 +5705,27 @@ def constant(self): localctx = CoreDSL2Parser.ConstantContext(self, self._ctx, self.state) self.enterRule(localctx, 74, self.RULE_constant) try: - self.state = 760 + self.state = 767 self._errHandler.sync(self) token = self._input.LA(1) - if token in [96]: + if token in [95]: self.enterOuterAlt(localctx, 1) - self.state = 756 + self.state = 763 self.integer_constant() pass - elif token in [95]: + elif token in [94]: self.enterOuterAlt(localctx, 2) - self.state = 757 + self.state = 764 self.floating_constant() pass - elif token in [98]: + elif token in [97]: self.enterOuterAlt(localctx, 3) - self.state = 758 + self.state = 765 self.character_constant() pass - elif token in [94]: + elif token in [93]: self.enterOuterAlt(localctx, 4) - self.state = 759 + self.state = 766 self.bool_constant() pass else: @@ -5756,7 +5777,7 @@ def integer_constant(self): self.enterRule(localctx, 76, self.RULE_integer_constant) try: self.enterOuterAlt(localctx, 1) - self.state = 762 + self.state = 769 localctx.value = self.match(CoreDSL2Parser.INTEGER) except RecognitionException as re: localctx.exception = re @@ -5804,7 +5825,7 @@ def floating_constant(self): self.enterRule(localctx, 78, self.RULE_floating_constant) try: self.enterOuterAlt(localctx, 1) - self.state = 764 + self.state = 771 localctx.value = self.match(CoreDSL2Parser.FLOAT) except RecognitionException as re: localctx.exception = re @@ -5852,7 +5873,7 @@ def bool_constant(self): self.enterRule(localctx, 80, self.RULE_bool_constant) try: self.enterOuterAlt(localctx, 1) - self.state = 766 + self.state = 773 localctx.value = self.match(CoreDSL2Parser.BOOLEAN) except RecognitionException as re: localctx.exception = re @@ -5900,7 +5921,7 @@ def character_constant(self): self.enterRule(localctx, 82, self.RULE_character_constant) try: self.enterOuterAlt(localctx, 1) - self.state = 768 + self.state = 775 localctx.value = self.match(CoreDSL2Parser.CHARCONST) except RecognitionException as re: localctx.exception = re @@ -5950,9 +5971,9 @@ def double_left_bracket(self): self.enterRule(localctx, 84, self.RULE_double_left_bracket) try: self.enterOuterAlt(localctx, 1) - self.state = 770 + self.state = 777 self.match(CoreDSL2Parser.LEFT_BR) - self.state = 771 + self.state = 778 self.match(CoreDSL2Parser.LEFT_BR) except RecognitionException as re: localctx.exception = re @@ -6002,9 +6023,9 @@ def double_right_bracket(self): self.enterRule(localctx, 86, self.RULE_double_right_bracket) try: self.enterOuterAlt(localctx, 1) - self.state = 773 + self.state = 780 self.match(CoreDSL2Parser.RIGHT_BR) - self.state = 774 + self.state = 781 self.match(CoreDSL2Parser.RIGHT_BR) except RecognitionException as re: localctx.exception = re @@ -6050,9 +6071,9 @@ def data_types(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 776 + self.state = 783 _la = self._input.LA(1) - if not(((((_la - 39)) & ~0x3f) == 0 and ((1 << (_la - 39)) & 70368744179707) != 0)): + if not(((((_la - 38)) & ~0x3f) == 0 and ((1 << (_la - 38)) & 70368744179707) != 0)): self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) @@ -6101,9 +6122,9 @@ def type_qualifier(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 778 + self.state = 785 _la = self._input.LA(1) - if not(_la==86 or _la==87): + if not(_la==85 or _la==86): self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) @@ -6152,9 +6173,9 @@ def storage_class_specifier(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 780 + self.state = 787 _la = self._input.LA(1) - if not(_la==20 or _la==88 or _la==89): + if not(_la==19 or _la==87 or _la==88): self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) @@ -6203,9 +6224,9 @@ def struct_or_union(self): self._la = 0 # Token type try: self.enterOuterAlt(localctx, 1) - self.state = 782 + self.state = 789 _la = self._input.LA(1) - if not(_la==90 or _la==91): + if not(_la==89 or _la==90): self._errHandler.recoverInline(self) else: self._errHandler.reportMatch(self) From 76eb333d4361dd75f4d509c6311ce2be91e3f591 Mon Sep 17 00:00:00 2001 From: Philipp van Kempen Date: Tue, 23 May 2023 01:44:23 +0200 Subject: [PATCH 5/9] metamodel, etiss backend, coredsl frontend: add mnemonic support --- m2isar/backends/etiss/architecture_writer.py | 2 +- m2isar/frontends/coredsl2/architecture_model_builder.py | 6 +++--- m2isar/metamodel/arch.py | 4 +++- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/m2isar/backends/etiss/architecture_writer.py b/m2isar/backends/etiss/architecture_writer.py index a09a2497..6bb671d3 100644 --- a/m2isar/backends/etiss/architecture_writer.py +++ b/m2isar/backends/etiss/architecture_writer.py @@ -191,7 +191,7 @@ def write_arch_specific_cpp(core: arch.CoreDef, start_time: str, output_path: pa if error_fn is not None: for bitsize in core.instr_classes: error_bitfield = arch.BitField("error_code", arch.RangeSpec(31, 0), arch.DataType.U) - error_instr = arch.Instruction(f"trap_entry {bitsize}", {arch.InstrAttribute.NO_CONT: None}, [error_bitfield], "", None, None) + error_instr = arch.Instruction(f"trap_entry {bitsize}", {arch.InstrAttribute.NO_CONT: None}, [error_bitfield], "", "", None, None) error_bitfield_descr = error_instr.fields.get("error_code") error_op = behav.Operation([ behav.ProcedureCall(error_fn, [behav.NamedReference(error_bitfield_descr)]) diff --git a/m2isar/frontends/coredsl2/architecture_model_builder.py b/m2isar/frontends/coredsl2/architecture_model_builder.py index 982e08e0..22bcfd6e 100644 --- a/m2isar/frontends/coredsl2/architecture_model_builder.py +++ b/m2isar/frontends/coredsl2/architecture_model_builder.py @@ -166,10 +166,10 @@ def visitInstruction(self, ctx: CoreDSL2Parser.InstructionContext): # read encoding, attributes and disassembly encoding = [self.visit(obj) for obj in ctx.encoding] attributes = dict([self.visit(obj) for obj in ctx.attributes]) - assembly = ctx.assembly.text if ctx.assembly is not None else None + assembly = ctx.assembly.text.replace("\"", "") if ctx.assembly is not None else None + mnemonic = ctx.mnemonic.text.replace("\"", "") if ctx.mnemonic is not None else None - i = arch.Instruction(ctx.name.text, attributes, encoding, disass, ctx.behavior, None) - i = arch.Instruction(ctx.name.text, attributes, encoding, assembly, ctx.behavior, None) + i = arch.Instruction(ctx.name.text, attributes, encoding, mnemonic, assembly, ctx.behavior, None) self._instr_classes.add(i.size) instr_id = (i.code, i.mask) diff --git a/m2isar/metamodel/arch.py b/m2isar/metamodel/arch.py index d0f4c0a2..adcd7e9f 100644 --- a/m2isar/metamodel/arch.py +++ b/m2isar/metamodel/arch.py @@ -410,6 +410,7 @@ class Instruction(SizedRefOrConst): attributes: "dict[InstrAttribute, list[BaseNode]]" encoding: "list[Union[BitField, BitVal]]" + mnemonic: str assembly: str operation: Operation @@ -422,13 +423,14 @@ class Instruction(SizedRefOrConst): code: int def __init__(self, name, attributes: "dict[InstrAttribute, list[BaseNode]]", encoding: "list[Union[BitField, BitVal]]", - assembly: str, operation: Operation, function_info: "FunctionInfo"): + mnemonic: str, assembly: str, operation: Operation, function_info: "FunctionInfo"): self.ext_name = "" self.attributes = attributes if attributes else {} self.encoding = encoding self.fields: "dict[str, BitFieldDescr]" = {} self.scalars = {} + self.mnemonic = name.lower() if mnemonic is None else mnemonic self.assembly = assembly self.operation = operation if operation is not None else Operation([]) self.throws = False From be72b8c20ec1fc23d8ef583963c3fa62a63df6e8 Mon Sep 17 00:00:00 2001 From: Philipp van Kempen Date: Fri, 19 May 2023 09:00:33 +0200 Subject: [PATCH 6/9] disass backend: use disass string --- m2isar/backends/disass/disass.py | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/m2isar/backends/disass/disass.py b/m2isar/backends/disass/disass.py index 1193c296..e75f65bd 100644 --- a/m2isar/backends/disass/disass.py +++ b/m2isar/backends/disass/disass.py @@ -137,8 +137,11 @@ def main(): # decode instruction operands else: operands = decode(ii, found_ins) + disass = found_ins.disass + if disass is None: + disass = "" op_str = " | ".join([f"{k}={v}" for k, v in operands.items()]) - ins_str = f"{found_ins.name} [{op_str}]" + ins_str = f"{found_ins.name}\t{disass} [{op_str}]" step = found_ins.size // 8 # print decoded instruction mnemonic From 8cca37c32e826376de25e3c248e0c5323f6fb50b Mon Sep 17 00:00:00 2001 From: Philipp van Kempen Date: Fri, 19 May 2023 08:44:54 +0200 Subject: [PATCH 7/9] rename disass to assembly --- m2isar/backends/disass/disass.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/m2isar/backends/disass/disass.py b/m2isar/backends/disass/disass.py index e75f65bd..cd0fbfb5 100644 --- a/m2isar/backends/disass/disass.py +++ b/m2isar/backends/disass/disass.py @@ -137,9 +137,9 @@ def main(): # decode instruction operands else: operands = decode(ii, found_ins) - disass = found_ins.disass - if disass is None: - disass = "" + assembly = found_ins.assembly + if assembly is None: + assembly = "" op_str = " | ".join([f"{k}={v}" for k, v in operands.items()]) ins_str = f"{found_ins.name}\t{disass} [{op_str}]" step = found_ins.size // 8 From 1f67e587b8712481c686c8eb262fa3bb192ef19c Mon Sep 17 00:00:00 2001 From: Philipp van Kempen Date: Tue, 23 May 2023 01:38:49 +0200 Subject: [PATCH 8/9] disass backend: use custom asm formatter --- m2isar/backends/disass/asm_formatter.py | 131 ++++++++++++++++++++++++ m2isar/backends/disass/disass.py | 19 +++- 2 files changed, 145 insertions(+), 5 deletions(-) create mode 100644 m2isar/backends/disass/asm_formatter.py diff --git a/m2isar/backends/disass/asm_formatter.py b/m2isar/backends/disass/asm_formatter.py new file mode 100644 index 00000000..19ef3224 --- /dev/null +++ b/m2isar/backends/disass/asm_formatter.py @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# This file is part of the M2-ISA-R project: https://github.com/tum-ei-eda/M2-ISA-R +# +# Copyright (C) 2022 +# Chair of Electrical Design Automation +# Technical University of Munich + +"""Fortmatter implementation for CoreDSL assembly strings.""" + +# Inspired by: https://stackoverflow.com/a/9558001 + +from string import Formatter + +import re +import ast +import operator as op + +operators = {ast.Add: op.add, ast.Sub: op.sub, ast.Mult: op.mul, + ast.Div: op.truediv, ast.Pow: op.pow, ast.BitXor: op.xor, + ast.USub: op.neg} + +NAMES = { + 0: "zero", + 1: "ra", + 2: "sp", + 3: "gp", + 4: "tp", + 5: "t0", + 6: "t1", + 7: "t2", + 8: "s0", + 9: "s1", + 10: "a0", + 11: "a1", + 12: "a2", + 13: "a3", + 14: "a4", + 15: "a5", + 16: "a6", + 17: "a7", + 18: "s2", + 19: "s3", + 20: "s4", + 21: "s5", + 22: "s6", + 23: "s7", + 24: "s8", + 25: "s9", + 26: "s10", + 27: "s11", + 28: "t3", + 29: "t4", + 30: "t5", + 31: "t6", +} + +FNAMES = { + 0: "f0", + 1: "f1", + 2: "f2", + 3: "f3", + 4: "f4", + 5: "f5", + 6: "f6", + 7: "f7", + 8: "fs0", + 9: "fs1", + 10: "fa0", + 11: "fa1", + 12: "fa2", + 13: "fa3", + 14: "fa4", + 15: "fa5", + 16: "fa6", + 17: "fa7", + 18: "fs2", + 19: "fs3", + 20: "fs4", + 21: "fs5", + 22: "fs6", + 23: "fs7", + 24: "fs8", + 25: "fs9", + 26: "fs10", + 27: "fs11", + 28: "ft8", + 29: "ft9", + 30: "ft10", + 31: "ft11", +} + +class AsmFormatter(Formatter): + + def get_value(self, key, args, kwargs): + if isinstance(key, int): + return key + assert isinstance(key, str) + try: + value = self.eval_expr(key, args, kwargs) + return value + except ValueError: + pass + + return super().get_value(key, args, kwargs) + + def get_field(self, field_name, args, kwargs): + return super().get_field(field_name, args, kwargs) + + def eval_expr(self, expr, args, kwargs): + return self.eval_(ast.parse(expr, mode='eval').body, args, kwargs) + + def eval_(self, node, args, kwargs): + if isinstance(node, ast.Num): # + return node.n + elif isinstance(node, ast.Name): # + return super().get_value(node.id, args, kwargs) + elif isinstance(node, ast.BinOp): # + return operators[type(node.op)](self.eval_(node.left, args, kwargs), self.eval_(node.right, args, kwargs)) + elif isinstance(node, ast.UnaryOp): # e.g., -1 + return operators[type(node.op)](self.eval_(node.operand, args, kwargs)) + elif isinstance(node, ast.Call): + if node.func.id == "name": + assert len(node.args) == 1 + return NAMES[self.eval_(node.args[0], args, kwargs)] + if node.func.id == "fname": + assert len(node.args) == 1 + return FNAMES[self.eval_(node.args[0], args, kwargs)] + assert False + else: + raise TypeError(node) diff --git a/m2isar/backends/disass/disass.py b/m2isar/backends/disass/disass.py index cd0fbfb5..d067eae1 100644 --- a/m2isar/backends/disass/disass.py +++ b/m2isar/backends/disass/disass.py @@ -18,6 +18,7 @@ from io import SEEK_CUR from ...metamodel import M2_METAMODEL_VERSION, M2Model, arch +from .asm_formatter import AsmFormatter logger = logging.getLogger("viewer") @@ -68,6 +69,7 @@ def main(): parser.add_argument('top_level', help="A .m2isarmodel file containing the models to generate.") parser.add_argument("core_name") parser.add_argument('bin') + parser.add_argument("--format", action="store_true", help="Use assembly formatting string and mnemonic") parser.add_argument("--log", default="info", choices=["critical", "error", "warning", "info", "debug"]) args = parser.parse_args() @@ -137,11 +139,18 @@ def main(): # decode instruction operands else: operands = decode(ii, found_ins) - assembly = found_ins.assembly - if assembly is None: - assembly = "" - op_str = " | ".join([f"{k}={v}" for k, v in operands.items()]) - ins_str = f"{found_ins.name}\t{disass} [{op_str}]" + if args.format: + asm_name = found_ins.mnemonic + assembly = found_ins.assembly + fmt = AsmFormatter() + if assembly is None: + assembly = "" + asm_args = fmt.format(assembly, **operands) + else: + asm_name = found_ins.name + op_str = " | ".join([f"{k}={v}" for k, v in operands.items()]) + asm_args = f"[{op_str}]" + ins_str = f"{asm_name}\t{asm_args}" step = found_ins.size // 8 # print decoded instruction mnemonic From c561a57469eafba6446f6c91b7878cd4129678ee Mon Sep 17 00:00:00 2001 From: Philipp van Kempen Date: Tue, 23 May 2023 01:43:18 +0200 Subject: [PATCH 9/9] disass backend: ommit repeated 0x0000 --- m2isar/backends/disass/disass.py | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/m2isar/backends/disass/disass.py b/m2isar/backends/disass/disass.py index d067eae1..8acadd28 100644 --- a/m2isar/backends/disass/disass.py +++ b/m2isar/backends/disass/disass.py @@ -118,6 +118,8 @@ def main(): instrs_by_size = dict(sorted(instrs_by_size.items())) + prev_count = 0 + with open(args.bin, "rb") as f: # read at most XLEN bytes at a time while iw_read := f.peek(readlen): @@ -136,8 +138,23 @@ def main(): ins_str = "unknown" step = steplen + if prev_count > 2: + print(f"\trepeated {prev_count-2} times.") + prev_count = 0 + # decode instruction operands else: + if found_ins and found_ins.name == "DII": + prev_count += 1 + if prev_count > 1: + bla = f.tell() + f.seek(step, SEEK_CUR) + continue + else: + if prev_count > 2: + print(f"\trepeated {prev_count-2} times.") + prev_count = 0 + operands = decode(ii, found_ins) if args.format: asm_name = found_ins.mnemonic