[#17126][fix] Align FP8 block-scales Python gates with C++ SM121 aliasing - #17166
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[#17126][fix] Align FP8 block-scales Python gates with C++ SM121 aliasing#17166DhineshPonnarasan wants to merge 3 commits into
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…15503 Add a debug-only instrumentation gated on the TRTLLM_DIFF_TRACE environment variable. When enabled, the Attention.forward method saves the last-token slice of six priority tensors at layer 0 during context (prefill) forwards and compares each new save against the first context forward (Run 1). Saved tensors in priority order: A_qkv - self.qkv_proj output B_q, B_k, B_v - q,k,v immediately before the attention backend C_attn_output - attention backend output D_o_proj - o_proj output When the first differing tensor is found, later-priority tensors are skipped to minimize trace overhead. When TRTLLM_DIFF_TRACE is not set, the hooks early-exit with a single bool check and no GPU or disk I/O is performed. Signed-off-by: Dhinesh Ponnarasan <dhineshponnarasan@gmail.com>
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On GB10 (SM121), C++ getSMVersion() aliases 121 to 120 so the C++ kernel runs the SM120 code path, but Python get_sm_version() returns 121, causing Python to select the wrong branch. This produces a scale-layout mismatch (Scale dtype must be Int32. on dense/MLA paths). Change all Python FP8 block-scales gates from get_sm_version() == 120 to get_sm_version() in (120, 121) so Python and C++ agree on which code path to use. Fixes: NVIDIA#17126 Signed-off-by: Dhinesh Ponnarasan <dhineshponnarasan@gmail.com>
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Signed-off-by: Dhinesh Ponnarasan <160256912+DhineshPonnarasan@users.noreply.github.com>
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Background
On SM121 (GB10/DGX Spark), the C++ getSMVersion() in cudaUtils.h aliases SM121→120, so the C++ kernel correctly runs the SM120 code path. However, Python get_sm_version() returns 121, causing Python to select the wrong branch. This produces a scale-layout mismatch error (Scale dtype must be Int32.) on dense/MLA FP8 block-scales paths.
Changes
Changed all Python FP8 block-scales gates from get_sm_version() == 120 to get_sm_version() in (120, 121) across 7 files:
No C++ changes are needed since the aliasing already exists in cpp/include/tensorrt_llm/common/cudaUtils.h.
Verification
Requires an SM121 machine to confirm the forward pass no longer raises Scale dtype must be Int32. and that get_sm_version() returns 121 while the SM120 code path is correctly selected.