A1248924 mirror input example

[a1248924]

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[qodo-code-review]

PR Summary by Qodo

Add mirror_input + spi_10mhz AM261x examples; tighten Flow Control labels and SPI timing

✨ Enhancement 🐞 Bug fix 📝 Documentation ⚙️ Configuration changes 🕐 40+ Minutes

AI Description

• Add AM261x examples: mirror GPIO input and validate 10MHz PRU-to-PRU SPI.
• Expose/validate Flow Control jump targets via new per-block _start/_end labels.
• Convert SPI setup timing to nanoseconds with PRU-clock-based cycle conversion.

Diagram

graph TD
  ui["SysConfig UI"] --> meta["PRU meta JS"] --> asm["Generated asm"] --> ex["AM261x examples"] --> sdk[("MCU+ SDK")]
  meta --> docs["Docs/README"]
  ci["CI workflows"] --> ex

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High-Level Assessment

The following are alternative approaches to this PR:

1. Centralize ns→cycles conversion helper

• ➕ Eliminates duplicated conversion logic across SPI Read/Write/Transfer blocks
• ➕ Ensures consistent rounding policy (Math.ceil) and PRU clock lookup
• ➕ Reduces maintenance risk when timing features evolve
• ➖ Requires small refactor to introduce/import the shared helper
• ➖ Slightly harder to cherry-pick into older branches if blocks diverge

2. Stable jump-target IDs (not derived from $name)

• ➕ Avoids Flow Control target invalidation when users rename blocks
• ➕ Could make saved configs more resilient over time
• ➖ Less intuitive than jumping to human-readable block names
• ➖ Requires migration/UI work; may be overkill if rename churn is low

Recommendation: The chosen approach (generate universal _start/_end labels and build a validated jump-target dropdown from the live design) is the right safety/usability tradeoff for SysConfig-based codegen. A follow-up to DRY ns→cycles conversion into a shared helper would reduce duplication, but changing jump targets to stable IDs is likely not worth the added complexity unless rename breakage becomes common.

Files changed (92) +5232 / -1055 · 2 not counted

Enhancement (14) +1110 / -31

pru_register_allocator.jsEmit per-block _start/_end labels and loop early-exit label +38/-1

Emit per-block _start/_end labels and loop early-exit label

• Introduces universal '<blockName>_start' and (where meaningful) '<blockName>_end' labels as addressable Flow Control targets. Adjusts loop label placement to support jumping back without resetting counters and adds a dedicated loop '_end' early-exit target.

.metadata/sysconfig/.meta/pru_blocks/common/register_allocation/pru_register_allocator.js

flow_control_block.syscfg.jsEnumerate and validate Flow Control jump targets from the design +164/-30

Enumerate and validate Flow Control jump targets from the design

• Builds a live list of valid jump targets (SysConfig end, HALT, and each block’s exposed '_start'/'_end' targets) and validates the selected target. Updates long description/context to match the expanded jump semantics.

.metadata/sysconfig/.meta/pru_blocks/program_control/flow_control_block.syscfg.js

example.syscfgAdd PRU0 SysConfig design for input mirroring +82/-0

Add PRU0 SysConfig design for input mirroring

• Defines PRU0 block graph to read a GPI bit and set/clear a GPO bit based on an If/Else, looping via Flow Control back to the infinite loop start. Uses the new jump target semantics for reliable loop continuation.

examples/mirror_input/firmware/am261x-lp/icss_m1_pru0_fw/example.syscfg

example.syscfgAdd PRU1 SysConfig design for square-wave generation +85/-0

Add PRU1 SysConfig design for square-wave generation

• Defines PRU1 infinite loop block graph to toggle a GPO bit with delays to generate a repeating waveform. Provides an input stimulus for PRU0 to mirror.

examples/mirror_input/firmware/am261x-lp/icss_m1_pru1_fw/example.syscfg

main.asmAdd PRU firmware entry stub for mirror_input +35/-0

Add PRU firmware entry stub for mirror_input

• Adds a minimal assembly entry that jumps into sysconfig-generated code. Enables CCS/makefile PRU firmware builds with a consistent entry point.

examples/mirror_input/firmware/main.asm

makefileAdd top-level make orchestration for mirror_input example +106/-0

Add top-level make orchestration for mirror_input example

• Adds per-example makefile to build PRU firmware first, then the MCU+ (R5F) host project for AM261x. Includes standard prebuild checks and clean targets.

examples/mirror_input/makefile

main.cAdd FreeRTOS main for mirror_input host application +84/-0

Add FreeRTOS main for mirror_input host application

• Adds standard MCU+ FreeRTOS startup: System/Board init, create main task, run example entrypoint. Provides the host executable entry for the example.

examples/mirror_input/mcuplus/am261x-lp/r5fss0-0_freertos/main.c

empty_example.cHost-side firmware loader for mirror_input (PRU0/PRU1) +101/-0

Host-side firmware loader for mirror_input (PRU0/PRU1)

• Implements PRUICSS open/init and loads PRU0 and PRU1 firmware images into PRU IRAM. Keeps the host running to allow the PRUs to execute continuously.

examples/mirror_input/mcuplus/empty_example.c

example.syscfgAdd PRU0 SysConfig design for 10MHz SPI controller (Transfer) +50/-0

Add PRU0 SysConfig design for 10MHz SPI controller (Transfer)

• Defines PRU0 controller sequence: load constant → SPI Transfer block (MODE1) with ns-based setup/hold timing → Flow Control terminate. Configured to target 10MHz-class operation for validation.

examples/spi_10mhz/firmware/am261x-lp/icss_m1_pru0_fw/example.syscfg

example.syscfgAdd PRU1 SysConfig design for SPI peripheral response (Write) +49/-0

Add PRU1 SysConfig design for SPI peripheral response (Write)

• Defines PRU1 peripheral sequence: load constant → SPI Write block in peripheral mode → Flow Control terminate. Serves as deterministic responder for PRU0 RX-path validation.

examples/spi_10mhz/firmware/am261x-lp/icss_m1_pru1_fw/example.syscfg

main.asmAdd PRU firmware entry stub for spi_10mhz +40/-0

Add PRU firmware entry stub for spi_10mhz

• Adds a minimal assembly entry that jumps into sysconfig-generated code plus a halt label for tooling/debug. Enables CCS/makefile PRU builds with a consistent entry point.

examples/spi_10mhz/firmware/main.asm

makefileAdd top-level make orchestration for spi_10mhz example +106/-0

Add top-level make orchestration for spi_10mhz example

• Adds per-example makefile to build PRU firmware first, then the MCU+ (R5F) host project for AM261x. Includes standard prebuild checks and clean targets.

examples/spi_10mhz/makefile

main.cAdd FreeRTOS main for spi_10mhz host application +84/-0

Add FreeRTOS main for spi_10mhz host application

• Adds standard MCU+ FreeRTOS startup: System/Board init, create main task, run example entrypoint. Provides the host executable entry for the example.

examples/spi_10mhz/mcuplus/am261x-lp/r5fss0-0_freertos/main.c

empty_example.cHost-side firmware loader and logs for spi_10mhz validation +86/-0

Host-side firmware loader and logs for spi_10mhz validation

• Loads PRU1 (slave) then PRU0 (controller) firmware via PRUICSS and logs expected observation points (e.g., data in PRU0 R0). Keeps host alive for runtime inspection.

examples/spi_10mhz/mcuplus/empty_example.c

Bug fix (5) +437 / -197

pru_blocks_static_module.syscfg.jsFix UART block detection for simulation warnings +2/-4

Fix UART block detection for simulation warnings

• Switches UART presence detection to use the uart_config module rather than uart_tx/uart_rx modules. Improves correctness of simulation support warnings when UART blocks are used.

.metadata/sysconfig/.meta/pru_blocks/common/pru_blocks_static_module.syscfg.js

conditional_block.syscfg.jsValidate that connected If/Else branches terminate in Flow Control +140/-8

Validate that connected If/Else branches terminate in Flow Control

• Adds a reachability-based validator ensuring every connected T/F branch reaches a Flow Control block (walking both control-flow and data-flow fanout). Prevents branch fall-through into the opposite branch in generated assembly.

.metadata/sysconfig/.meta/pru_blocks/program_control/conditional_block.syscfg.js

pru_spi_read.syscfg.jsSPI Read: treat Data Setup Time as ns and convert to PRU cycles +119/-79

SPI Read: treat Data Setup Time as ns and convert to PRU cycles

• Changes Data Setup Time semantics to nanoseconds and converts to PRU cycles using the configured PRU clock (Math.ceil). Updates min SCLK validation and reorders delay loops to honor setup timing; refreshes frequency guidance to include practical limits.

.metadata/sysconfig/.meta/pru_blocks/pru_io_blocks/pru_spi_read.syscfg.js

pru_spi_transfer.syscfg.jsSPI Transfer: ns-based setup timing, updated validation and documentation +82/-45

SPI Transfer: ns-based setup timing, updated validation and documentation

• Converts Data Setup Time to nanoseconds (internally to cycles) and updates per-mode min SCLK validation based on PRU clock. Adjusts macro argument generation to pass setup/hold/setup cycle counts and revises max-frequency guidance (theoretical vs practical PRU-to-PRU loopback).

.metadata/sysconfig/.meta/pru_blocks/pru_io_blocks/pru_spi_transfer.syscfg.js

pru_spi_write.syscfg.jsSPI Write: ns-based Data Setup Time and revised max-frequency guidance +94/-61

SPI Write: ns-based Data Setup Time and revised max-frequency guidance

• Converts Data Setup Time to nanoseconds and derives cycle counts from the configured PRU clock for validation and macro parameters. Updates documentation to distinguish theoretical vs practical frequency limits and expands parameter range to ns units.

.metadata/sysconfig/.meta/pru_blocks/pru_io_blocks/pru_spi_write.syscfg.js

Refactor (4) +9 / -5

uart_rx_op.syscfg.jsImprove UART RX output port display names for 32/64-bit +2/-1

Improve UART RX output port display names for 32/64-bit

• Updates port metadata to show clearer display names depending on whether the RX frame yields 32-bit or 64-bit output. UI/UX-only change.

.metadata/sysconfig/.meta/pru_blocks/pru_io_blocks/uart_rx_op.syscfg.js

uart_tx_op.syscfg.jsImprove UART TX input port display names for 32/64-bit +2/-1

Improve UART TX input port display names for 32/64-bit

• Updates port metadata to show clearer display names depending on whether the TX payload is 32-bit or 64-bit. UI/UX-only change.

.metadata/sysconfig/.meta/pru_blocks/pru_io_blocks/uart_tx_op.syscfg.js

data_splitter.syscfg.jsRename 64-bit input port display name to in64 +1/-1

Rename 64-bit input port display name to in64

• Sets the Data Splitter 64-bit input port displayName to in64 for consistency with other blocks. No functional changes.

.metadata/sysconfig/.meta/pru_blocks/utils/data_splitter.syscfg.js

memory_access_block.syscfg.jsNormalize Memory Access port labels for 32/64-bit read/write +4/-2

Normalize Memory Access port labels for 32/64-bit read/write

• Updates input/output port displayName to reflect width (in64/out64 vs input1/output1) based on data size and mode. UI/UX-only change.

.metadata/sysconfig/.meta/pru_blocks/utils/memory_access_block.syscfg.js

Documentation (11) +330 / -33

README.mdUpdate SPI max-frequency table and document new Flow Control labels +8/-3

Update SPI max-frequency table and document new Flow Control labels

• Adjusts documented maximum SPI frequencies to reflect practical validated limits after timing changes. Documents newly exposed '<blockName>_start/_end' and loop early-exit labels as Flow Control jump targets.

README.md

pru_spi_read_block.mdDocument theoretical vs practical SPI Read limits +8/-6

Document theoretical vs practical SPI Read limits

• Updates SCLK width/frequency table to include theoretical vs practical maxima and explains delay-compensation assumptions. Aligns docs with ns-based setup timing and updated validation model.

docs/input-output/serial-protocol-emulation/pru_spi_read_block.md

pru_spi_transfer_block.mdDocument theoretical vs practical SPI Transfer limits +8/-6

Document theoretical vs practical SPI Transfer limits

• Updates SCLK width/frequency table to include theoretical vs practical maxima and clarifies PRU-to-PRU loopback constraints. Keeps documentation consistent with updated SPI Transfer behavior.

docs/input-output/serial-protocol-emulation/pru_spi_transfer_block.md

pru_spi_write_block.mdDocument theoretical vs practical SPI Write limits +8/-6

Document theoretical vs practical SPI Write limits

• Updates SCLK width/frequency table to include theoretical vs practical maxima and explains the chosen practical delay compensation. Aligns docs with ns-based setup timing changes.

docs/input-output/serial-protocol-emulation/pru_spi_write_block.md

conditional_block.mdClarify If/Else branch termination requirement +15/-4

Clarify If/Else branch termination requirement

• Updates generated assembly example labels and adds explicit guidance that connected branches must terminate via a Flow Control block. Includes guidance for loop-nested If/Else (continue via loop _start, break via loop _end).

docs/program-control/conditional_block.md

flow_control_block.mdDocument jumping to any block’s _start/_end (incl. loop break/continue) +38/-8

Document jumping to any block’s _start/_end (incl. loop break/continue)

• Expands Flow Control documentation from JMP/HALT-only to jumping to any block’s '_start'/'_end' target. Adds examples for continuing/breaking loops and notes live validation of targets.

docs/program-control/flow_control_block.md

loop_block.mdReference Flow Control integration for loop targets +1/-0

Reference Flow Control integration for loop targets

• Adds a note that Flow Control can jump to loop-generated labels/targets. Aligns loop docs with the new jump target model.

docs/program-control/loop_block.md

mirror_input.PNGAdd mirror_input waveform image asset _{not counted}

Add mirror_input waveform image asset

• Adds the waveform screenshot used by the mirror_input README to show input vs mirrored output behavior. Binary asset only.

examples/mirror_input/images/mirror_input.PNG

readme.mdAdd mirror_input example documentation +75/-0

Add mirror_input example documentation

• Documents the two-PRU design (PRU1 generates a signal; PRU0 mirrors input to output) and explains the Loop + If/Else + Flow Control jump pattern. Includes build/run instructions (note: heading text appears to be reused from SPI docs).

examples/mirror_input/readme.md

spi_10mhz.pngAdd spi_10mhz waveform image asset _{not counted}

Add spi_10mhz waveform image asset

• Adds the waveform screenshot used by the spi_10mhz README to illustrate clock/data timing. Binary asset only.

examples/spi_10mhz/images/spi_10mhz.png

readme.mdAdd spi_10mhz example documentation and timing rationale +169/-0

Add spi_10mhz example documentation and timing rationale

• Documents the PRU0 controller (SPI Transfer) and PRU1 peripheral (SPI Write) design used to validate ~10MHz, including timing math and why SPI Write is used on the slave side. Provides pin connections and build/run steps.

examples/spi_10mhz/readme.md

Other (58) +3346 / -789

ccs_build.ymlUpdate AM261x MCU+ SDK version used in CCS CI +3/-3

Update AM261x MCU+ SDK version used in CCS CI

• Bumps the AM261x SDK package/installer URL to a newer release for CI builds. Keeps CCS-based CI aligned with the SDK/tooling required by updated examples/build flow.

.github/workflows/ccs_build.yml

makefile.ymlUpdate AM261x MCU+ SDK version used in makefile CI +3/-3

Update AM261x MCU+ SDK version used in makefile CI

• Bumps the AM261x SDK package/installer URL to a newer release for CI builds. Ensures makefile CI uses the same SDK level expected by the repo.

.github/workflows/makefile.yml

product.jsonAdd AM261x device variants and PRU contexts +29/-1

Add AM261x device variants and PRU contexts

• Adds AM261x variants (e.g., ZNC, ZFG_400) and corresponding ICSS PRU contexts to the product metadata. Enables SysConfig context selection for additional AM261x packages/variants.

.metadata/product.json

example.projectspecUpdate conditional example CCS project linker libraries +5/-5

Update conditional example CCS project linker libraries

• Updates library names to match newer MCU+ SDK naming (FreeRTOS-suffixed drivers/board libs). Prevents CCS link failures on AM261x.

examples/conditional/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec

makefileUpdate conditional example make build for mcelf boot flow +51/-69

Update conditional example make build for mcelf boot flow

• Migrates boot-image targets/cleanup and related constants toward multicore-elf (mcelf) outputs and aligns library naming with the updated SDK layout.

examples/conditional/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile

makefile.defsAdd mcelf artifact patterns to conditional example scrub rules +14/-0

Add mcelf artifact patterns to conditional example scrub rules

• Adds generated-file patterns (including mcelf outputs) for scrub/cleanup. Keeps make builds clean with the updated boot image toolchain.

examples/conditional/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile.defs

makefile_ccs_bootimage_genUpdate CCS post-build boot image generation for conditional example +38/-56

Update CCS post-build boot image generation for conditional example

• Updates CCS post-build boot image generation to use multicore-elf tooling and updated signing scripts/paths. Also adjusts AM261x boot constants (core IDs/run address) to match the new flow.

examples/conditional/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen

example.projectspecUpdate empty example CCS project linker libraries +4/-4

Update empty example CCS project linker libraries

• Updates library names to match newer MCU+ SDK naming (FreeRTOS-suffixed drivers/board libs). Prevents CCS link failures on AM261x.

examples/empty/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec

makefileUpdate empty example make build for mcelf boot flow +51/-71

Update empty example make build for mcelf boot flow

• Migrates boot-image targets/cleanup and related constants toward multicore-elf (mcelf) outputs and aligns library naming with the updated SDK layout.

examples/empty/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile

makefile.defsAdd mcelf artifact patterns to empty example scrub rules +14/-0

Add mcelf artifact patterns to empty example scrub rules

• Adds generated-file patterns (including mcelf outputs) for scrub/cleanup. Keeps make builds clean with the updated boot image toolchain.

examples/empty/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile.defs

makefile_ccs_bootimage_genUpdate CCS post-build boot image generation for empty example +38/-57

Update CCS post-build boot image generation for empty example

• Updates CCS post-build boot image generation to use multicore-elf tooling and updated signing scripts/paths. Also adjusts AM261x boot constants (core IDs/run address) to match the new flow.

examples/empty/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen

example.projectspecUpdate gray_encoder_4_bit CCS project linker libraries +5/-5

Update gray_encoder_4_bit CCS project linker libraries

• Updates library names to match newer MCU+ SDK naming (FreeRTOS-suffixed drivers/board libs). Prevents CCS link failures on AM261x.

examples/gray_encoder_4_bit/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec

makefileUpdate gray_encoder_4_bit make build for mcelf boot flow +51/-69

Update gray_encoder_4_bit make build for mcelf boot flow

• Migrates boot-image targets/cleanup and related constants toward multicore-elf outputs and aligns library naming with the updated SDK layout.

examples/gray_encoder_4_bit/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile

makefile.defsAdd mcelf artifact patterns to gray_encoder_4_bit scrub rules +14/-0

Add mcelf artifact patterns to gray_encoder_4_bit scrub rules

• Adds generated-file patterns (including mcelf outputs) for scrub/cleanup. Keeps make builds clean with the updated boot image toolchain.

examples/gray_encoder_4_bit/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile.defs

makefile_ccs_bootimage_genUpdate CCS post-build boot image generation for gray_encoder_4_bit +38/-56

Update CCS post-build boot image generation for gray_encoder_4_bit

• Updates CCS post-build boot image generation to use multicore-elf tooling and updated signing scripts/paths. Also adjusts AM261x boot constants (core IDs/run address) to match the new flow.

examples/gray_encoder_4_bit/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen

example.projectspecUpdate incremental_spi CCS project linker libraries +5/-5

Update incremental_spi CCS project linker libraries

• Updates library names to match newer MCU+ SDK naming (FreeRTOS-suffixed drivers/board libs). Prevents CCS link failures on AM261x.

examples/incremental_spi/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec

makefileUpdate incremental_spi make build for mcelf boot flow +51/-69

Update incremental_spi make build for mcelf boot flow

• Migrates boot-image targets/cleanup and related constants toward multicore-elf outputs and aligns library naming with the updated SDK layout.

examples/incremental_spi/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile

makefile.defsAdd mcelf artifact patterns to incremental_spi scrub rules +14/-0

Add mcelf artifact patterns to incremental_spi scrub rules

• Adds generated-file patterns (including mcelf outputs) for scrub/cleanup. Keeps make builds clean with the updated boot image toolchain.

examples/incremental_spi/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile.defs

makefile_ccs_bootimage_genUpdate CCS post-build boot image generation for incremental_spi +38/-56

Update CCS post-build boot image generation for incremental_spi

• Updates CCS post-build boot image generation to use multicore-elf tooling and updated signing scripts/paths. Also adjusts AM261x boot constants (core IDs/run address) to match the new flow.

examples/incremental_spi/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen

makefileBuild new examples from top-level examples makefile +2/-0

Build new examples from top-level examples makefile

• Adds spi_10mhz and mirror_input to the examples SUBDIRS list. Enables top-level example builds to include the new projects where applicable.

examples/makefile

example.projectspecAdd CCS projectspec for mirror_input PRU0 firmware +83/-0

Add CCS projectspec for mirror_input PRU0 firmware

• Adds CCS project metadata for building PRU0 firmware with TI PRU-CGT. Supports importing/building the PRU0 firmware project in CCS.

examples/mirror_input/firmware/am261x-lp/icss_m1_pru0_fw/ti-pru-cgt/example.projectspec

linker.cmdAdd linker command file for mirror_input PRU0 firmware +54/-0

Add linker command file for mirror_input PRU0 firmware

• Adds PRU linker configuration for memory/section placement required to build the PRU0 firmware output.

examples/mirror_input/firmware/am261x-lp/icss_m1_pru0_fw/ti-pru-cgt/linker.cmd

makefileAdd TI PRU-CGT makefile for mirror_input PRU0 firmware +55/-0

Add TI PRU-CGT makefile for mirror_input PRU0 firmware

• Adds make-based PRU0 firmware build producing .out/.h artifacts consumed by the host project. Matches repo build conventions for PRU firmware.

examples/mirror_input/firmware/am261x-lp/icss_m1_pru0_fw/ti-pru-cgt/makefile

makefile_projectspecAdd makefile-to-CCS integration helper for PRU0 firmware +16/-0

Add makefile-to-CCS integration helper for PRU0 firmware

• Adds supporting file(s) to integrate makefile builds with CCS project workflows for PRU0 firmware.

examples/mirror_input/firmware/am261x-lp/icss_m1_pru0_fw/ti-pru-cgt/makefile_projectspec

example.projectspecAdd CCS projectspec for mirror_input PRU1 firmware +83/-0

Add CCS projectspec for mirror_input PRU1 firmware

• Adds CCS project metadata for building PRU1 firmware with TI PRU-CGT. Supports importing/building PRU1 firmware project in CCS.

examples/mirror_input/firmware/am261x-lp/icss_m1_pru1_fw/ti-pru-cgt/example.projectspec

linker.cmdAdd linker command file for mirror_input PRU1 firmware +54/-0

Add linker command file for mirror_input PRU1 firmware

• Adds PRU linker configuration for memory/section placement required to build the PRU1 firmware output.

examples/mirror_input/firmware/am261x-lp/icss_m1_pru1_fw/ti-pru-cgt/linker.cmd

makefileAdd TI PRU-CGT makefile for mirror_input PRU1 firmware +55/-0

Add TI PRU-CGT makefile for mirror_input PRU1 firmware

• Adds make-based PRU1 firmware build producing .out/.h artifacts consumed by the host project. Matches repo build conventions for PRU firmware.

examples/mirror_input/firmware/am261x-lp/icss_m1_pru1_fw/ti-pru-cgt/makefile

makefile_projectspecAdd makefile-to-CCS integration helper for PRU1 firmware +16/-0

Add makefile-to-CCS integration helper for PRU1 firmware

• Adds supporting file(s) to integrate makefile builds with CCS project workflows for PRU1 firmware.

examples/mirror_input/firmware/am261x-lp/icss_m1_pru1_fw/ti-pru-cgt/makefile_projectspec

example.syscfgAdd MCU+ SysConfig for mirror_input host project +325/-0

Add MCU+ SysConfig for mirror_input host project

• Adds AM261x-LP host-side SysConfig setup (PRUICSS instance, GPIO pinmux, logging, memory config). Generates the driver/board configuration for the R5F application.

examples/mirror_input/mcuplus/am261x-lp/r5fss0-0_freertos/example.syscfg

example.projectspecAdd CCS projectspec for mirror_input R5F host build +116/-0

Add CCS projectspec for mirror_input R5F host build

• Adds CCS project metadata for building the mirror_input R5F FreeRTOS host app with ti-arm-clang. Ensures PRU firmware headers are included appropriately.

examples/mirror_input/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec

makefileAdd ti-arm-clang make build for mirror_input R5F host app +336/-0

Add ti-arm-clang make build for mirror_input R5F host app

• Adds makefile build for the R5F host project, including updated boot-image generation and cleanup targets consistent with mcelf-based flows.

examples/mirror_input/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile

makefile.defsAdd generated artifact patterns for mirror_input host scrub +14/-0

Add generated artifact patterns for mirror_input host scrub

• Adds generated-file patterns (including mcelf outputs) used by scrub/cleanup targets. Keeps build output tidy across rebuilds.

examples/mirror_input/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile.defs

makefile_ccs_bootimage_genAdd CCS post-build boot image generation for mirror_input host app +95/-0

Add CCS post-build boot image generation for mirror_input host app

• Adds CCS post-build logic for multicore-elf image generation/signing consistent with the updated AM261x boot flow. Enables CCS build parity with make builds.

examples/mirror_input/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen

makefile_projectspecAdd makefile projectspec helper for mirror_input host build +16/-0

Add makefile projectspec helper for mirror_input host build

• Adds helper metadata to integrate the host makefile build into CCS workflows. Standard example scaffolding.

examples/mirror_input/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec

syscfg_c.rov.xsAdd ROV integration file for mirror_input host build +12/-0

Add ROV integration file for mirror_input host build

• Adds the syscfg_c.rov.xs file used by CCS Runtime Object View / SysConfig integration. Standard MCU+ example scaffolding.

examples/mirror_input/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs

example.projectspecAdd CCS projectspec for spi_10mhz PRU0 firmware +83/-0

Add CCS projectspec for spi_10mhz PRU0 firmware

• Adds CCS project metadata for building PRU0 firmware with TI PRU-CGT. Supports importing/building PRU0 SPI controller firmware project in CCS.

examples/spi_10mhz/firmware/am261x-lp/icss_m1_pru0_fw/ti-pru-cgt/example.projectspec

linker.cmdAdd linker command file for spi_10mhz PRU0 firmware +54/-0

Add linker command file for spi_10mhz PRU0 firmware

• Adds PRU linker configuration for memory/section placement required to build the PRU0 firmware output.

examples/spi_10mhz/firmware/am261x-lp/icss_m1_pru0_fw/ti-pru-cgt/linker.cmd

makefileAdd TI PRU-CGT makefile for spi_10mhz PRU0 firmware +55/-0

Add TI PRU-CGT makefile for spi_10mhz PRU0 firmware

• Adds make-based PRU0 firmware build producing .out/.h artifacts consumed by the host project. Matches repo build conventions for PRU firmware.

examples/spi_10mhz/firmware/am261x-lp/icss_m1_pru0_fw/ti-pru-cgt/makefile

makefile_projectspecAdd makefile-to-CCS integration helper for spi_10mhz PRU0 firmware +16/-0

Add makefile-to-CCS integration helper for spi_10mhz PRU0 firmware

• Adds supporting file(s) to integrate makefile builds with CCS project workflows for PRU0 firmware.

examples/spi_10mhz/firmware/am261x-lp/icss_m1_pru0_fw/ti-pru-cgt/makefile_projectspec

example.projectspecAdd CCS projectspec for spi_10mhz PRU1 firmware +83/-0

Add CCS projectspec for spi_10mhz PRU1 firmware

• Adds CCS project metadata for building PRU1 firmware with TI PRU-CGT. Supports importing/building PRU1 SPI peripheral firmware project in CCS.

examples/spi_10mhz/firmware/am261x-lp/icss_m1_pru1_fw/ti-pru-cgt/example.projectspec

linker.cmdAdd linker command file for spi_10mhz PRU1 firmware +54/-0

Add linker command file for spi_10mhz PRU1 firmware

• Adds PRU linker configuration for memory/section placement required to build the PRU1 firmware output.

examples/spi_10mhz/firmware/am261x-lp/icss_m1_pru1_fw/ti-pru-cgt/linker.cmd

makefileAdd TI PRU-CGT makefile for spi_10mhz PRU1 firmware +55/-0

Add TI PRU-CGT makefile for spi_10mhz PRU1 firmware

• Adds make-based PRU1 firmware build producing .out/.h artifacts consumed by the host project. Matches repo build conventions for PRU firmware.

examples/spi_10mhz/firmware/am261x-lp/icss_m1_pru1_fw/ti-pru-cgt/makefile

makefile_projectspecAdd makefile-to-CCS integration helper for spi_10mhz PRU1 firmware +16/-0

Add makefile-to-CCS integration helper for spi_10mhz PRU1 firmware

• Adds supporting file(s) to integrate makefile builds with CCS project workflows for PRU1 firmware.

examples/spi_10mhz/firmware/am261x-lp/icss_m1_pru1_fw/ti-pru-cgt/makefile_projectspec

example.syscfgAdd MCU+ SysConfig for spi_10mhz host project +327/-0

Add MCU+ SysConfig for spi_10mhz host project

• Adds AM261x-LP host-side SysConfig setup (PRUICSS instance, pinmux, logging, memory config). Generates the driver/board configuration for the R5F application.

examples/spi_10mhz/mcuplus/am261x-lp/r5fss0-0_freertos/example.syscfg

example.projectspecAdd CCS projectspec for spi_10mhz R5F host build +116/-0

Add CCS projectspec for spi_10mhz R5F host build

• Adds CCS project metadata for building the spi_10mhz R5F FreeRTOS host app with ti-arm-clang. Ensures PRU firmware headers are included appropriately.

examples/spi_10mhz/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec

makefileAdd ti-arm-clang make build for spi_10mhz R5F host app +336/-0

Add ti-arm-clang make build for spi_10mhz R5F host app

• Adds makefile build for the R5F host project, including updated boot-image generation and cleanup targets consistent with mcelf-based flows.

examples/spi_10mhz/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile

makefile.defsAdd generated artifact patterns for spi_10mhz host scrub +14/-0

Add generated artifact patterns for spi_10mhz host scrub

• Adds generated-file patterns (including mcelf outputs) used by scrub/cleanup targets. Keeps build output tidy across rebuilds.

examples/spi_10mhz/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile.defs

makefile_ccs_bootimage_genAdd CCS post-build boot image generation for spi_10mhz host app +95/-0

Add CCS post-build boot image generation for spi_10mhz host app

• Adds CCS post-build logic for multicore-elf image generation/signing consistent with the updated AM261x boot flow. Enables CCS build parity with make builds.

examples/spi_10mhz/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen

makefile_projectspecAdd makefile projectspec helper for spi_10mhz host build +16/-0

Add makefile projectspec helper for spi_10mhz host build

• Adds helper metadata to integrate the host makefile build into CCS workflows. Standard example scaffolding.

examples/spi_10mhz/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_projectspec

syscfg_c.rov.xsAdd ROV integration file for spi_10mhz host build +12/-0

Add ROV integration file for spi_10mhz host build

• Adds the syscfg_c.rov.xs file used by CCS Runtime Object View / SysConfig integration. Standard MCU+ example scaffolding.

examples/spi_10mhz/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/syscfg_c.rov.xs

example.projectspecUpdate spi_loopback CCS project linker libraries +5/-5

Update spi_loopback CCS project linker libraries

• Updates library names to match newer MCU+ SDK naming (FreeRTOS-suffixed drivers/board libs). Prevents CCS link failures on AM261x.

examples/spi_loopback/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec

makefileUpdate spi_loopback make build for mcelf boot flow +51/-69

Update spi_loopback make build for mcelf boot flow

• Migrates boot-image targets/cleanup and related constants toward multicore-elf outputs and aligns library naming with the updated SDK layout.

examples/spi_loopback/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile

makefile.defsAdd mcelf artifact patterns to spi_loopback scrub rules +14/-0

Add mcelf artifact patterns to spi_loopback scrub rules

• Adds generated-file patterns (including mcelf outputs) for scrub/cleanup. Keeps make builds clean with the updated boot image toolchain.

examples/spi_loopback/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile.defs

makefile_ccs_bootimage_genUpdate CCS post-build boot image generation for spi_loopback +38/-56

Update CCS post-build boot image generation for spi_loopback

• Updates CCS post-build boot image generation to use multicore-elf tooling and updated signing scripts/paths. Also adjusts AM261x boot constants (core IDs/run address) to match the new flow.

examples/spi_loopback/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen

example.projectspecUpdate uart_crc CCS project linker libraries +5/-5

Update uart_crc CCS project linker libraries

• Updates library names to match newer MCU+ SDK naming (FreeRTOS-suffixed drivers/board libs). Prevents CCS link failures on AM261x.

examples/uart_crc/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/example.projectspec

makefileUpdate uart_crc make build for mcelf boot flow +51/-69

Update uart_crc make build for mcelf boot flow

• Migrates boot-image targets/cleanup and related constants toward multicore-elf outputs and aligns library naming with the updated SDK layout.

examples/uart_crc/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile

makefile.defsAdd mcelf artifact patterns to uart_crc scrub rules +14/-0

Add mcelf artifact patterns to uart_crc scrub rules

• Adds generated-file patterns (including mcelf outputs) for scrub/cleanup. Keeps make builds clean with the updated boot image toolchain.

examples/uart_crc/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile.defs

makefile_ccs_bootimage_genUpdate CCS post-build boot image generation for uart_crc +38/-56

Update CCS post-build boot image generation for uart_crc

• Updates CCS post-build boot image generation to use multicore-elf tooling and updated signing scripts/paths. Also adjusts AM261x boot constants (core IDs/run address) to match the new flow.

examples/uart_crc/mcuplus/am261x-lp/r5fss0-0_freertos/ti-arm-clang/makefile_ccs_bootimage_gen

[qodo-code-review]

Code Review by Qodo

🐞 Bugs (0) 📘 Rule violations (1) 📎 Requirement gaps (0) 🎨 UX issues (0) 🔗 Cross-repo conflicts (0) 📜 Skill insights (0)

1. Flow control opCode regression ✓ Resolved 🐞 Bug ≡ Correctness

Description

flow_control_block.syscfg.js makes opCode a derived value from jumpTarget, so legacy .syscfg
files that still set flow_control_block*.opCode will no longer generate the intended HALT/JMP
behavior. This can make existing examples generate JMP sysconfig_generated_end and then fail to
link when sysconfig_generated_end is not defined (e.g., examples/empty/firmware/main.asm).

Code

.metadata/sysconfig/.meta/pru_blocks/program_control/flow_control_block.syscfg.js[R300-303]

+			default: "JMP",
+			getValue: (inst) => {
+				return (inst["jumpTarget"] === "HALT") ? "HALT" : "JMP";
+			}

Evidence

The Flow Control module now derives opCode solely from jumpTarget (defaulting to JMP), while
existing examples still configure opCode directly; those example main.asm files do not define
sysconfig_generated_end, so if Flow Control switches from HALT to JMP the generated jump target
can become undefined and break linking.

.metadata/sysconfig/.meta/pru_blocks/program_control/flow_control_block.syscfg.js[280-318]
examples/empty/firmware/am261x-lp/icss_m1_pru0_fw/example.syscfg[12-20]
examples/spi_loopback/firmware/am261x-lp/icss_m1_pru0_fw/example.syscfg[25-30]
examples/empty/firmware/main.asm[22-36]
.metadata/sysconfig/.meta/pru_blocks/common/register_allocation/pru_register_allocator.js[708-726]

Agent prompt

The issue below was found during a code review. Follow the provided context and guidance below and implement a solution

## Issue description
The Flow Control block config changed from `opCode` to `jumpTarget`. `opCode` is now computed from `jumpTarget`, so any existing `.syscfg` that sets `inst.opCode = "HALT"` will be ignored and default to `jumpTarget="JMP"`, changing codegen and potentially causing link failures due to a now-required `sysconfig_generated_end` symbol.

## Issue Context
Repository examples still set `flow_control_block*.opCode = "HALT"`, and some example `main.asm` files do not define `sysconfig_generated_end`. With the new Flow Control behavior, those examples can start emitting `JMP sysconfig_generated_end` (via `constant1`), creating an undefined-symbol link error.

## Fix Focus Areas
- .metadata/sysconfig/.meta/pru_blocks/program_control/flow_control_block.syscfg.js[280-319]
- examples/empty/firmware/am261x-lp/icss_m1_pru0_fw/example.syscfg[12-20]
- examples/spi_loopback/firmware/am261x-lp/icss_m1_pru0_fw/example.syscfg[25-30]
- examples/empty/firmware/main.asm[22-36]

### Recommended fix (choose one)
1) **Back-compat in module (preferred):** keep honoring legacy `opCode` assignments from `.syscfg` (e.g., keep `opCode` as the persisted config name and extend its options to include the new jump targets), or add a clear migration mechanism that maps legacy `opCode` to `jumpTarget`.
2) **Update repo examples:** replace `flow_control_block*.opCode = "HALT"` with `flow_control_block*.jumpTarget = "HALT"` across example `.syscfg` files. If any example intends `JMP`, ensure its `main.asm` defines a `sysconfig_generated_end:` label.

ⓘ Copy this prompt and use it to remediate the issue with your preferred AI generation tools

---

2. Non-semantic block $name values 📘 Rule violation ⚙ Maintainability Rule 2

Description

The new PRU0 and PRU1 SysConfig designs use generated, ambiguous type-and-index block instance names
(e.g., Load_Constant_0, If_Else_0, PRU0_GPI_INSTANCE_0, PRU1_GPO_INSTANCE_0, Delay_0,
Loop_0) instead of functional, purpose-oriented names. This violates Compliance ID 1 and makes
reviews, wiring validation, and future edits more error-prone by increasing the chance of selecting
or connecting the wrong block.

Code

examples/mirror_input/firmware/am261x-lp/icss_m1_pru0_fw/example.syscfg[R33-36]

+load_constant_block1.$name = "Load_Constant_0";
+
+conditional_block1.$name            = "If_Else_0";
+conditional_block1.conditionToCheck = "equalToInput2";

Evidence

Compliance ID 1 requires block instance names to be semantic and describe functional purpose/value
rather than using generated patterns like *_0 or *_INSTANCE_0. In the added SysConfig files, the
PRU0 design includes generated names such as Load_Constant_0, If_Else_0, and similarly generated
GPIO instance names (e.g., PRU0_GPI_INSTANCE_0), while the PRU1 design includes generated/generic
names like PRU1_GPO_INSTANCE_0, Delay_0, and Loop_0; these examples demonstrate that the
instance naming is type/index-based instead of purpose-oriented, directly contradicting the
requirement.

Rule Rule 2: Use Semantic Names for Block Instances
examples/mirror_input/firmware/am261x-lp/icss_m1_pru0_fw/example.syscfg[33-55]
examples/mirror_input/firmware/am261x-lp/icss_m1_pru1_fw/example.syscfg[28-56]

Agent prompt

The issue below was found during a code review. Follow the provided context and guidance below and implement a solution

## Issue description
The PRU0 and PRU1 SysConfig designs assign generated, ambiguous type-and-index instance names (e.g., `*_0`, `*_INSTANCE_0`) instead of functional/semantic names that reflect each block’s role, increasing the likelihood of wiring/connection mistakes during review and future edits.

## Issue Context
Compliance ID 1 requires block instance names that clearly describe purpose/value (not generated naming like `Load_Constant_0`, `If_Else_0`, `Delay_0`, `Loop_0`, `PRU0_GPI_INSTANCE_0`, `PRU1_GPO_INSTANCE_0`). This is especially important when multiple similar blocks exist (e.g., multiple GPO/GPI blocks, conditionals, constants, delays/loops), where ambiguous names make it easier to select or connect the wrong block.

## Fix Focus Areas
- examples/mirror_input/firmware/am261x-lp/icss_m1_pru0_fw/example.syscfg[33-55]
- examples/mirror_input/firmware/am261x-lp/icss_m1_pru1_fw/example.syscfg[28-56]

ⓘ Copy this prompt and use it to remediate the issue with your preferred AI generation tools

---

_{To customize comments, go to the Qodo configuration screen, or learn more in the docs.}

[qodo-code-review]

1. Non-semantic block $name values 📘 Rule violation ⚙ Maintainability

Rule 2

The new PRU0 and PRU1 SysConfig designs use generated, ambiguous type-and-index block instance names
(e.g., Load_Constant_0, If_Else_0, PRU0_GPI_INSTANCE_0, PRU1_GPO_INSTANCE_0, Delay_0,
Loop_0) instead of functional, purpose-oriented names. This violates Compliance ID 1 and makes
reviews, wiring validation, and future edits more error-prone by increasing the chance of selecting
or connecting the wrong block.

Agent Prompt

## Issue description
The PRU0 and PRU1 SysConfig designs assign generated, ambiguous type-and-index instance names (e.g., `*_0`, `*_INSTANCE_0`) instead of functional/semantic names that reflect each block’s role, increasing the likelihood of wiring/connection mistakes during review and future edits.

## Issue Context
Compliance ID 1 requires block instance names that clearly describe purpose/value (not generated naming like `Load_Constant_0`, `If_Else_0`, `Delay_0`, `Loop_0`, `PRU0_GPI_INSTANCE_0`, `PRU1_GPO_INSTANCE_0`). This is especially important when multiple similar blocks exist (e.g., multiple GPO/GPI blocks, conditionals, constants, delays/loops), where ambiguous names make it easier to select or connect the wrong block.

## Fix Focus Areas
- examples/mirror_input/firmware/am261x-lp/icss_m1_pru0_fw/example.syscfg[33-55]
- examples/mirror_input/firmware/am261x-lp/icss_m1_pru1_fw/example.syscfg[28-56]

ⓘ Copy this prompt and use it to remediate the issue with your preferred AI generation tools