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Xilinx / MLDebugger Public

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add spare reg to status - #32

#32

Merged

hackwa merged 2 commits into

Xilinx:mainXilinx/MLDebugger:mainfrom

hackwa:sparereghackwa/MLDebugger:spareregCopy head branch name to clipboard

Jul 22, 2026

Conversation Commits2 (2)Checks Files changed

Merged

add spare reg to status#32
hackwa merged 2 commits into
Xilinx:mainfrom
hackwa:sparereg

Commits

Commits on Jul 22, 2026

add spare reg to status
anurag
committed
fix spacing
anurag
committed

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