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Complete README roadmap: i-cache, divergence, coalescing, TT adapter, graphics & live dashboard - #64

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Complete README roadmap: i-cache, divergence, coalescing, TT adapter, graphics & live dashboard#64
Assem-ElQersh wants to merge 1 commit into
adam-maj:masterfrom
Assem-ElQersh:master

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Summary

Implements the project's README "Next Steps" roadmap end-to-end, with tests and a cycle-accurate web dashboard:

  • RTL optimizations: skip WAIT for non-memory ops + combinational decode, 16-line instruction cache, same-address read coalescing, per-thread PC / active-mask branch divergence, speculative PC+1 prefetch
  • Tiny Tapeout 7 adapter (src/tt/) with byte-serial protocol, smoke test, and pinout docs
  • Graphics kernel (16×15 framebuffer circle) demonstrating real divergent branches
  • Live dashboard (make gui_*): WebSocket streaming, pause/step/speed/restart, replay of .jsonl traces, pipeline + register + framebuffer views

Cycle counts (vs original baselines): matadd 178 → 115, matmul 491 → 256. Full table in CHANGELOG.md.

Test plan

  • source scripts/env.sh && make test_all (matadd, matmul, divergence, coalescing, icache, graphics, TT adapter)
  • make gui_graphics → open http://localhost:8080, confirm framebuffer fills and Restart relaunches the run
  • Optional: python sim/server.py --replay build/traces/graphics.jsonl for offline scrubbing

…ashboard.

Adds instruction cache, coalescing, branch divergence, and prefetch pipelining with matching tests; ships a Tiny Tapeout wrapper, graphics kernel, and WebSocket dashboard with restart/replay.
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