winch(aarch64): Improve addressing modes#12708
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alexcrichton merged 1 commit intobytecodealliance:mainfrom Mar 31, 2026
Merged
winch(aarch64): Improve addressing modes#12708alexcrichton merged 1 commit intobytecodealliance:mainfrom
alexcrichton merged 1 commit intobytecodealliance:mainfrom
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Prior to this commit, Winch's `Address` representation relied on the general `(reg, offset)` form for offset-based addressing, leaving the materialization of the addressing mode to Cranelift. This approach led to the following bug found by the fuzzer: When offsets cannot be encoded as a 9-bit signed immediate offset or a 12-bit unsigned immediate offset with scaling, the offset must be loaded into a register and the addressing mode is transformed to its `(reg, reg)` form. Cranelift's addressing mode materialization currently uses `x16` as a scratch register to load the offset; even though both Cranelift and Winch use `x16` as a scratch register, its usage is not in sync, therefore clobbers can happen. This commit improves addressing modes by requiring early materialization of addressing modes into their respective Cranelift variants.
saulecabrera
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Mar 3, 2026
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+324
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+325
| let constant = self.add_constant(&imm.to_bytes()); | ||
| let addr = AMode::Const { addr: constant }; |
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I removed this from the top-level Address since it's only used here, which removes one level of indirection.
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fitzgen
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Mar 30, 2026
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LGTM, sorry I missed this one!
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Prior to this commit, Winch's
Addressrepresentation relied on the general(reg, offset)form for offset-based addressing, leaving the materialization of the addressing mode to Cranelift. This approach led to the following bug found by the fuzzer:When offsets cannot be encoded as a 9-bit signed immediate offset or a 12-bit unsigned immediate offset with scaling, the offset must be loaded into a register and the addressing mode is transformed to its
(reg, reg)form. Cranelift's addressing mode materialization currently usesx16as a scratch register to load the offset; even though both Cranelift and Winch usex16as a scratch register, its usage is not in sync, therefore clobbers can happen.This commit improves addressing modes by requiring early materialization of addressing modes into their respective Cranelift variants.