driver: ddramc: fix JEDEC timing

[sonicpp]

tWTR is defined in ns unit, so it has to be converted to tCK, while tXSRD, on the other hand, is already in tCK.

This can be seen for example when the DDR timing is defined as

CONFIG_DDR_SET_BY_DEVICE=y
CONFIG_DDR_W971GG6SB=y

then the values are correct:
tWTR=2
tXSRD=200

But when setting following option

CONFIG_DDR_SET_BY_JEDEC=y

then the values are wrong:
tWTR=8
tXSRD=40
while these values should be same as above as per JEDEC specs.