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Add support for PCIe on Shikra #1208

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eec7866
arm64: dts: qcom: eliza: Add PCIe PHY and controller nodes
sushrut-trivedi May 20, 2026
95cfdc3
arm64: dts: qcom: shikra-cqm-evk: Add TC9563 PCIe switch node for PCIe
sushrut-trivedi May 20, 2026
41cc457
arm64: dts: qcom: shikra-cqs-evk: Add TC9563 PCIe switch node for PCIe
sushrut-trivedi May 20, 2026
4243fc4
arm64: dts: qcom: shikra-iqs-evk: Add TC9563 PCIe switch node for PCIe
sushrut-trivedi May 20, 2026
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159 changes: 159 additions & 0 deletions arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@
mmc1 = &sdhc_2; /* SDC2 SD card slot */
serial0 = &uart0;
serial1 = &uart8;
i2c3 = &i2c3;
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@Komal-Bajaj Komal-Bajaj May 20, 2026

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add in alphabetical order

};

chosen {
Expand All @@ -37,6 +38,30 @@
pinctrl-names = "default";
};

vreg_0p9: regulator-0v9 {
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@Komal-Bajaj Komal-Bajaj May 20, 2026

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maintain nodes in alphabetical order of node-names

compatible = "regulator-fixed";
regulator-name = "VREG_0P9";

regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-always-on;
regulator-boot-on;
};

vreg_1p8: regulator-1v8 {
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@Komal-Bajaj Komal-Bajaj May 20, 2026

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same

compatible = "regulator-fixed";
regulator-name = "VREG_1P8";

regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};

};

&i2c3 {
status = "okay";
};

&mdss {
Expand Down Expand Up @@ -76,6 +101,106 @@
};
};

&pcie {
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@Komal-Bajaj Komal-Bajaj May 20, 2026 •
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add this node after &mdss_dsi0_phy to maintain alphabetical order

wake-gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;

iommu-map = <0x0 &apps_smmu 0x0800 0x1>,
<0x100 &apps_smmu 0x0801 0x1>,
<0x208 &apps_smmu 0x0802 0x1>,
<0x210 &apps_smmu 0x0803 0x1>,
<0x218 &apps_smmu 0x0804 0x1>,
<0x300 &apps_smmu 0x0805 0x1>,
<0x400 &apps_smmu 0x0806 0x1>,
<0x500 &apps_smmu 0x0807 0x1>,
<0x501 &apps_smmu 0x0808 0x1>;

pinctrl-0 = <&pcie_default_state>;
pinctrl-names = "default";

status = "okay";
};

&pcie_port0 {
#address-cells = <3>;
#size-cells = <2>;

pcie@0,0 {
compatible = "pci1179,0623";
reg = <0x10000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;

device_type = "pci";
ranges;
bus-range = <0x2 0xff>;

vddc-supply = <&vreg_0p9>;
vdd18-supply = <&vreg_1p8>;
vdd09-supply = <&vreg_0p9>;
vddio1-supply = <&vreg_1p8>;
vddio2-supply = <&vreg_1p8>;
vddio18-supply = <&vreg_1p8>;

i2c-parent = <&i2c3 0x77>;

resx-gpios = <&tlmm 118 GPIO_ACTIVE_LOW>;

pinctrl-0 = <&tc9563_resx_n>;
pinctrl-names = "default";

pcie@1,0 {
reg = <0x20800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;

device_type = "pci";
ranges;
bus-range = <0x3 0xff>;

toshiba,ep-pwr-en-gpio = <0x2>;
toshiba,ep-reset-gpio = <0x5>;
};

pcie@2,0 {
reg = <0x21000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;

device_type = "pci";
ranges;
bus-range = <0x4 0xff>;

toshiba,ep-pwr-en-gpio = <0x4>;
toshiba,ep-reset-gpio = <0x3>;
};

pcie@3,0 {
reg = <0x21800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
bus-range = <0x5 0xff>;

pci@0,0 {
reg = <0x50000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
};

pci@0,1 {
reg = <0x50100 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
};
};
};
};

&mdss_dsi0_out {
remote-endpoint = <&panel_in>;
data-lanes = <0 1 2 3>;
Expand All @@ -85,6 +210,13 @@
status = "okay";
};

&pcie_phy {
vdda-phy-supply = <&pm4125_l13>;
vdda-pll-supply = <&pm4125_l9>;

status = "okay";
};

&pm4125_hs_in {
remote-endpoint = <&usb_1_dwc3_hs>;
};
Expand Down Expand Up @@ -173,6 +305,33 @@
bias-pull-down;
};

pcie_default_state: pcie-default-state {
clkreq-pins {
pins = "gpio117";
function = "pcie0_clk_req_n";
drive-strength = <2>;
bias-pull-up;
};

wake-pins {
pins = "gpio119";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};

tc9563_resx_n: tc9563-resx-state {
pins = "gpio118";
function = "gpio";
bias-disable;
/* Reset pin of tc9563 is active low hence set default
* state of this pin to output-high.
*/
output-high;
};


};

&uart0 {
Expand Down
160 changes: 160 additions & 0 deletions arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
View file
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Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@
mmc1 = &sdhc_2; /* SDC2 SD card slot */
serial0 = &uart0;
serial1 = &uart8;
i2c3 = &i2c3;
};

chosen {
Expand All @@ -36,6 +37,138 @@
pinctrl-0 = <&lcd_bias_en>;
pinctrl-names = "default";
};

vreg_0p9: regulator-0v9 {
compatible = "regulator-fixed";
regulator-name = "VREG_0P9";

regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-always-on;
regulator-boot-on;
};

vreg_1p8: regulator-1v8 {
compatible = "regulator-fixed";
regulator-name = "VREG_1P8";

regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};

};

&i2c3 {
status = "okay";
};

&pcie {
wake-gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;

iommu-map = <0x0 &apps_smmu 0x0800 0x1>,
<0x100 &apps_smmu 0x0801 0x1>,
<0x208 &apps_smmu 0x0802 0x1>,
<0x210 &apps_smmu 0x0803 0x1>,
<0x218 &apps_smmu 0x0804 0x1>,
<0x300 &apps_smmu 0x0805 0x1>,
<0x400 &apps_smmu 0x0806 0x1>,
<0x500 &apps_smmu 0x0807 0x1>,
<0x501 &apps_smmu 0x0808 0x1>;

pinctrl-0 = <&pcie_default_state>;
pinctrl-names = "default";

status = "okay";
};

&pcie_port0 {
#address-cells = <3>;
#size-cells = <2>;

pcie@0,0 {
compatible = "pci1179,0623";
reg = <0x10000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;

device_type = "pci";
ranges;
bus-range = <0x2 0xff>;

vddc-supply = <&vreg_0p9>;
vdd18-supply = <&vreg_1p8>;
vdd09-supply = <&vreg_0p9>;
vddio1-supply = <&vreg_1p8>;
vddio2-supply = <&vreg_1p8>;
vddio18-supply = <&vreg_1p8>;

i2c-parent = <&i2c3 0x77>;

resx-gpios = <&tlmm 118 GPIO_ACTIVE_LOW>;

pinctrl-0 = <&tc9563_resx_n>;
pinctrl-names = "default";

pcie@1,0 {
reg = <0x20800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;

device_type = "pci";
ranges;
bus-range = <0x3 0xff>;

toshiba,ep-pwr-en-gpio = <0x2>;
toshiba,ep-reset-gpio = <0x5>;
};

pcie@2,0 {
reg = <0x21000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;

device_type = "pci";
ranges;
bus-range = <0x4 0xff>;

toshiba,ep-pwr-en-gpio = <0x4>;
toshiba,ep-reset-gpio = <0x3>;
};

pcie@3,0 {
reg = <0x21800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
bus-range = <0x5 0xff>;

pci@0,0 {
reg = <0x50000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
};

pci@0,1 {
reg = <0x50100 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
};
};
};
};

&pcie_phy {
vdda-phy-supply = <&pm4125_l13>;
vdda-pll-supply = <&pm4125_l9>;

status = "okay";
};

&mdss {
Expand Down Expand Up @@ -165,6 +298,33 @@
drive-strength = <2>;
bias-pull-down;
};

pcie_default_state: pcie-default-state {
clkreq-pins {
pins = "gpio117";
function = "pcie0_clk_req_n";
drive-strength = <2>;
bias-pull-up;
};

wake-pins {
pins = "gpio119";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};

tc9563_resx_n: tc9563-resx-state {
pins = "gpio118";
function = "gpio";
bias-disable;
/* Reset pin of tc9563 is active low hence set default
* state of this pin to output-high.
*/
output-high;
};

};

&uart0 {
Expand Down
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