Allow Reading from Hint Space for MULTI_OBSERVE

[darth-cy]

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[Copilot]

Pull request overview

This PR extends the MULTI_OBSERVE Poseidon2 instruction to optionally read input data from hint space instead of memory. Previously, MULTI_OBSERVE always read input elements from a memory array pointer. Now, a context array is used to pass parameters (init_pos, len, is_hint, reserved), and when is_hint=1, data is read from hint space via the hint bus instead of memory.

Changes:

• Replaced separate init_pos and len register parameters with a context array (ctx_ptr) and added a hint_id register parameter across the entire instruction pipeline (compiler IR, ASM, conversion, execution, AIR, columns).
• Added conditional hint space lookup in the AIR constraints and trace generation: in hint mode, memory reads are skipped and hint bus lookups are used instead, with adjusted timestamp increments (1 per element instead of 2).
• Wired HintSpaceProviderChip into NativePoseidon2Filler to register hint bus interactions during trace filling.

Reviewed changes

Copilot reviewed 12 out of 12 changed files in this pull request and generated 2 comments.

Show a summary per file

File	Description
extensions/native/recursion/src/challenger/duplex.rs	Pass None for new hint_id parameter
extensions/native/compiler/src/ir/poseidon.rs	Allocate context array, pack params, read back result
extensions/native/compiler/src/ir/instructions.rs	Update Poseidon2MultiObserve variant to use ctx_ptr and hint_id
extensions/native/compiler/src/conversion/mod.rs	Update instruction field mapping for conversion
extensions/native/compiler/src/asm/instruction.rs	Update ASM instruction docs and display
extensions/native/compiler/src/asm/compiler.rs	Update DslIr→AsmInstruction mapping
extensions/native/circuit/src/poseidon2/execution.rs	Read ctx array and hint data in execution path
extensions/native/circuit/src/poseidon2/columns.rs	Add ctx array, read_ctx, register columns; remove old fields
extensions/native/circuit/src/poseidon2/chip.rs	Add hint_space_provider, conditional hint reads in trace gen
extensions/native/circuit/src/poseidon2/air.rs	Add hint bus lookups, conditional memory reads, timestamp adjustments
extensions/native/circuit/src/extension/mod.rs	Reorder chip creation to pass hint_space_provider to poseidon2
extensions/native/circuit/cuda/src/poseidon2.cu	Update CUDA trace fill for hint mode timestamps and reads

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[Copilot]

Pull request overview

This PR extends the native Poseidon2 MULTI_OBSERVE opcode to optionally source absorbed elements from hint space (via hint_id) instead of memory, by moving (init_pos, len, is_hint) into a context array and updating the VM IR/ASM, CPU executor/trace filler, AIR constraints, and CUDA tracegen plumbing accordingly.

Changes:

• Update Poseidon2MultiObserve IR/ASM encoding to take (ctx_ptr, hint_id) and read/write init_pos via ctx[0].
• Implement hint-mode execution/trace behavior (CPU + CUDA), including hint-bus lookups and updated timestamping.
• Wire hint space provider availability/order into CPU and GPU extension initialization.

Reviewed changes

Copilot reviewed 18 out of 18 changed files in this pull request and generated 4 comments.

Show a summary per file

File	Description
extensions/native/recursion/src/challenger/duplex.rs	Update callsite to new poseidon2_multi_observe(..., input_len, hint_id) signature.
extensions/native/compiler/src/ir/poseidon.rs	Builder API now constructs ctx array and emits updated Poseidon2MultiObserve.
extensions/native/compiler/src/ir/instructions.rs	Redefine DslIr::Poseidon2MultiObserve operands to (ctx_ptr, hint_id) form.
extensions/native/compiler/src/conversion/mod.rs	Map updated ASM operands to the MULTI_OBSERVE machine instruction fields.
extensions/native/compiler/src/asm/instruction.rs	Update assembly enum + display formatting for new operand order/meaning.
extensions/native/compiler/src/asm/compiler.rs	Emit updated Poseidon2MultiObserve instruction from IR.
extensions/native/circuit/src/poseidon2/execution.rs	Native executor: read ctx, optionally read elements from hint space, write back final idx into ctx[0].
extensions/native/circuit/src/poseidon2/cuda.rs	GPU chip: add optional hint-space provider and scan records to populate it pre-upload.
extensions/native/circuit/src/poseidon2/columns.rs	Add not_hint_multi_observe and expand multi-observe specific columns to include ctx + hint_id.
extensions/native/circuit/src/poseidon2/chip.rs	CPU tracegen/executor: implement ctx reads, hint-mode element sourcing, timestamps, and ctx[0] writeback.
extensions/native/circuit/src/poseidon2/air.rs	AIR: enforce ctx reads, hint-bus lookups, gated memory reads/writes, and updated timestamps.
extensions/native/circuit/src/jal_rangecheck/cuda.rs	Minor import formatting change.
extensions/native/circuit/src/fri/cuda.rs	Minor import formatting change.
extensions/native/circuit/src/extension/mod.rs	Reorder AIR/chip initialization so hint space provider is available before Poseidon2; pass provider into fillers.
extensions/native/circuit/src/extension/cuda.rs	Create CPU hint-space provider for GPU path and pass it into Poseidon2 GPU chip.
extensions/native/circuit/cuda/src/poseidon2.cu	CUDA mem-fill logic updated for ctx read + hint_id read and hint-mode timestamps.
extensions/native/circuit/cuda/include/native/poseidon2.cuh	CUDA struct layout updated to match new multi-observe columns.
crates/circuits/mod-builder/src/utils.rs	Trailing newline added.

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