rcx: ensure that short junctions are always identified and marked

[AcKoucher]

Context

As I was studying the timing discrepancies between GRT and DRT, I realized that suppressing the merging mechanism in RCX was affecting TNS:

asap7/cva6 TNS:

Default Extraction	Using -no_merge_via_res -max_res 0.0
~1600ps	~400ps (wrong)

Apparently, the RCX flow has two passes. The first pass marks the junctions that represent either a new wire path (branching point) or a short. The second pass actually creates the RC topology using the information collected by the previous one.

The Bug

The original implementation had a check which would skip the first pass entirely if the merging mechanisms were off (probably to avoid a sweep that was thought to be unneeded). Indeed the branching point marking is unneeded, because, as there will be no merging, there's no need to know where these junctions are (one of the conditions to flush the current RC accumulation into a new dbRSeg is if a marked junction is found). However, skipping the first pass will also prevent short junctions' marking which will result in holes in the RC topology.

Type of Change

• Bug fix

Impact

When suppressing the merging mechanisms, the generated RC topology i.e., the .spef won't have gaps in short junctions and the TNS discrepancy is fixed (there's still a very small error which I'm investigating).

Verification

• I have verified that the local build succeeds (./etc/Build.sh).
• I have run the relevant tests and they pass.
• My code follows the repository's formatting guidelines.
• I have signed my commits (DCO).

Related Issues

I found this bug when working on #3969 even though it shouldn't affect the correlation results.

[github-actions]

clang-tidy review says "All clean, LGTM! 👍"

[gemini-code-assist]

Code Review

This pull request modifies the makeNetRCsegs function in netRC.cpp to unconditionally process wire paths by removing the conditional check on resistance merging flags. Additionally, it introduces a new integration test named no_merging to verify that RC topology is correctly generated when merging mechanisms are disabled. I have no feedback to provide.

[github-actions]

clang-tidy review says "All clean, LGTM! 👍"

[maliberty]

A secure CI will be needed. Are there actual shorts or where to they come from?

[AcKoucher]

I'm not referring to an actual electrical short but rather an dbWireDecoder::OpCode::SHORT. From the definition:

class dbWireDecoder
{
 public:
  enum OpCode
  {
    [...]
    SHORT,  /// A new path offset from a previous point, implied virtual short
    VWIRE,  /// A new path spawned from a previous point, non-exsistant virtual
            /// wire from previous point to first point of path
    [...]

Also, I'm running a Secure-CI.

[AcKoucher]

@maliberty Secure-CI is fine.