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Pull requests: llvm/circt

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Pull requests list

[FIRRTL][LowerXMR] Add inner symbols on ports
#9954 opened Mar 16, 2026 by seldridge Loading…
[SV] Add sv.macro.module operation
#9948 opened Mar 16, 2026 by uenoku Draft
[CombToSynth] Lower majority-inverter to and-inverter
#9947 opened Mar 16, 2026 by uenoku Loading…
[Support] [SATSolver] Add indexed max heap utility
#9945 opened Mar 15, 2026 by uenoku Loading…
ImportVerilog: add step-1 SV interface import
#9904 opened Mar 11, 2026 by AmurG Loading…
[LTL] Make ltl.delay support optional clocking
#9869 opened Mar 7, 2026 by Clo91eaf Loading…
[LLHD] Allow verif ops in comb canonicalization
#9752 opened Feb 25, 2026 by towoe Loading…
Migrated to PyConcrete* base classes
#9745 opened Feb 24, 2026 by jpienaar Loading…
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